[llvm] e44cfe0 - [InstCombine] Precommit test for PR68465

[via llvm-commits]

Author: zhongyunde 00443407
Date: 2023-10-09T23:39:09+08:00
New Revision: e44cfe0fb1ae977eeef654406eca7d42b18df2c8

URL: https://github.com/llvm/llvm-project/commit/e44cfe0fb1ae977eeef654406eca7d42b18df2c8
DIFF: https://github.com/llvm/llvm-project/commit/e44cfe0fb1ae977eeef654406eca7d42b18df2c8.diff

LOG: [InstCombine] Precommit test for PR68465

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/zext.ll

Removed: 
    


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diff  --git a/llvm/test/Transforms/InstCombine/zext.ll b/llvm/test/Transforms/InstCombine/zext.ll
index 8aa2a10e6abb2ea..00147bb523f474e 100644
--- a/llvm/test/Transforms/InstCombine/zext.ll
+++ b/llvm/test/Transforms/InstCombine/zext.ll
@@ -748,3 +748,16 @@ define i64 @zext_icmp_ne_bool_1(ptr %ptr) {
   %len = zext i1 %cmp to i64
   ret i64 %len
 }
+
+define i32  @zext_icmp_eq0_no_shift(ptr %ptr ) {
+; CHECK-LABEL: @zext_icmp_eq0_no_shift(
+; CHECK-NEXT:    [[X:%.*]] = load i8, ptr [[PTR:%.*]], align 1, !range [[RNG1:![0-9]+]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq i8 [[X]], 0
+; CHECK-NEXT:    [[RES:%.*]] = zext i8 [[TMP1]] to i32
+; CHECK-NEXT:    ret i32 [[RES]]
+;
+  %X = load i8, ptr %ptr,align 1, !range !{i8 0, i8 2} ; range [0, 2)
+  %cmp = icmp eq i8 %X, 0
+  %res = zext i1 %cmp to i32
+  ret i32 %res
+}