[llvm] [SPIRV] Fix SPV_KHR_expect_assume support (PR #67793)

Paulo Matos via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 9 01:05:42 PDT 2023


https://github.com/pmatos updated https://github.com/llvm/llvm-project/pull/67793

>From 62797a640d9c3bd72addf2349ea46705441cc4c0 Mon Sep 17 00:00:00 2001
From: Paulo Matos <pmatos at igalia.com>
Date: Fri, 29 Sep 2023 13:52:07 +0200
Subject: [PATCH 1/7] [SPIRV] Fix SPV_KHR_expect_assume support

Since efe0e10718 changes in tests are required. Need to add extension to Extensions list
and command line to enable use of the extension for test runs.
---
 llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp | 4 ++++
 llvm/test/CodeGen/SPIRV/assume.ll        | 4 ++--
 llvm/test/CodeGen/SPIRV/expect.ll        | 4 ++--
 3 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp b/llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
index 0c185f663b63f87..cf6dfb127cdebf3 100644
--- a/llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
@@ -41,6 +41,10 @@ cl::list<SPIRV::Extension::Extension> Extensions(
                    "SPV_KHR_no_integer_wrap_decoration",
                    "Adds decorations to indicate that a given instruction does "
                    "not cause integer wrapping"),
+        clEnumValN(SPIRV::Extension::SPV_KHR_expect_assume,
+                   "SPV_KHR_expect_assume",
+                   "Provides additional information to a compiler, similar to "
+                   "the llvm.assume and llvm.expect intrinsics."),
         clEnumValN(SPIRV::Extension::SPV_KHR_bit_instructions,
                    "SPV_KHR_bit_instructions",
                    "This enables bit instructions to be used by SPIR-V modules "
diff --git a/llvm/test/CodeGen/SPIRV/assume.ll b/llvm/test/CodeGen/SPIRV/assume.ll
index 679db5d88d4fbe7..69d3ade564da344 100644
--- a/llvm/test/CodeGen/SPIRV/assume.ll
+++ b/llvm/test/CodeGen/SPIRV/assume.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=spirv32-unknown-unknown < %s | FileCheck %s
-; RUN: llc -mtriple=spirv64-unknown-unknown < %s | FileCheck %s
+; RUN: llc -mtriple=spirv32-unknown-unknown --spirv-extensions=SPV_KHR_expect_assume < %s | FileCheck %s
+; RUN: llc -mtriple=spirv64-unknown-unknown --spirv-extensions=SPV_KHR_expect_assume < %s | FileCheck %s
 
 ; CHECK:      OpCapability ExpectAssumeKHR
 ; CHECK-NEXT: OpExtension "SPV_KHR_expect_assume"
diff --git a/llvm/test/CodeGen/SPIRV/expect.ll b/llvm/test/CodeGen/SPIRV/expect.ll
index 530ba7e5a49b09a..9af27965182cc04 100644
--- a/llvm/test/CodeGen/SPIRV/expect.ll
+++ b/llvm/test/CodeGen/SPIRV/expect.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=spirv32-unknown-unknown < %s | FileCheck %s
-; RUN: llc -mtriple=spirv64-unknown-unknown < %s | FileCheck %s
+; RUN: llc -mtriple=spirv32-unknown-unknown --spirv-extensions=SPV_KHR_expect_assume < %s | FileCheck %s
+; RUN: llc -mtriple=spirv64-unknown-unknown --spirv-extensions=SPV_KHR_expect_assume < %s | FileCheck %s
 
 ; CHECK:      OpCapability ExpectAssumeKHR
 ; CHECK-NEXT: OpExtension "SPV_KHR_expect_assume"

>From 7028ec4796fcebf72302d98c3658c4d7cb03658f Mon Sep 17 00:00:00 2001
From: Paulo Matos <pmatos at igalia.com>
Date: Mon, 2 Oct 2023 13:52:44 +0200
Subject: [PATCH 2/7] Ignore assume/expect instructions if can't use extension.

---
 .../Target/SPIRV/SPIRVInstructionSelector.cpp   | 17 ++++++++++-------
 llvm/test/CodeGen/SPIRV/assume.ll               |  7 +++++++
 2 files changed, 17 insertions(+), 7 deletions(-)

diff --git a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
index 035989f2fe571b2..da61af7a669f149 100644
--- a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
@@ -12,6 +12,7 @@
 //
 //===----------------------------------------------------------------------===//
 
+#include "MCTargetDesc/SPIRVBaseInfo.h"
 #include "MCTargetDesc/SPIRVMCTargetDesc.h"
 #include "SPIRV.h"
 #include "SPIRVGlobalRegistry.h"
@@ -1407,15 +1408,17 @@ bool SPIRVInstructionSelector::selectIntrinsic(Register ResVReg,
   case Intrinsic::spv_alloca:
     return selectFrameIndex(ResVReg, ResType, I);
   case Intrinsic::spv_assume:
-    BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpAssumeTrueKHR))
-        .addUse(I.getOperand(1).getReg());
+    if (STI.canUseExtension(SPIRV::Extension::SPV_KHR_expect_assume))
+      BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpAssumeTrueKHR))
+          .addUse(I.getOperand(1).getReg());
     break;
   case Intrinsic::spv_expect:
-    BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpExpectKHR))
-        .addDef(ResVReg)
-        .addUse(GR.getSPIRVTypeID(ResType))
-        .addUse(I.getOperand(2).getReg())
-        .addUse(I.getOperand(3).getReg());
+    if (STI.canUseExtension(SPIRV::Extension::SPV_KHR_expect_assume))
+      BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpExpectKHR))
+          .addDef(ResVReg)
+          .addUse(GR.getSPIRVTypeID(ResType))
+          .addUse(I.getOperand(2).getReg())
+          .addUse(I.getOperand(3).getReg());
     break;
   default:
     llvm_unreachable("Intrinsic selection not implemented");
diff --git a/llvm/test/CodeGen/SPIRV/assume.ll b/llvm/test/CodeGen/SPIRV/assume.ll
index 69d3ade564da344..08f4cd07b01678a 100644
--- a/llvm/test/CodeGen/SPIRV/assume.ll
+++ b/llvm/test/CodeGen/SPIRV/assume.ll
@@ -1,13 +1,20 @@
 ; RUN: llc -mtriple=spirv32-unknown-unknown --spirv-extensions=SPV_KHR_expect_assume < %s | FileCheck %s
 ; RUN: llc -mtriple=spirv64-unknown-unknown --spirv-extensions=SPV_KHR_expect_assume < %s | FileCheck %s
+; RUN: llc -mtriple=spirv32-unknown-unknown < %s | FileCheck --check-prefix=NOEXT %s
+; RUN: llc -mtriple=spirv64-unknown-unknown < %s | FileCheck --check-prefix=NOEXT %s
 
 ; CHECK:      OpCapability ExpectAssumeKHR
 ; CHECK-NEXT: OpExtension "SPV_KHR_expect_assume"
+; NOEXT-NOT:  OpCapability ExpectAssumeKHR
+; NOEXT-NOT:  OpExtension "SPV_KHR_expect_assume"
+
 
 declare void @llvm.assume(i1)
 
 ; CHECK-DAG:  %9 = OpIEqual %5 %6 %7
 ; CHECK-NEXT: OpAssumeTrueKHR %9
+; NOEXT:     %9 = OpIEqual %5 %6 %7
+; NOEXT-NOT: OpAssumeTrueKHR %9
 define void @assumeeq(i32 %x, i32 %y) {
     %cmp = icmp eq i32 %x, %y
     call void @llvm.assume(i1 %cmp)

>From 0bee5d080e14cf84eacb4b63c2f210f383a4f544 Mon Sep 17 00:00:00 2001
From: Paulo Matos <pmatos at igalia.com>
Date: Tue, 3 Oct 2023 07:50:35 +0200
Subject: [PATCH 3/7] Improve code generation when expect/assume not avail

---
 .../lib/Target/SPIRV/SPIRVPrepareFunctions.cpp | 13 +++++++++++--
 llvm/test/CodeGen/SPIRV/assume.ll              | 18 ++++++++----------
 llvm/test/CodeGen/SPIRV/expect.ll              | 15 ++++++++++-----
 3 files changed, 29 insertions(+), 17 deletions(-)

diff --git a/llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp b/llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
index 87a9a0e4fab845c..97468eedd88e58e 100644
--- a/llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
@@ -300,7 +300,11 @@ bool SPIRVPrepareFunctions::substituteIntrinsicCalls(Function *F) {
         Changed = true;
       } else if (II->getIntrinsicID() == Intrinsic::assume ||
                  II->getIntrinsicID() == Intrinsic::expect) {
-        lowerExpectAssume(II);
+        TargetMachine &TM = M.getTargetMachine();
+        const TargetSubtargetInfo &STI = TM.getSubtarget<TargetSubtargetInfo>();
+
+        if(STI.canUse(SPIRV::Extension::SPV_KHR_expect_assume))
+          lowerExpectAssume(II);
         Changed = true;
       }
     }
@@ -376,8 +380,13 @@ SPIRVPrepareFunctions::removeAggregateTypesFromSignature(Function *F) {
 
 bool SPIRVPrepareFunctions::runOnModule(Module &M) {
   bool Changed = false;
+
+  // Get target machine and from it, the subtarget.
+  TargetMachine &TM = M.getTargetMachine();
+  const TargetSubtargetInfo &STI = TM.getSubtarget<TargetSubtargetInfo>();
+
   for (Function &F : M)
-    Changed |= substituteIntrinsicCalls(&F);
+    Changed |= substituteIntrinsicCalls(&F, STI);
 
   std::vector<Function *> FuncsWorklist;
   for (auto &F : M)
diff --git a/llvm/test/CodeGen/SPIRV/assume.ll b/llvm/test/CodeGen/SPIRV/assume.ll
index 08f4cd07b01678a..07b41dc4e5ee432 100644
--- a/llvm/test/CodeGen/SPIRV/assume.ll
+++ b/llvm/test/CodeGen/SPIRV/assume.ll
@@ -1,20 +1,18 @@
-; RUN: llc -mtriple=spirv32-unknown-unknown --spirv-extensions=SPV_KHR_expect_assume < %s | FileCheck %s
-; RUN: llc -mtriple=spirv64-unknown-unknown --spirv-extensions=SPV_KHR_expect_assume < %s | FileCheck %s
-; RUN: llc -mtriple=spirv32-unknown-unknown < %s | FileCheck --check-prefix=NOEXT %s
-; RUN: llc -mtriple=spirv64-unknown-unknown < %s | FileCheck --check-prefix=NOEXT %s
+; RUN: llc -mtriple=spirv32-unknown-unknown --spirv-extensions=SPV_KHR_expect_assume < %s | FileCheck --check-prefixes=EXT,CHECK %s
+; RUN: llc -mtriple=spirv64-unknown-unknown --spirv-extensions=SPV_KHR_expect_assume < %s | FileCheck --check-prefixes=EXT,CHECK %s
+; RUN: llc -mtriple=spirv32-unknown-unknown < %s | FileCheck --check-prefixes=NOEXT,CHECK %s
+; RUN: llc -mtriple=spirv64-unknown-unknown < %s | FileCheck --check-prefixes=NOEXT,CHECK %s
 
-; CHECK:      OpCapability ExpectAssumeKHR
-; CHECK-NEXT: OpExtension "SPV_KHR_expect_assume"
+; EXT:        OpCapability ExpectAssumeKHR
+; EXT-NEXT:   OpExtension "SPV_KHR_expect_assume"
 ; NOEXT-NOT:  OpCapability ExpectAssumeKHR
 ; NOEXT-NOT:  OpExtension "SPV_KHR_expect_assume"
 
-
 declare void @llvm.assume(i1)
 
 ; CHECK-DAG:  %9 = OpIEqual %5 %6 %7
-; CHECK-NEXT: OpAssumeTrueKHR %9
-; NOEXT:     %9 = OpIEqual %5 %6 %7
-; NOEXT-NOT: OpAssumeTrueKHR %9
+; EXT-NEXT:   OpAssumeTrueKHR %9
+; NOEXT-NOT:  OpAssumeTrueKHR %9
 define void @assumeeq(i32 %x, i32 %y) {
     %cmp = icmp eq i32 %x, %y
     call void @llvm.assume(i1 %cmp)
diff --git a/llvm/test/CodeGen/SPIRV/expect.ll b/llvm/test/CodeGen/SPIRV/expect.ll
index 9af27965182cc04..51555cd155523da 100644
--- a/llvm/test/CodeGen/SPIRV/expect.ll
+++ b/llvm/test/CodeGen/SPIRV/expect.ll
@@ -1,8 +1,12 @@
-; RUN: llc -mtriple=spirv32-unknown-unknown --spirv-extensions=SPV_KHR_expect_assume < %s | FileCheck %s
-; RUN: llc -mtriple=spirv64-unknown-unknown --spirv-extensions=SPV_KHR_expect_assume < %s | FileCheck %s
+; RUN: llc -mtriple=spirv32-unknown-unknown --spirv-extensions=SPV_KHR_expect_assume < %s | FileCheck --check-prefixes=CHECK,EXT %s
+; RUN: llc -mtriple=spirv64-unknown-unknown --spirv-extensions=SPV_KHR_expect_assume < %s | FileCheck --check-prefixes=CHECK,EXT %s
+; RUN: llc -mtriple=spirv32-unknown-unknown < %s | FileCheck --check-prefixes=CHECK,NOEXT %s
+; RUN: llc -mtriple=spirv64-unknown-unknown < %s | FileCheck --check-prefixes=CHECK,NOEXT %s
 
-; CHECK:      OpCapability ExpectAssumeKHR
-; CHECK-NEXT: OpExtension "SPV_KHR_expect_assume"
+; EXT:      OpCapability ExpectAssumeKHR
+; EXT-NEXT: OpExtension "SPV_KHR_expect_assume"
+; NOEXT-NOT:  OpCapability ExpectAssumeKHR
+; NOEXT-NOT:  OpExtension "SPV_KHR_expect_assume"
 
 declare i32 @llvm.expect.i32(i32, i32)
 declare i32 @getOne()
@@ -10,7 +14,8 @@ declare i32 @getOne()
 ; CHECK-DAG: %2 = OpTypeInt 32 0
 ; CHECK-DAG: %6 = OpFunctionParameter %2
 ; CHECK-DAG: %9 = OpIMul %2 %6 %8
-; CHECK-DAG: %10 = OpExpectKHR %2 %9 %6
+; EXT-DAG:   %10 = OpExpectKHR %2 %9 %6
+; NOEXT-NOT: %10 = OpExpectKHR %2 %9 %6
 
 define i32 @test(i32 %x) {
   %one = call i32 @getOne()

>From dacc5e701e0d61e0a80084b74a7d504c207f1bcd Mon Sep 17 00:00:00 2001
From: Paulo Matos <pmatos at igalia.com>
Date: Tue, 3 Oct 2023 10:07:47 +0200
Subject: [PATCH 4/7] Passing through TargetMachine to pass

---
 llvm/lib/Target/SPIRV/SPIRV.h                 |  2 +-
 .../Target/SPIRV/SPIRVPrepareFunctions.cpp    | 20 ++++++++-----------
 llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp  |  6 ++++--
 3 files changed, 13 insertions(+), 15 deletions(-)

diff --git a/llvm/lib/Target/SPIRV/SPIRV.h b/llvm/lib/Target/SPIRV/SPIRV.h
index 20834c547646823..3151d69ab745d2d 100644
--- a/llvm/lib/Target/SPIRV/SPIRV.h
+++ b/llvm/lib/Target/SPIRV/SPIRV.h
@@ -19,7 +19,7 @@ class SPIRVSubtarget;
 class InstructionSelector;
 class RegisterBankInfo;
 
-ModulePass *createSPIRVPrepareFunctionsPass();
+ModulePass *createSPIRVPrepareFunctionsPass(const SPIRVTargetMachine &TM);
 FunctionPass *createSPIRVRegularizerPass();
 FunctionPass *createSPIRVPreLegalizerPass();
 FunctionPass *createSPIRVEmitIntrinsicsPass(SPIRVTargetMachine *TM);
diff --git a/llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp b/llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
index 97468eedd88e58e..d7b208dea3998fa 100644
--- a/llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
@@ -19,6 +19,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "SPIRV.h"
+#include "SPIRVSubtarget.h"
 #include "SPIRVTargetMachine.h"
 #include "SPIRVUtils.h"
 #include "llvm/CodeGen/IntrinsicLowering.h"
@@ -38,12 +39,13 @@ void initializeSPIRVPrepareFunctionsPass(PassRegistry &);
 namespace {
 
 class SPIRVPrepareFunctions : public ModulePass {
+  const SPIRVTargetMachine &TM;
   bool substituteIntrinsicCalls(Function *F);
   Function *removeAggregateTypesFromSignature(Function *F);
 
 public:
   static char ID;
-  SPIRVPrepareFunctions() : ModulePass(ID) {
+  SPIRVPrepareFunctions(const SPIRVTargetMachine &TM) : ModulePass(ID), TM(TM) {
     initializeSPIRVPrepareFunctionsPass(*PassRegistry::getPassRegistry());
   }
 
@@ -300,10 +302,8 @@ bool SPIRVPrepareFunctions::substituteIntrinsicCalls(Function *F) {
         Changed = true;
       } else if (II->getIntrinsicID() == Intrinsic::assume ||
                  II->getIntrinsicID() == Intrinsic::expect) {
-        TargetMachine &TM = M.getTargetMachine();
-        const TargetSubtargetInfo &STI = TM.getSubtarget<TargetSubtargetInfo>();
-
-        if(STI.canUse(SPIRV::Extension::SPV_KHR_expect_assume))
+        const SPIRVSubtarget &STI = TM.getSubtarget<SPIRVSubtarget>(*F);
+        if(STI.canUseExtension(SPIRV::Extension::SPV_KHR_expect_assume))
           lowerExpectAssume(II);
         Changed = true;
       }
@@ -381,12 +381,8 @@ SPIRVPrepareFunctions::removeAggregateTypesFromSignature(Function *F) {
 bool SPIRVPrepareFunctions::runOnModule(Module &M) {
   bool Changed = false;
 
-  // Get target machine and from it, the subtarget.
-  TargetMachine &TM = M.getTargetMachine();
-  const TargetSubtargetInfo &STI = TM.getSubtarget<TargetSubtargetInfo>();
-
   for (Function &F : M)
-    Changed |= substituteIntrinsicCalls(&F, STI);
+    Changed |= substituteIntrinsicCalls(&F);
 
   std::vector<Function *> FuncsWorklist;
   for (auto &F : M)
@@ -403,6 +399,6 @@ bool SPIRVPrepareFunctions::runOnModule(Module &M) {
   return Changed;
 }
 
-ModulePass *llvm::createSPIRVPrepareFunctionsPass() {
-  return new SPIRVPrepareFunctions();
+ModulePass *llvm::createSPIRVPrepareFunctionsPass(const SPIRVTargetMachine &TM) {
+  return new SPIRVPrepareFunctions(TM);
 }
diff --git a/llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp b/llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
index 14dd429b451910d..c51514818e685c4 100644
--- a/llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
@@ -90,7 +90,7 @@ namespace {
 class SPIRVPassConfig : public TargetPassConfig {
 public:
   SPIRVPassConfig(SPIRVTargetMachine &TM, PassManagerBase &PM)
-      : TargetPassConfig(TM, PM) {}
+      : TargetPassConfig(TM, PM), TM(TM) {}
 
   SPIRVTargetMachine &getSPIRVTargetMachine() const {
     return getTM<SPIRVTargetMachine>();
@@ -109,6 +109,8 @@ class SPIRVPassConfig : public TargetPassConfig {
   void addOptimizedRegAlloc() override {}
 
   void addPostRegAlloc() override;
+  private:
+  const SPIRVTargetMachine &TM;
 };
 } // namespace
 
@@ -150,7 +152,7 @@ TargetPassConfig *SPIRVTargetMachine::createPassConfig(PassManagerBase &PM) {
 void SPIRVPassConfig::addIRPasses() {
   TargetPassConfig::addIRPasses();
   addPass(createSPIRVRegularizerPass());
-  addPass(createSPIRVPrepareFunctionsPass());
+  addPass(createSPIRVPrepareFunctionsPass(TM));
 }
 
 void SPIRVPassConfig::addISelPrepare() {

>From 223a672ea603b24e989b1f28b6b4a222380dcfc0 Mon Sep 17 00:00:00 2001
From: Paulo Matos <pmatos at igalia.com>
Date: Tue, 3 Oct 2023 10:08:06 +0200
Subject: [PATCH 5/7] clang format

---
 llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp | 5 +++--
 llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp    | 3 ++-
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp b/llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
index d7b208dea3998fa..624c7d70ae82cc0 100644
--- a/llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
@@ -303,7 +303,7 @@ bool SPIRVPrepareFunctions::substituteIntrinsicCalls(Function *F) {
       } else if (II->getIntrinsicID() == Intrinsic::assume ||
                  II->getIntrinsicID() == Intrinsic::expect) {
         const SPIRVSubtarget &STI = TM.getSubtarget<SPIRVSubtarget>(*F);
-        if(STI.canUseExtension(SPIRV::Extension::SPV_KHR_expect_assume))
+        if (STI.canUseExtension(SPIRV::Extension::SPV_KHR_expect_assume))
           lowerExpectAssume(II);
         Changed = true;
       }
@@ -399,6 +399,7 @@ bool SPIRVPrepareFunctions::runOnModule(Module &M) {
   return Changed;
 }
 
-ModulePass *llvm::createSPIRVPrepareFunctionsPass(const SPIRVTargetMachine &TM) {
+ModulePass *
+llvm::createSPIRVPrepareFunctionsPass(const SPIRVTargetMachine &TM) {
   return new SPIRVPrepareFunctions(TM);
 }
diff --git a/llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp b/llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
index c51514818e685c4..1503f263e42c0d5 100644
--- a/llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
@@ -109,7 +109,8 @@ class SPIRVPassConfig : public TargetPassConfig {
   void addOptimizedRegAlloc() override {}
 
   void addPostRegAlloc() override;
-  private:
+
+private:
   const SPIRVTargetMachine &TM;
 };
 } // namespace

>From a152c01166ad3287290e058b22829e5fbdf74d7f Mon Sep 17 00:00:00 2001
From: Paulo Matos <pmatos at igalia.com>
Date: Tue, 3 Oct 2023 12:50:14 +0200
Subject: [PATCH 6/7] Fix tests

---
 llvm/test/CodeGen/SPIRV/assume.ll | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/llvm/test/CodeGen/SPIRV/assume.ll b/llvm/test/CodeGen/SPIRV/assume.ll
index 07b41dc4e5ee432..6099955e4afb4ef 100644
--- a/llvm/test/CodeGen/SPIRV/assume.ll
+++ b/llvm/test/CodeGen/SPIRV/assume.ll
@@ -10,11 +10,11 @@
 
 declare void @llvm.assume(i1)
 
-; CHECK-DAG:  %9 = OpIEqual %5 %6 %7
-; EXT-NEXT:   OpAssumeTrueKHR %9
-; NOEXT-NOT:  OpAssumeTrueKHR %9
-define void @assumeeq(i32 %x, i32 %y) {
+; CHECK-DAG:  %8 = OpIEqual %3 %5 %6
+; EXT:        OpAssumeTrueKHR %8
+; NOEXT-NOT:  OpAssumeTrueKHR %8
+define i1 @assumeeq(i32 %x, i32 %y) {
     %cmp = icmp eq i32 %x, %y
     call void @llvm.assume(i1 %cmp)
-    ret void
+    ret i1 %cmp
 }

>From b473770fdfc406cc7e6766a3ab9147bdc108f4c2 Mon Sep 17 00:00:00 2001
From: Paulo Matos <pmatos at igalia.com>
Date: Mon, 9 Oct 2023 10:05:16 +0200
Subject: [PATCH 7/7] Remove new line.

---
 llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp | 1 -
 1 file changed, 1 deletion(-)

diff --git a/llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp b/llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
index 624c7d70ae82cc0..c376497469ce339 100644
--- a/llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
@@ -380,7 +380,6 @@ SPIRVPrepareFunctions::removeAggregateTypesFromSignature(Function *F) {
 
 bool SPIRVPrepareFunctions::runOnModule(Module &M) {
   bool Changed = false;
-
   for (Function &F : M)
     Changed |= substituteIntrinsicCalls(&F);
 



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