[llvm] [RISCV] Generalize the (ADD (SLLI X, 32), X) special case in constant… (PR #66931)
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Sat Sep 30 13:19:54 PDT 2023
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git-clang-format --diff a5686c2b5541c58c9a1dd760761c369124546f78 3e13faf642b3645491c5dd6342803fb11d8bb38e -- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp llvm/lib/Target/RISCV/RISCVISelLowering.cpp
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
index 2d242cefe641..e12fda51e67c 100644
--- a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
@@ -224,7 +224,8 @@ static SDValue selectImm(SelectionDAG *CurDAG, const SDLoc &DL, const MVT VT,
SDValue SLLI = SDValue(
CurDAG->getMachineNode(RISCV::SLLI, DL, VT, Lo,
- CurDAG->getTargetConstant(MatchedAdd ? ShiftAmt : 32, DL, VT)),
+ CurDAG->getTargetConstant(
+ MatchedAdd ? ShiftAmt : 32, DL, VT)),
0);
// Prefer ADD when possible.
unsigned AddOpc = MatchedAdd ? RISCV::ADD : RISCV::ADD_UW;
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https://github.com/llvm/llvm-project/pull/66931
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