[llvm] [X86] Support EGPR (R16-R31) for APX (PR #67702)

Phoebe Wang via llvm-commits llvm-commits at lists.llvm.org
Fri Sep 29 06:46:37 PDT 2023


================
@@ -390,42 +513,52 @@ def SSP : X86Reg<"ssp", 0>;
 // instruction requiring a REX prefix, while SIL, DIL, BPL, R8D, etc.
 // require a REX prefix. For example, "addb %ah, %dil" and "movzbl %ah, %r8d"
 // cannot be encoded.
-def GR8 : RegisterClass<"X86", [i8],  8,
+def GR8 : RegisterClass<"X86", [i8], 8,
                         (add AL, CL, DL, AH, CH, DH, BL, BH, SIL, DIL, BPL, SPL,
-                             R8B, R9B, R10B, R11B, R14B, R15B, R12B, R13B)> {
----------------
phoebewang wrote:

The old format looks more correct to me.
The same for below.

https://github.com/llvm/llvm-project/pull/67702


More information about the llvm-commits mailing list