[llvm] 5d7672b - [X86] combine-subo.ll - add common CHECK prefix

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2023-09-29T10:31:38+01:00
New Revision: 5d7672b98ee78452e335878acd85d169c0cdd4ed

URL: https://github.com/llvm/llvm-project/commit/5d7672b98ee78452e335878acd85d169c0cdd4ed
DIFF: https://github.com/llvm/llvm-project/commit/5d7672b98ee78452e335878acd85d169c0cdd4ed.diff

LOG: [X86] combine-subo.ll - add common CHECK prefix

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/combine-subo.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/combine-subo.ll b/llvm/test/CodeGen/X86/combine-subo.ll
index 5113c95f9208207..6965f6d7af27b53 100644
--- a/llvm/test/CodeGen/X86/combine-subo.ll
+++ b/llvm/test/CodeGen/X86/combine-subo.ll
@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX
 
 declare {i32, i1} @llvm.ssub.with.overflow.i32(i32, i32) nounwind readnone
 declare {i32, i1} @llvm.usub.with.overflow.i32(i32, i32) nounwind readnone
@@ -10,15 +10,10 @@ declare {<4 x i32>, <4 x i1>} @llvm.usub.with.overflow.v4i32(<4 x i32>, <4 x i32
 
 ; fold (ssub x, 0) -> x
 define i32 @combine_ssub_zero(i32 %a0, i32 %a1) {
-; SSE-LABEL: combine_ssub_zero:
-; SSE:       # %bb.0:
-; SSE-NEXT:    movl %edi, %eax
-; SSE-NEXT:    retq
-;
-; AVX-LABEL: combine_ssub_zero:
-; AVX:       # %bb.0:
-; AVX-NEXT:    movl %edi, %eax
-; AVX-NEXT:    retq
+; CHECK-LABEL: combine_ssub_zero:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movl %edi, %eax
+; CHECK-NEXT:    retq
   %1 = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a0, i32 zeroinitializer)
   %2 = extractvalue {i32, i1} %1, 0
   %3 = extractvalue {i32, i1} %1, 1
@@ -27,13 +22,9 @@ define i32 @combine_ssub_zero(i32 %a0, i32 %a1) {
 }
 
 define <4 x i32> @combine_vec_ssub_zero(<4 x i32> %a0, <4 x i32> %a1) {
-; SSE-LABEL: combine_vec_ssub_zero:
-; SSE:       # %bb.0:
-; SSE-NEXT:    retq
-;
-; AVX-LABEL: combine_vec_ssub_zero:
-; AVX:       # %bb.0:
-; AVX-NEXT:    retq
+; CHECK-LABEL: combine_vec_ssub_zero:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    retq
   %1 = call {<4 x i32>, <4 x i1>} @llvm.ssub.with.overflow.v4i32(<4 x i32> %a0, <4 x i32> zeroinitializer)
   %2 = extractvalue {<4 x i32>, <4 x i1>} %1, 0
   %3 = extractvalue {<4 x i32>, <4 x i1>} %1, 1
@@ -43,15 +34,10 @@ define <4 x i32> @combine_vec_ssub_zero(<4 x i32> %a0, <4 x i32> %a1) {
 
 ; fold (usub x, 0) -> x
 define i32 @combine_usub_zero(i32 %a0, i32 %a1) {
-; SSE-LABEL: combine_usub_zero:
-; SSE:       # %bb.0:
-; SSE-NEXT:    movl %edi, %eax
-; SSE-NEXT:    retq
-;
-; AVX-LABEL: combine_usub_zero:
-; AVX:       # %bb.0:
-; AVX-NEXT:    movl %edi, %eax
-; AVX-NEXT:    retq
+; CHECK-LABEL: combine_usub_zero:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movl %edi, %eax
+; CHECK-NEXT:    retq
   %1 = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a0, i32 zeroinitializer)
   %2 = extractvalue {i32, i1} %1, 0
   %3 = extractvalue {i32, i1} %1, 1
@@ -60,13 +46,9 @@ define i32 @combine_usub_zero(i32 %a0, i32 %a1) {
 }
 
 define <4 x i32> @combine_vec_usub_zero(<4 x i32> %a0, <4 x i32> %a1) {
-; SSE-LABEL: combine_vec_usub_zero:
-; SSE:       # %bb.0:
-; SSE-NEXT:    retq
-;
-; AVX-LABEL: combine_vec_usub_zero:
-; AVX:       # %bb.0:
-; AVX-NEXT:    retq
+; CHECK-LABEL: combine_vec_usub_zero:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    retq
   %1 = call {<4 x i32>, <4 x i1>} @llvm.usub.with.overflow.v4i32(<4 x i32> %a0, <4 x i32> zeroinitializer)
   %2 = extractvalue {<4 x i32>, <4 x i1>} %1, 0
   %3 = extractvalue {<4 x i32>, <4 x i1>} %1, 1
@@ -76,15 +58,10 @@ define <4 x i32> @combine_vec_usub_zero(<4 x i32> %a0, <4 x i32> %a1) {
 
 ; fold (ssub x, x) -> 0
 define i32 @combine_ssub_self(i32 %a0, i32 %a1) {
-; SSE-LABEL: combine_ssub_self:
-; SSE:       # %bb.0:
-; SSE-NEXT:    xorl %eax, %eax
-; SSE-NEXT:    retq
-;
-; AVX-LABEL: combine_ssub_self:
-; AVX:       # %bb.0:
-; AVX-NEXT:    xorl %eax, %eax
-; AVX-NEXT:    retq
+; CHECK-LABEL: combine_ssub_self:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    retq
   %1 = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a0, i32 %a0)
   %2 = extractvalue {i32, i1} %1, 0
   %3 = extractvalue {i32, i1} %1, 1
@@ -111,15 +88,10 @@ define <4 x i32> @combine_vec_ssub_self(<4 x i32> %a0, <4 x i32> %a1) {
 
 ; fold (usub x, x) -> x
 define i32 @combine_usub_self(i32 %a0, i32 %a1) {
-; SSE-LABEL: combine_usub_self:
-; SSE:       # %bb.0:
-; SSE-NEXT:    xorl %eax, %eax
-; SSE-NEXT:    retq
-;
-; AVX-LABEL: combine_usub_self:
-; AVX:       # %bb.0:
-; AVX-NEXT:    xorl %eax, %eax
-; AVX-NEXT:    retq
+; CHECK-LABEL: combine_usub_self:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    retq
   %1 = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a0, i32 %a0)
   %2 = extractvalue {i32, i1} %1, 0
   %3 = extractvalue {i32, i1} %1, 1
@@ -146,17 +118,11 @@ define <4 x i32> @combine_vec_usub_self(<4 x i32> %a0, <4 x i32> %a1) {
 
 ; fold (usub -1, x) -> (xor x, -1) + no borrow
 define i32 @combine_usub_negone(i32 %a0, i32 %a1) {
-; SSE-LABEL: combine_usub_negone:
-; SSE:       # %bb.0:
-; SSE-NEXT:    movl %edi, %eax
-; SSE-NEXT:    notl %eax
-; SSE-NEXT:    retq
-;
-; AVX-LABEL: combine_usub_negone:
-; AVX:       # %bb.0:
-; AVX-NEXT:    movl %edi, %eax
-; AVX-NEXT:    notl %eax
-; AVX-NEXT:    retq
+; CHECK-LABEL: combine_usub_negone:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movl %edi, %eax
+; CHECK-NEXT:    notl %eax
+; CHECK-NEXT:    retq
   %1 = call {i32, i1} @llvm.usub.with.overflow.i32(i32 -1, i32 %a0)
   %2 = extractvalue {i32, i1} %1, 0
   %3 = extractvalue {i32, i1} %1, 1