[llvm] [AMDGPU][IGLP] SingleWaveOpt: Don't collect PERMs for generic VALU SG (PR #67759)

via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 28 18:23:07 PDT 2023


github-actions[bot] wrote:


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:warning: C/C++ code formatter, clang-format found issues in your code. :warning:

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git-clang-format --diff b191ff01dc337e9a44e422b47cdc6d013cdf4bcf 6e503d8467ed0356b50fdadff4922b1500cc84d8 -- llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp b/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
index d49a439c1..9bf758164 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
@@ -907,15 +907,13 @@ private:
   public:
     bool apply(const SUnit *SU, const ArrayRef<SUnit *> Collection,
                SmallVectorImpl<SchedGroup> &SyncPipe) override {
-     return SU->getInstr()->getOpcode() != AMDGPU::V_PERM_B32_e64;
+      return SU->getInstr()->getOpcode() != AMDGPU::V_PERM_B32_e64;
     }
 
-    IsNotPerm(const SIInstrInfo *TII, unsigned SGID,
-                       bool NeedsCache = false)
+    IsNotPerm(const SIInstrInfo *TII, unsigned SGID, bool NeedsCache = false)
         : InstructionRule(TII, SGID, NeedsCache) {}
   };
 
-
   // Whether the DS_READ is a predecessor of first four MFMA in region
   class EnablesInitialMFMA final : public InstructionRule {
   public:

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https://github.com/llvm/llvm-project/pull/67759


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