[llvm] [NVPTX] Teach NVPTX about predicates (PR #67468)

via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 28 06:20:33 PDT 2023


================
@@ -10,24 +10,39 @@
 //  Describe NVPTX instructions format
 //
 //===----------------------------------------------------------------------===//
-
 // Vector instruction type enum
 class VecInstTypeEnum<bits<4> val> {
   bits<4> Value=val;
 }
+
 def VecNOP : VecInstTypeEnum<0>;
 
-// Generic NVPTX Format
+def pred : PredicateOperand<
+    /*ValueType*/i1,
+    /*OpTypes*/(ops Int1Regs),
+    (ops (i32 /*AlwaysVal*/zero_reg))> {
+  let PrintMethod = "printPredicateOperand";
+  let ParserMatchClass = ?;
+  let DecoderMethod = ?;
+}
+
+def switch : OperandWithDefaultOps</*ValueType*/i1, /*defaultops*/(ops (i1 0))>;
 
-class NVPTXInst<dag outs, dag ins, string asmstr, list<dag> pattern>
-  : Instruction {
+// Generic NVPTX Format
+class NVPTXInstBase <dag outs, dag Ins, string asmstr, list<dag>
+pattern, int defaultPreds = 1> : Instruction {
   field bits<14> Inst;
 
   let Namespace = "NVPTX";
   dag OutOperandList = outs;
-  dag InOperandList = ins;
-  let AsmString = asmstr;
+  dag InOperandList = !if(!and(defaultPreds, isPredicable), !con(
----------------
ldrumm wrote:

done and for `AsmStr`

https://github.com/llvm/llvm-project/pull/67468


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