[llvm] [SPIRV] Implement log10 for logical SPIR-V (PR #66921)
Natalie Chouinard via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 27 09:53:50 PDT 2023
================
@@ -260,8 +260,18 @@ Register SPIRVGlobalRegistry::buildConstantFP(APFloat Val,
MF.getRegInfo().setRegClass(Res, &SPIRV::IDRegClass);
assignTypeToVReg(LLVMFPTy, Res, MIRBuilder);
DT.add(ConstFP, &MF, Res);
- MIRBuilder.buildFConstant(Res, *ConstFP);
+ if (EmitIR) {
+ MIRBuilder.buildFConstant(Res, *ConstFP);
+ } else {
----------------
sudonatalie wrote:
If I understand things correctly, GlobalISel (where this function is called from) *is* the process that does that lowering from gMIR (generic MIR) to MIR (SPIR-V specific opcodes). If we don't lower it here, it doesn't happen and gets to the writer without having been lowered, causing a `"Cannot print this instruction."` failure in `SPIRVGenAsmWriter.inc`.
https://github.com/llvm/llvm-project/pull/66921
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