[llvm] 2e2c61e - [x86] precommit test conversion via update_llc_test_checks.py (#67463)

via llvm-commits llvm-commits at lists.llvm.org
Tue Sep 26 15:22:15 PDT 2023


Author: Nick Desaulniers
Date: 2023-09-26T15:22:11-07:00
New Revision: 2e2c61ebd7728b61693d11889b50554e9dc44047

URL: https://github.com/llvm/llvm-project/commit/2e2c61ebd7728b61693d11889b50554e9dc44047
DIFF: https://github.com/llvm/llvm-project/commit/2e2c61ebd7728b61693d11889b50554e9dc44047.diff

LOG: [x86] precommit test conversion via update_llc_test_checks.py (#67463)

I'm looking to update this test; pre-processing it with
update_llc_test_checks.py makes it clearer what I'm changing in #20571.

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/inlineasm-sched-bug.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/inlineasm-sched-bug.ll b/llvm/test/CodeGen/X86/inlineasm-sched-bug.ll
index b89349696555657..be4d1c29332f778 100644
--- a/llvm/test/CodeGen/X86/inlineasm-sched-bug.ll
+++ b/llvm/test/CodeGen/X86/inlineasm-sched-bug.ll
@@ -1,15 +1,26 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
 ; PR13504
 ; RUN: llc -mtriple=i686-- -mcpu=atom < %s | FileCheck %s
 ; Check that treemap is read before the asm statement.
-; CHECK: movl 8(%{{esp|ebp}})
-; CHECK: bsfl
-; CHECK-NOT: movl 8(%{{esp|ebp}})
 
-define i32 @foo(i32 %treemap) nounwind uwtable {
+define i32 @foo(i32 %treemap) nounwind {
+; CHECK-LABEL: foo:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    pushl %eax
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT:    movl %eax, %ecx
+; CHECK-NEXT:    negl %ecx
+; CHECK-NEXT:    andl %eax, %ecx
+; CHECK-NEXT:    movl %ecx, (%esp)
+; CHECK-NEXT:    #APP
+; CHECK-NEXT:    bsfl (%esp), %eax
+; CHECK-NEXT:    #NO_APP
+; CHECK-NEXT:    popl %ecx
+; CHECK-NEXT:    retl
 entry:
   %sub = sub i32 0, %treemap
   %and = and i32 %treemap, %sub
-  %0 = tail call i32 asm "bsfl $1,$0\0A\09", "=r,rm,~{dirflag},~{fpsr},~{flags}"(i32 %and) nounwind
+  %0 = call i32 asm "bsfl $1,$0", "=r,rm"(i32 %and)
   ret i32 %0
 }
 


        


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