[llvm] [TableGen][RISCV][GlobalISel] Select G_ICMP, G_SELECT, G_PTR_ADD (PR #67185)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Tue Sep 26 09:13:02 PDT 2023


================
@@ -214,6 +237,41 @@ bool RISCVInstructionSelector::select(MachineInstr &MI) {
   return true;
 }
 
+bool RISCVInstructionSelector::replacePtrWithInt(MachineOperand &Op,
+                                                 MachineIRBuilder &MIB,
+                                                 MachineRegisterInfo &MRI) {
+  assert(Op.isReg() && "Operand is not a register!");
+  Register PtrReg = Op.getReg();
+  assert(MRI.getType(PtrReg).isPointer() && "Operand is not a pointer!");
+
+  const LLT XLenLLT = LLT::scalar(STI.getXLen());
+  auto PtrToInt = MIB.buildPtrToInt(XLenLLT, PtrReg);
+  MRI.setRegBank(PtrToInt.getReg(0), RBI.getRegBank(RISCV::GPRRegBankID));
+  MRI.setType(PtrReg, XLenLLT);
+  Op.setReg(PtrToInt.getReg(0));
+  return select(*PtrToInt);
+}
+
+bool RISCVInstructionSelector::preISelLower(MachineInstr &MI,
+                                            MachineIRBuilder &MIB,
+                                            MachineRegisterInfo &MRI) {
+  switch (MI.getOpcode()) {
+  case TargetOpcode::G_PTR_ADD: {
+    Register DstReg = MI.getOperand(0).getReg();
+    const LLT XLenLLT = LLT::scalar(STI.getXLen());
+
+    replacePtrWithInt(MI.getOperand(1), MIB, MRI);
+    MI.setDesc(TII.get(TargetOpcode::G_ADD));
+    MRI.setType(DstReg, XLenLLT);
+    break;
+  }
+  default:
+    return false;
+  }
+
+  return true;
----------------
topperc wrote:

I'd remove the return after the switch and leave the `default: return false;`

https://github.com/llvm/llvm-project/pull/67185


More information about the llvm-commits mailing list