[llvm] [SPIRV] Add OpAccessChain instruction support (PR #66253)
Ilia Diachkov via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 26 08:39:47 PDT 2023
Nathan =?utf-8?q?Gauër?= <brioche at google.com>,
Nathan =?utf-8?q?Gauër?= <brioche at google.com>,
Nathan =?utf-8?q?Gauër?= <brioche at google.com>
Message-ID:
In-Reply-To: <llvm/llvm-project/pull/66253/llvm at github.com>
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@@ -1299,18 +1299,28 @@ bool SPIRVInstructionSelector::selectExtractElt(Register ResVReg,
bool SPIRVInstructionSelector::selectGEP(Register ResVReg,
const SPIRVType *ResType,
MachineInstr &I) const {
- // In general we should also support OpAccessChain instrs here (i.e. not
- // PtrAccessChain) but SPIRV-LLVM Translator doesn't emit them at all and so
- // do we to stay compliant with its test and more importantly consumers.
- unsigned Opcode = I.getOperand(2).getImm() ? SPIRV::OpInBoundsPtrAccessChain
- : SPIRV::OpPtrAccessChain;
+ const bool isGEPInBounds = I.getOperand(2).getImm();
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iliya-diyachkov wrote:
Thank you, approved. Please add me to reviewers next time so I have time to look at the patch .
https://github.com/llvm/llvm-project/pull/66253
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