[llvm] [RISCV] Update comment on -w stripping pass. NFC (PR #67415)

[Luke Lau via llvm-commits]

https://github.com/lukel97 created https://github.com/llvm/llvm-project/pull/67415

It looks like we only strip the -w suffix from addw instructions, and not addiw
instructions (bedcause c.addiw and c.addi have the same register encoding), but
the comment in the header seemed to have it the other way round.


>From 084debc54f89e1c3e79f740b426007ae453c3552 Mon Sep 17 00:00:00 2001
From: Luke Lau <luke at igalia.com>
Date: Tue, 26 Sep 2023 12:36:54 +0100
Subject: [PATCH] [RISCV] Update comment on -w stripping pass. NFC

It looks like we only strip the -w suffix from addw instructions, and not addiw
instructions (bedcause c.addiw and c.addi have the same register encoding), but
the comment in the header seemed to have it the other way round.
---
 llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp b/llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
index bd294c669735f4f..3c608bf8b50b57d 100644
--- a/llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
+++ b/llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
@@ -12,10 +12,11 @@
 // extended bits aren't consumed or because the input was already sign extended
 // by an earlier instruction.
 //
-// Then it removes the -w suffix from each addiw and slliw instructions
+// Then it removes the -w suffix from addw, slliw and mulw instructions
 // whenever all users are dependent only on the lower word of the result of the
-// instruction. We do this only for addiw, slliw, and mulw because the -w forms
-// are less compressible.
+// instruction. We do this only for addw, slliw, and mulw because the -w forms
+// are less compressible: c.add and c.slli have a larger register encoding than
+// their w counterparts, and there's no compressible version of mulw.
 //
 //===---------------------------------------------------------------------===//