[llvm] [X86] Add detection for more Tremont models (PR #67150)

[via llvm-commits]

https://github.com/libenc updated https://github.com/llvm/llvm-project/pull/67150

>From 9b7d229c2c7f1b218c9dac541415b26d3efa8c3d Mon Sep 17 00:00:00 2001
From: libenc <75132456+libenc at users.noreply.github.com>
Date: Tue, 26 Sep 2023 17:49:29 +0800
Subject: [PATCH] [X86] Add detection for more Tremont models

Fix the issue that only some server series Tremont processors
(Snow Ridge & Parker Ridge) can be detected as Tremont, while Elkhart Lake
and the client series (Jasper Lake & Lakefield) will be guessed
as Goldmont.
---
 compiler-rt/lib/builtins/cpu_model.c | 3 +++
 llvm/lib/TargetParser/Host.cpp       | 3 +++
 2 files changed, 6 insertions(+)

diff --git a/compiler-rt/lib/builtins/cpu_model.c b/compiler-rt/lib/builtins/cpu_model.c
index 6a0cc8f7a402dad..246025ba5ab8923 100644
--- a/compiler-rt/lib/builtins/cpu_model.c
+++ b/compiler-rt/lib/builtins/cpu_model.c
@@ -553,6 +553,9 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
       *Type = INTEL_GOLDMONT_PLUS;
       break;
     case 0x86:
+    case 0x8a: // Lakefield
+    case 0x96: // Elkhart Lake
+    case 0x9c: // Jasper Lake
       CPU = "tremont";
       *Type = INTEL_TREMONT;
       break;
diff --git a/llvm/lib/TargetParser/Host.cpp b/llvm/lib/TargetParser/Host.cpp
index c79595295d1bd81..cdb1f72ae39b9fc 100644
--- a/llvm/lib/TargetParser/Host.cpp
+++ b/llvm/lib/TargetParser/Host.cpp
@@ -913,6 +913,9 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
       *Type = X86::INTEL_GOLDMONT_PLUS;
       break;
     case 0x86:
+    case 0x8a: // Lakefield
+    case 0x96: // Elkhart Lake
+    case 0x9c: // Jasper Lake
       CPU = "tremont";
       *Type = X86::INTEL_TREMONT;
       break;