[PATCH] D159152: [RISCV] Support fmaximum/fminimum for fp16 vector when only Zvfhmin enabled

Mon Sep 25 22:29:01 PDT 2023

Jim marked an inline comment as done.
Jim added inline comments.

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Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:5503
   case ISD::FMINIMUM:
+    if (Op.getValueType() == MVT::nxv32f16 &&
+        (Subtarget.hasVInstructionsF16Minimal() &&
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michaelmaitland wrote:
> nit: maybe it makes sense for this to go in `lowerFMAXIMUM_FMINIMUM`?
Others for promoting fp16 vector operation to float vector operation also put this checking here. 
I think we can have another PR to change all of them.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D159152/new/

https://reviews.llvm.org/D159152