[llvm] [RISCV] Support VLS for VCIX (PR #67289)

[via llvm-commits]

github-actions[bot] wrote:


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git-clang-format --diff 7ce800ba3197c6df866565b9be5709c8c2d64fc4 97e649bef893c04d7b786367025b577995e2b56b -- llvm/lib/Target/RISCV/RISCVISelLowering.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index d7052e16b833..d702e76d9990 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -8235,8 +8235,7 @@ SDValue RISCVTargetLowering::LowerINTRINSIC_W_CHAIN(SDValue Op,
     SDLoc DL(Op);
     MVT RetContainerVT = getContainerForFixedLengthVector(VT);
     SDVTList VTs = DAG.getVTList({RetContainerVT, MVT::Other});
-    SDValue ScalableVector =
-        DAG.getNode(ISD::INTRINSIC_W_CHAIN, DL, VTs, Ops);
+    SDValue ScalableVector = DAG.getNode(ISD::INTRINSIC_W_CHAIN, DL, VTs, Ops);
     SDValue FixedVector =
         convertFromScalableVector(VT, ScalableVector, DAG, Subtarget);
     return DAG.getMergeValues({FixedVector, ScalableVector.getValue(1)}, DL);

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https://github.com/llvm/llvm-project/pull/67289