[llvm] [RISCV][GISel] Add instruction selection for G_SEXT, G_ZEXT, and G_SEXT_INREG (PR #67359)

[Craig Topper via llvm-commits]

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@@ -1774,6 +1774,12 @@ let Predicates = [IsRV64], hasSideEffects = 0, mayLoad = 0, mayStore = 0,
 def PseudoZEXT_W : Pseudo<(outs GPR:$rd), (ins GPR:$rs), [], "zext.w", "$rd, $rs">;
 } // Predicates = [IsRV64], ...
 
+let Predicates = [IsRV64] in
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topperc wrote:

Add the new patterns to RISCVGISel.td for now since they aren't needed by SelectionDAG.,

https://github.com/llvm/llvm-project/pull/67359