[llvm] 69ba4ae - [AArch64] Remove unused method EncodePPR_p8to15

Matt Devereau via llvm-commits llvm-commits at lists.llvm.org
Mon Sep 25 05:55:28 PDT 2023


Author: Matt Devereau
Date: 2023-09-25T12:55:11Z
New Revision: 69ba4aed004dd96dcf254e1ee19bd5d3875c0d09

URL: https://github.com/llvm/llvm-project/commit/69ba4aed004dd96dcf254e1ee19bd5d3875c0d09
DIFF: https://github.com/llvm/llvm-project/commit/69ba4aed004dd96dcf254e1ee19bd5d3875c0d09.diff

LOG: [AArch64] Remove unused method EncodePPR_p8to15

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
index d8070e21908a307..727f79909811d81 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
@@ -189,9 +189,6 @@ class AArch64MCCodeEmitter : public MCCodeEmitter {
   uint32_t EncodeRegAsMultipleOf(const MCInst &MI, unsigned OpIdx,
                                  SmallVectorImpl<MCFixup> &Fixups,
                                  const MCSubtargetInfo &STI) const;
-  uint32_t EncodePPR_p8to15(const MCInst &MI, unsigned OpIdx,
-                            SmallVectorImpl<MCFixup> &Fixups,
-                            const MCSubtargetInfo &STI) const;
   uint32_t EncodePNR_p8to15(const MCInst &MI, unsigned OpIdx,
                             SmallVectorImpl<MCFixup> &Fixups,
                             const MCSubtargetInfo &STI) const;
@@ -546,14 +543,6 @@ AArch64MCCodeEmitter::EncodeRegAsMultipleOf(const MCInst &MI, unsigned OpIdx,
   return RegVal / Multiple;
 }
 
-uint32_t
-AArch64MCCodeEmitter::EncodePPR_p8to15(const MCInst &MI, unsigned OpIdx,
-                                       SmallVectorImpl<MCFixup> &Fixups,
-                                       const MCSubtargetInfo &STI) const {
-  auto RegOpnd = MI.getOperand(OpIdx).getReg();
-  return RegOpnd - AArch64::P8;
-}
-
 uint32_t
 AArch64MCCodeEmitter::EncodePNR_p8to15(const MCInst &MI, unsigned OpIdx,
                                        SmallVectorImpl<MCFixup> &Fixups,


        


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