[PATCH] D159073: [PowerPC][Peephole] Combine rldicl/rldicr and andi/andis after isel.

[ChenZheng via Phabricator via llvm-commits]

shchenz added a comment.

LGTM with one nit.

Thanks for improving this.



================
Comment at: llvm/lib/Target/PowerPC/PPCMIPeephole.cpp:1120
+        // if all bits to AND are already zero in the input.
+        bool Pattern1 =
+            (SrcOpCode == PPC::RLDICL && (RZeroAndImm + ImmSrc > 63)) ||
----------------
nit: PatternResultZero & PatternRemoveRotate for `Pattern1` and `Pattern2`?


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https://reviews.llvm.org/D159073