[llvm] [AArch64][GlobalISel] Vector Constant Materialization (PR #67149)

[David Green via llvm-commits]

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@@ -5433,6 +5448,188 @@ bool AArch64InstructionSelector::selectInsertElt(MachineInstr &I,
   return true;
 }
 
+MachineInstr *AArch64InstructionSelector::tryAdvSIMDModImm8(
+    Register Dst, unsigned DstSize, APInt Bits, MachineIRBuilder &builder) {
+  unsigned int Op;
+  if (DstSize == 128) {
+    if (Bits.getHiBits(64) != Bits.getLoBits(64))
+      return nullptr;
+    Op = AArch64::MOVIv16b_ns;
+  } else {
+    Op = AArch64::MOVIv8b_ns;
+  }
+
+  uint64_t val = Bits.zextOrTrunc(64).getZExtValue();
+
+  if (AArch64_AM::isAdvSIMDModImmType9(val)) {
+    val = AArch64_AM::encodeAdvSIMDModImmType9(val);
+    auto Mov = builder.buildInstr(Op, {Dst}, {}).addImm(val);
+    constrainSelectedInstRegOperands(*Mov, TII, TRI, RBI);
+    return &*Mov;
+  }
+  return nullptr;
+}
+
+MachineInstr *AArch64InstructionSelector::tryAdvSIMDModImm16(
+    Register Dst, unsigned DstSize, APInt Bits, MachineIRBuilder &builder,
+    bool inv) {
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davemgreen wrote:

Can you change builder to Builder and inv to Inv. The llvm coding style uses capitalized variable names.
Same for the other variables like val below

https://github.com/llvm/llvm-project/pull/67149