[lld] df97922 - [ELF] Implement getImplicitAddend and enable checkDynamicRelocsDefault for AMDGPU

[Fangrui Song via llvm-commits]

Author: Fangrui Song
Date: 2023-09-15T22:59:08-07:00
New Revision: df979228ef46caa23f0dff1e6a2c8948d45513bf

URL: https://github.com/llvm/llvm-project/commit/df979228ef46caa23f0dff1e6a2c8948d45513bf
DIFF: https://github.com/llvm/llvm-project/commit/df979228ef46caa23f0dff1e6a2c8948d45513bf.diff

LOG: [ELF] Implement getImplicitAddend and enable checkDynamicRelocsDefault for AMDGPU

Added: 
    

Modified: 
    lld/ELF/Arch/AMDGPU.cpp
    lld/ELF/Driver.cpp
    lld/test/ELF/amdgpu-relocs.s

Removed: 
    


################################################################################
diff  --git a/lld/ELF/Arch/AMDGPU.cpp b/lld/ELF/Arch/AMDGPU.cpp
index e5605497e27220e..650744db7dee32b 100644
--- a/lld/ELF/Arch/AMDGPU.cpp
+++ b/lld/ELF/Arch/AMDGPU.cpp
@@ -34,6 +34,7 @@ class AMDGPU final : public TargetInfo {
   RelExpr getRelExpr(RelType type, const Symbol &s,
                      const uint8_t *loc) const override;
   RelType getDynRel(RelType type) const override;
+  int64_t getImplicitAddend(const uint8_t *buf, RelType type) const override;
 };
 } // namespace
 
@@ -183,6 +184,20 @@ RelType AMDGPU::getDynRel(RelType type) const {
   return R_AMDGPU_NONE;
 }
 
+int64_t AMDGPU::getImplicitAddend(const uint8_t *buf, RelType type) const {
+  switch (type) {
+  case R_AMDGPU_NONE:
+    return 0;
+  case R_AMDGPU_ABS64:
+  case R_AMDGPU_RELATIVE64:
+    return read64(buf);
+  default:
+    internalLinkerError(getErrorLocation(buf),
+                        "cannot read addend for relocation " + toString(type));
+    return 0;
+  }
+}
+
 TargetInfo *elf::getAMDGPUTargetInfo() {
   static AMDGPU target;
   return ⌖

diff  --git a/lld/ELF/Driver.cpp b/lld/ELF/Driver.cpp
index f64b806aec986c9..e08edc83d108f01 100644
--- a/lld/ELF/Driver.cpp
+++ b/lld/ELF/Driver.cpp
@@ -1713,8 +1713,7 @@ static void setConfigs(opt::InputArgList &args) {
   // enable the debug checks for all targets, but currently not all targets
   // have support for reading Elf_Rel addends, so we only enable for a subset.
 #ifndef NDEBUG
-  bool checkDynamicRelocsDefault =
-      !llvm::is_contained({EM_AMDGPU, EM_HEXAGON}, m);
+  bool checkDynamicRelocsDefault = m != EM_HEXAGON;
 #else
   bool checkDynamicRelocsDefault = false;
 #endif

diff  --git a/lld/test/ELF/amdgpu-relocs.s b/lld/test/ELF/amdgpu-relocs.s
index 2de7d9ae306f71a..f0a75130d69dc46 100644
--- a/lld/test/ELF/amdgpu-relocs.s
+++ b/lld/test/ELF/amdgpu-relocs.s
@@ -5,6 +5,9 @@
 # RUN: llvm-nm %t.so | FileCheck %s --check-prefix=NM
 # RUN: llvm-readelf -x .rodata -x nonalloc %t.so | FileCheck %s --check-prefix=HEX
 
+## ABS64 and RELATIVE64 relocs do not cause --check-dynamic-relocations errors.
+# RUN: ld.lld --hash-style=sysv -shared %t.o -o /dev/null --apply-dynamic-relocs
+
 .text
 
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