[lld] 1b65b15 - [ELF] Enable checkDynamicRelocsDefault for PPC64

[Fangrui Song via llvm-commits]

Author: Fangrui Song
Date: 2023-09-15T22:38:18-07:00
New Revision: 1b65b159da02fc9062ae13ec83258dd7b3a3ce4a

URL: https://github.com/llvm/llvm-project/commit/1b65b159da02fc9062ae13ec83258dd7b3a3ce4a
DIFF: https://github.com/llvm/llvm-project/commit/1b65b159da02fc9062ae13ec83258dd7b3a3ce4a.diff

LOG: [ELF] Enable checkDynamicRelocsDefault for PPC64

.plt and .branch_lt have the type of SHT_NOBITS and may be relocated by dynamic
relocations with non-zero addends. They should be skipped for the
--check-dynamic-relocations check, as --apply-dynamic-relocs does not apply.

A side effect is that -z rel does not work for the two sections.

Added two --apply-dynamic-relocs --check-dynamic-relocations tests. Also checked
linking a PPC64 clang.

Added: 
    

Modified: 
    lld/ELF/Driver.cpp
    lld/ELF/OutputSections.cpp
    lld/test/ELF/ppc64-ifunc.s
    lld/test/ELF/ppc64-long-branch-pi.s

Removed: 
    


################################################################################
diff  --git a/lld/ELF/Driver.cpp b/lld/ELF/Driver.cpp
index 24ffc70d74a8085..4bdf8c94c94b808 100644
--- a/lld/ELF/Driver.cpp
+++ b/lld/ELF/Driver.cpp
@@ -1714,7 +1714,7 @@ static void setConfigs(opt::InputArgList &args) {
   // have support for reading Elf_Rel addends, so we only enable for a subset.
 #ifndef NDEBUG
   bool checkDynamicRelocsDefault =
-      !llvm::is_contained({EM_AMDGPU, EM_HEXAGON, EM_PPC, EM_PPC64}, m);
+      !llvm::is_contained({EM_AMDGPU, EM_HEXAGON, EM_PPC}, m);
 #else
   bool checkDynamicRelocsDefault = false;
 #endif

diff  --git a/lld/ELF/OutputSections.cpp b/lld/ELF/OutputSections.cpp
index 0b9b76e5b832f84..5e2208d89da2700 100644
--- a/lld/ELF/OutputSections.cpp
+++ b/lld/ELF/OutputSections.cpp
@@ -744,6 +744,12 @@ void OutputSection::checkDynRelAddends(const uint8_t *bufStart) {
       int64_t addend = rel.addend;
       const OutputSection *relOsec = rel.inputSec->getOutputSection();
       assert(relOsec != nullptr && "missing output section for relocation");
+      // Some targets have NOBITS synthetic sections with dynamic relocations
+      // with non-zero addends. Skip such sections.
+      if (config->emachine == EM_PPC64 &&
+          (rel.inputSec == in.ppc64LongBranchTarget.get() ||
+           rel.inputSec == in.igotPlt.get()))
+        continue;
       const uint8_t *relocTarget =
           bufStart + relOsec->offset + rel.inputSec->getOffset(rel.offsetInSec);
       // For SHT_NOBITS the written addend is always zero.

diff  --git a/lld/test/ELF/ppc64-ifunc.s b/lld/test/ELF/ppc64-ifunc.s
index d3f26937fb275ac..d024c5d5e36c4fb 100644
--- a/lld/test/ELF/ppc64-ifunc.s
+++ b/lld/test/ELF/ppc64-ifunc.s
@@ -8,7 +8,8 @@
 # RUN: llvm-readobj -r %t | FileCheck --check-prefix=REL %s
 
 # RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %s -o %t.o
-# RUN: ld.lld %t.o -o %t
+## IRELATIVE relocs relocating NOBITS .plt do not cause --check-dynamic-relocations errors.
+# RUN: ld.lld %t.o -o %t --apply-dynamic-relocs --check-dynamic-relocations
 # RUN: llvm-readelf -s %t | FileCheck --check-prefix=SYM %s
 # RUN: llvm-readelf -S %t | FileCheck --check-prefix=SECTIONS %s
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s

diff  --git a/lld/test/ELF/ppc64-long-branch-pi.s b/lld/test/ELF/ppc64-long-branch-pi.s
index 43919be750a7344..4c8c4cebf274243 100644
--- a/lld/test/ELF/ppc64-long-branch-pi.s
+++ b/lld/test/ELF/ppc64-long-branch-pi.s
@@ -9,7 +9,8 @@
 # RUN: llvm-readobj -r %t | FileCheck --check-prefix=RELOC %s
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
 
-# RUN: ld.lld -shared -T %t.script %t.o -o %t.so
+## RELATIVE relocs relocating NOBITS .branch_lt do not cause --check-dynamic-relocations errors.
+# RUN: ld.lld -shared -T %t.script %t.o -o %t.so --apply-dynamic-relocs --check-dynamic-relocations
 # RUN: llvm-readelf -S %t.so | FileCheck --check-prefix=SEC-SHARED %s
 # RUN: llvm-objdump -d --no-show-raw-insn %t.so | FileCheck %s