[PATCH] D76445: [RISCV][GlobalISel] Select ALU GPR instructions

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/test/CodeGen/RISCV/GlobalISel/alu-roundtrip.ll:36
+; RV64IM:       # %bb.0: # %entry
+; RV64IM-NEXT:    slli a0, a0, 24
+; RV64IM-NEXT:    sraiw a0, a0, 24
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craig.topper wrote:
> nitinjohnraj wrote:
> > I think this should be slliw?
> The upper bits aren’t used by the sraiw so SLLI should be ok
To clarify, the change from slliw to slli was made by the RISCVOptWInstrs pass.


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  https://reviews.llvm.org/D76445/new/

https://reviews.llvm.org/D76445