[llvm] [RISCV] Add searchable table for tune information (PR #66193)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Fri Sep 15 11:17:37 PDT 2023


================
@@ -10,20 +10,36 @@
 // RISC-V processors supported.
 //===----------------------------------------------------------------------===//
 
+class RISCVTuneInfo {
+  bits<8> PrefFunctionAlignment = 1;
+  bits<8> PrefLoopAlignment = 1;
+}
+
+def RISCVTuneInfoTable : GenericTable {
+  let FilterClass = "RISCVTuneInfo";
+  let CppTypeName = "RISCVTuneInfo";
+  let Fields = ["Name", "PrefFunctionAlignment", "PrefLoopAlignment"];
+}
+
+def getRISCVTuneInfo : SearchIndex {
+  let Table = RISCVTuneInfoTable;
+  let Key = ["Name"];
+}
+
 class RISCVProcessorModel<string n,
                           SchedMachineModel m,
                           list<SubtargetFeature> f,
                           list<SubtargetFeature> tunef = [],
                           string default_march = "">
-      :  ProcessorModel<n, m, f, tunef> {
+      :  ProcessorModel<n, m, f, tunef>, RISCVTuneInfo {
----------------
topperc wrote:

What would overriding these for a specific CPU look like right now. Would we need to add `let` for each field to each CPU?

I'd kind of like a way to define common sets that can be used by multiple CPUs without being repeating.

https://github.com/llvm/llvm-project/pull/66193


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