[llvm] [AArch64][GlobalISel] Select llvm.aarch64.neon.st* intrinsics (PR #65491)
Vladislav Dzhidzhoev via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 15 07:35:17 PDT 2023
https://github.com/dzhidzhoev updated https://github.com/llvm/llvm-project/pull/65491
>From 1dca4900fbad7d3dae445f4cb4a869c2c93977d3 Mon Sep 17 00:00:00 2001
From: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
Date: Wed, 9 Aug 2023 12:48:18 +0200
Subject: [PATCH] [AArch64][GlobalISel] Select llvm.aarch64.neon.st* intrinsics
Similar to llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
---
llvm/lib/Target/AArch64/AArch64InstrGISel.td | 45 +
llvm/lib/Target/AArch64/AArch64InstrInfo.td | 6 +-
.../GISel/AArch64InstructionSelector.cpp | 239 +-
.../AArch64/arm64-indexed-vector-ldst.ll | 6017 ++++++++++++++++-
llvm/test/CodeGen/AArch64/arm64-st1.ll | 1 +
5 files changed, 6294 insertions(+), 14 deletions(-)
diff --git a/llvm/lib/Target/AArch64/AArch64InstrGISel.td b/llvm/lib/Target/AArch64/AArch64InstrGISel.td
index f9f860607b5877c..e81add7a8542d59 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrGISel.td
+++ b/llvm/lib/Target/AArch64/AArch64InstrGISel.td
@@ -450,3 +450,48 @@ def : Pat<(i32 (int_aarch64_neon_uminv (v2i32 V64:$Rn))),
(INSERT_SUBREG (v16i8 (IMPLICIT_DEF)),
(UMINPv2i32 V64:$Rn, V64:$Rn), dsub),
ssub))>;
+
+// Match stores from lane 0 to the appropriate subreg's store.
+multiclass VecStoreLane64_0Pat<ComplexPattern UIAddrMode, SDPatternOperator storeop,
+ ValueType VTy, ValueType STy,
+ SubRegIndex SubRegIdx, Operand IndexType,
+ Instruction STR> {
+ def : Pat<(storeop (STy (vector_extract (VTy VecListOne64:$Vt), (i64 0))),
+ (UIAddrMode GPR64sp:$Rn, IndexType:$offset)),
+ (STR (EXTRACT_SUBREG VecListOne64:$Vt, SubRegIdx),
+ GPR64sp:$Rn, IndexType:$offset)>;
+}
+multiclass VecStoreULane64_0Pat<SDPatternOperator StoreOp,
+ ValueType VTy, ValueType STy,
+ SubRegIndex SubRegIdx, Instruction STR> {
+ defm : VecStoreLane64_0Pat<am_unscaled64, StoreOp, VTy, STy, SubRegIdx, simm9, STR>;
+}
+
+multiclass VecROStoreLane64_0Pat<ROAddrMode ro, SDPatternOperator storeop,
+ ValueType VecTy, ValueType STy,
+ SubRegIndex SubRegIdx,
+ Instruction STRW, Instruction STRX> {
+
+ def : Pat<(storeop (STy (vector_extract (VecTy VecListOne64:$Vt), (i64 0))),
+ (ro.Wpat GPR64sp:$Rn, GPR32:$Rm, ro.Wext:$extend)),
+ (STRW (EXTRACT_SUBREG VecListOne64:$Vt, SubRegIdx),
+ GPR64sp:$Rn, GPR32:$Rm, ro.Wext:$extend)>;
+
+ def : Pat<(storeop (STy (vector_extract (VecTy VecListOne64:$Vt), (i64 0))),
+ (ro.Xpat GPR64sp:$Rn, GPR64:$Rm, ro.Xext:$extend)),
+ (STRX (EXTRACT_SUBREG VecListOne64:$Vt, SubRegIdx),
+ GPR64sp:$Rn, GPR64:$Rm, ro.Xext:$extend)>;
+}
+
+let AddedComplexity = 19 in {
+ def : St1Lane128Pat<store, VectorIndexB, v16i8, i8, ST1i8>;
+ def : St1Lane64Pat<store, VectorIndexB, v8i8, i8, ST1i8>;
+
+ defm : VecStoreLane64_0Pat<am_indexed16, store, v4i16, i16, hsub, uimm12s2, STRHui>;
+ defm : VecStoreLane64_0Pat<am_indexed32, store, v2i32, i32, ssub, uimm12s4, STRSui>;
+
+ defm : VecStoreULane64_0Pat<store, v4i16, i16, hsub, STURHi>;
+ defm : VecStoreULane64_0Pat<store, v2i32, i32, ssub, STURSi>;
+ defm : VecROStoreLane64_0Pat<ro16, store, v4i16, i16, hsub, STRHroW, STRHroX>;
+ defm : VecROStoreLane64_0Pat<ro32, store, v2i32, i32, ssub, STRSroW, STRSroX>;
+}
diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.td b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
index 82b79cd7232cc90..90655aca77f7de4 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.td
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
@@ -3684,12 +3684,12 @@ multiclass VecROStoreLane0Pat<ROAddrMode ro, SDPatternOperator storeop,
SubRegIndex SubRegIdx,
Instruction STRW, Instruction STRX> {
- def : Pat<(storeop (STy (vector_extract (VecTy VecListOne128:$Vt), 0)),
+ def : Pat<(storeop (STy (vector_extract (VecTy VecListOne128:$Vt), (i64 0))),
(ro.Wpat GPR64sp:$Rn, GPR32:$Rm, ro.Wext:$extend)),
(STRW (SubRegTy (EXTRACT_SUBREG VecListOne128:$Vt, SubRegIdx)),
GPR64sp:$Rn, GPR32:$Rm, ro.Wext:$extend)>;
- def : Pat<(storeop (STy (vector_extract (VecTy VecListOne128:$Vt), 0)),
+ def : Pat<(storeop (STy (vector_extract (VecTy VecListOne128:$Vt), (i64 0))),
(ro.Xpat GPR64sp:$Rn, GPR64:$Rm, ro.Xext:$extend)),
(STRX (SubRegTy (EXTRACT_SUBREG VecListOne128:$Vt, SubRegIdx)),
GPR64sp:$Rn, GPR64:$Rm, ro.Xext:$extend)>;
@@ -3823,7 +3823,7 @@ multiclass VecStoreLane0Pat<ComplexPattern UIAddrMode, SDPatternOperator storeop
ValueType SubRegTy,
SubRegIndex SubRegIdx, Operand IndexType,
Instruction STR> {
- def : Pat<(storeop (STy (vector_extract (VTy VecListOne128:$Vt), 0)),
+ def : Pat<(storeop (STy (vector_extract (VTy VecListOne128:$Vt), (i64 0))),
(UIAddrMode GPR64sp:$Rn, IndexType:$offset)),
(STR (SubRegTy (EXTRACT_SUBREG VecListOne128:$Vt, SubRegIdx)),
GPR64sp:$Rn, IndexType:$offset)>;
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
index 89d1b96bdacb28a..141821afa9c5915 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
@@ -194,6 +194,10 @@ class AArch64InstructionSelector : public InstructionSelector {
MachineInstr &I);
bool selectVectorLoadLaneIntrinsic(unsigned Opc, unsigned NumVecs,
MachineInstr &I);
+ void selectVectorStoreIntrinsic(MachineInstr &I, unsigned NumVecs,
+ unsigned Opc);
+ bool selectVectorStoreLaneIntrinsic(MachineInstr &I, unsigned NumVecs,
+ unsigned Opc);
bool selectIntrinsicWithSideEffects(MachineInstr &I,
MachineRegisterInfo &MRI);
bool selectIntrinsic(MachineInstr &I, MachineRegisterInfo &MRI);
@@ -5697,7 +5701,56 @@ bool AArch64InstructionSelector::selectVectorLoadLaneIntrinsic(
!emitNarrowVector(I.getOperand(Idx).getReg(), WideReg, MIB, MRI))
return false;
}
+ return true;
+}
+
+void AArch64InstructionSelector::selectVectorStoreIntrinsic(MachineInstr &I,
+ unsigned NumVecs,
+ unsigned Opc) {
+ MachineRegisterInfo &MRI = I.getParent()->getParent()->getRegInfo();
+ LLT Ty = MRI.getType(I.getOperand(1).getReg());
+ Register Ptr = I.getOperand(1 + NumVecs).getReg();
+
+ SmallVector<Register, 2> Regs(NumVecs);
+ std::transform(I.operands_begin() + 1, I.operands_begin() + 1 + NumVecs,
+ Regs.begin(), [](auto MO) { return MO.getReg(); });
+
+ Register Tuple = Ty.getSizeInBits() == 128 ? createQTuple(Regs, MIB)
+ : createDTuple(Regs, MIB);
+ auto Store = MIB.buildInstr(Opc, {}, {Tuple, Ptr});
+ Store.cloneMemRefs(I);
+ constrainSelectedInstRegOperands(*Store, TII, TRI, RBI);
+}
+
+bool AArch64InstructionSelector::selectVectorStoreLaneIntrinsic(
+ MachineInstr &I, unsigned NumVecs, unsigned Opc) {
+ MachineRegisterInfo &MRI = I.getParent()->getParent()->getRegInfo();
+ LLT Ty = MRI.getType(I.getOperand(1).getReg());
+ bool Narrow = Ty.getSizeInBits() == 64;
+
+ SmallVector<Register, 2> Regs(NumVecs);
+ std::transform(I.operands_begin() + 1, I.operands_begin() + 1 + NumVecs,
+ Regs.begin(), [](auto MO) { return MO.getReg(); });
+
+ if (Narrow)
+ transform(Regs, Regs.begin(), [this](Register Reg) {
+ return emitScalarToVector(64, &AArch64::FPR128RegClass, Reg, MIB)
+ ->getOperand(0)
+ .getReg();
+ });
+ Register Tuple = createQTuple(Regs, MIB);
+
+ auto LaneNo = getIConstantVRegVal(I.getOperand(1 + NumVecs).getReg(), MRI);
+ if (!LaneNo)
+ return false;
+ Register Ptr = I.getOperand(1 + NumVecs + 1).getReg();
+ auto Store = MIB.buildInstr(Opc, {}, {})
+ .addReg(Tuple)
+ .addImm(LaneNo->getZExtValue())
+ .addReg(Ptr);
+ Store.cloneMemRefs(I);
+ constrainSelectedInstRegOperands(*Store, TII, TRI, RBI);
return true;
}
@@ -6005,11 +6058,80 @@ bool AArch64InstructionSelector::selectIntrinsicWithSideEffects(
selectVectorLoadIntrinsic(Opc, 4, I);
break;
}
+ case Intrinsic::aarch64_neon_st1x2: {
+ LLT Ty = MRI.getType(I.getOperand(1).getReg());
+ unsigned Opc;
+ if (Ty == LLT::fixed_vector(8, S8))
+ Opc = AArch64::ST1Twov8b;
+ else if (Ty == LLT::fixed_vector(16, S8))
+ Opc = AArch64::ST1Twov16b;
+ else if (Ty == LLT::fixed_vector(4, S16))
+ Opc = AArch64::ST1Twov4h;
+ else if (Ty == LLT::fixed_vector(8, S16))
+ Opc = AArch64::ST1Twov8h;
+ else if (Ty == LLT::fixed_vector(2, S32))
+ Opc = AArch64::ST1Twov2s;
+ else if (Ty == LLT::fixed_vector(4, S32))
+ Opc = AArch64::ST1Twov4s;
+ else if (Ty == LLT::fixed_vector(2, S64) || Ty == LLT::fixed_vector(2, P0))
+ Opc = AArch64::ST1Twov2d;
+ else if (Ty == S64 || Ty == P0)
+ Opc = AArch64::ST1Twov1d;
+ else
+ llvm_unreachable("Unexpected type for st1x2!");
+ selectVectorStoreIntrinsic(I, 2, Opc);
+ break;
+ }
+ case Intrinsic::aarch64_neon_st1x3: {
+ LLT Ty = MRI.getType(I.getOperand(1).getReg());
+ unsigned Opc;
+ if (Ty == LLT::fixed_vector(8, S8))
+ Opc = AArch64::ST1Threev8b;
+ else if (Ty == LLT::fixed_vector(16, S8))
+ Opc = AArch64::ST1Threev16b;
+ else if (Ty == LLT::fixed_vector(4, S16))
+ Opc = AArch64::ST1Threev4h;
+ else if (Ty == LLT::fixed_vector(8, S16))
+ Opc = AArch64::ST1Threev8h;
+ else if (Ty == LLT::fixed_vector(2, S32))
+ Opc = AArch64::ST1Threev2s;
+ else if (Ty == LLT::fixed_vector(4, S32))
+ Opc = AArch64::ST1Threev4s;
+ else if (Ty == LLT::fixed_vector(2, S64) || Ty == LLT::fixed_vector(2, P0))
+ Opc = AArch64::ST1Threev2d;
+ else if (Ty == S64 || Ty == P0)
+ Opc = AArch64::ST1Threev1d;
+ else
+ llvm_unreachable("Unexpected type for st1x3!");
+ selectVectorStoreIntrinsic(I, 3, Opc);
+ break;
+ }
+ case Intrinsic::aarch64_neon_st1x4: {
+ LLT Ty = MRI.getType(I.getOperand(1).getReg());
+ unsigned Opc;
+ if (Ty == LLT::fixed_vector(8, S8))
+ Opc = AArch64::ST1Fourv8b;
+ else if (Ty == LLT::fixed_vector(16, S8))
+ Opc = AArch64::ST1Fourv16b;
+ else if (Ty == LLT::fixed_vector(4, S16))
+ Opc = AArch64::ST1Fourv4h;
+ else if (Ty == LLT::fixed_vector(8, S16))
+ Opc = AArch64::ST1Fourv8h;
+ else if (Ty == LLT::fixed_vector(2, S32))
+ Opc = AArch64::ST1Fourv2s;
+ else if (Ty == LLT::fixed_vector(4, S32))
+ Opc = AArch64::ST1Fourv4s;
+ else if (Ty == LLT::fixed_vector(2, S64) || Ty == LLT::fixed_vector(2, P0))
+ Opc = AArch64::ST1Fourv2d;
+ else if (Ty == S64 || Ty == P0)
+ Opc = AArch64::ST1Fourv1d;
+ else
+ llvm_unreachable("Unexpected type for st1x4!");
+ selectVectorStoreIntrinsic(I, 4, Opc);
+ break;
+ }
case Intrinsic::aarch64_neon_st2: {
- Register Src1 = I.getOperand(1).getReg();
- Register Src2 = I.getOperand(2).getReg();
- Register Ptr = I.getOperand(3).getReg();
- LLT Ty = MRI.getType(Src1);
+ LLT Ty = MRI.getType(I.getOperand(1).getReg());
unsigned Opc;
if (Ty == LLT::fixed_vector(8, S8))
Opc = AArch64::ST2Twov8b;
@@ -6029,12 +6151,109 @@ bool AArch64InstructionSelector::selectIntrinsicWithSideEffects(
Opc = AArch64::ST1Twov1d;
else
llvm_unreachable("Unexpected type for st2!");
- SmallVector<Register, 2> Regs = {Src1, Src2};
- Register Tuple = Ty.getSizeInBits() == 128 ? createQTuple(Regs, MIB)
- : createDTuple(Regs, MIB);
- auto Store = MIB.buildInstr(Opc, {}, {Tuple, Ptr});
- Store.cloneMemRefs(I);
- constrainSelectedInstRegOperands(*Store, TII, TRI, RBI);
+ selectVectorStoreIntrinsic(I, 2, Opc);
+ break;
+ }
+ case Intrinsic::aarch64_neon_st3: {
+ LLT Ty = MRI.getType(I.getOperand(1).getReg());
+ unsigned Opc;
+ if (Ty == LLT::fixed_vector(8, S8))
+ Opc = AArch64::ST3Threev8b;
+ else if (Ty == LLT::fixed_vector(16, S8))
+ Opc = AArch64::ST3Threev16b;
+ else if (Ty == LLT::fixed_vector(4, S16))
+ Opc = AArch64::ST3Threev4h;
+ else if (Ty == LLT::fixed_vector(8, S16))
+ Opc = AArch64::ST3Threev8h;
+ else if (Ty == LLT::fixed_vector(2, S32))
+ Opc = AArch64::ST3Threev2s;
+ else if (Ty == LLT::fixed_vector(4, S32))
+ Opc = AArch64::ST3Threev4s;
+ else if (Ty == LLT::fixed_vector(2, S64) || Ty == LLT::fixed_vector(2, P0))
+ Opc = AArch64::ST3Threev2d;
+ else if (Ty == S64 || Ty == P0)
+ Opc = AArch64::ST1Threev1d;
+ else
+ llvm_unreachable("Unexpected type for st3!");
+ selectVectorStoreIntrinsic(I, 3, Opc);
+ break;
+ }
+ case Intrinsic::aarch64_neon_st4: {
+ LLT Ty = MRI.getType(I.getOperand(1).getReg());
+ unsigned Opc;
+ if (Ty == LLT::fixed_vector(8, S8))
+ Opc = AArch64::ST4Fourv8b;
+ else if (Ty == LLT::fixed_vector(16, S8))
+ Opc = AArch64::ST4Fourv16b;
+ else if (Ty == LLT::fixed_vector(4, S16))
+ Opc = AArch64::ST4Fourv4h;
+ else if (Ty == LLT::fixed_vector(8, S16))
+ Opc = AArch64::ST4Fourv8h;
+ else if (Ty == LLT::fixed_vector(2, S32))
+ Opc = AArch64::ST4Fourv2s;
+ else if (Ty == LLT::fixed_vector(4, S32))
+ Opc = AArch64::ST4Fourv4s;
+ else if (Ty == LLT::fixed_vector(2, S64) || Ty == LLT::fixed_vector(2, P0))
+ Opc = AArch64::ST4Fourv2d;
+ else if (Ty == S64 || Ty == P0)
+ Opc = AArch64::ST1Fourv1d;
+ else
+ llvm_unreachable("Unexpected type for st4!");
+ selectVectorStoreIntrinsic(I, 4, Opc);
+ break;
+ }
+ case Intrinsic::aarch64_neon_st2lane: {
+ LLT Ty = MRI.getType(I.getOperand(1).getReg());
+ unsigned Opc;
+ if (Ty == LLT::fixed_vector(8, S8) || Ty == LLT::fixed_vector(16, S8))
+ Opc = AArch64::ST2i8;
+ else if (Ty == LLT::fixed_vector(4, S16) || Ty == LLT::fixed_vector(8, S16))
+ Opc = AArch64::ST2i16;
+ else if (Ty == LLT::fixed_vector(2, S32) || Ty == LLT::fixed_vector(4, S32))
+ Opc = AArch64::ST2i32;
+ else if (Ty == LLT::fixed_vector(2, S64) ||
+ Ty == LLT::fixed_vector(2, P0) || Ty == S64 || Ty == P0)
+ Opc = AArch64::ST2i64;
+ else
+ llvm_unreachable("Unexpected type for st2lane!");
+ if (!selectVectorStoreLaneIntrinsic(I, 2, Opc))
+ return false;
+ break;
+ }
+ case Intrinsic::aarch64_neon_st3lane: {
+ LLT Ty = MRI.getType(I.getOperand(1).getReg());
+ unsigned Opc;
+ if (Ty == LLT::fixed_vector(8, S8) || Ty == LLT::fixed_vector(16, S8))
+ Opc = AArch64::ST3i8;
+ else if (Ty == LLT::fixed_vector(4, S16) || Ty == LLT::fixed_vector(8, S16))
+ Opc = AArch64::ST3i16;
+ else if (Ty == LLT::fixed_vector(2, S32) || Ty == LLT::fixed_vector(4, S32))
+ Opc = AArch64::ST3i32;
+ else if (Ty == LLT::fixed_vector(2, S64) ||
+ Ty == LLT::fixed_vector(2, P0) || Ty == S64 || Ty == P0)
+ Opc = AArch64::ST3i64;
+ else
+ llvm_unreachable("Unexpected type for st3lane!");
+ if (!selectVectorStoreLaneIntrinsic(I, 3, Opc))
+ return false;
+ break;
+ }
+ case Intrinsic::aarch64_neon_st4lane: {
+ LLT Ty = MRI.getType(I.getOperand(1).getReg());
+ unsigned Opc;
+ if (Ty == LLT::fixed_vector(8, S8) || Ty == LLT::fixed_vector(16, S8))
+ Opc = AArch64::ST4i8;
+ else if (Ty == LLT::fixed_vector(4, S16) || Ty == LLT::fixed_vector(8, S16))
+ Opc = AArch64::ST4i16;
+ else if (Ty == LLT::fixed_vector(2, S32) || Ty == LLT::fixed_vector(4, S32))
+ Opc = AArch64::ST4i32;
+ else if (Ty == LLT::fixed_vector(2, S64) ||
+ Ty == LLT::fixed_vector(2, P0) || Ty == S64 || Ty == P0)
+ Opc = AArch64::ST4i64;
+ else
+ llvm_unreachable("Unexpected type for st4lane!");
+ if (!selectVectorStoreLaneIntrinsic(I, 4, Opc))
+ return false;
break;
}
case Intrinsic::aarch64_mops_memset_tag: {
diff --git a/llvm/test/CodeGen/AArch64/arm64-indexed-vector-ldst.ll b/llvm/test/CodeGen/AArch64/arm64-indexed-vector-ldst.ll
index 5ac8ad55906432d..6657b19d24929d8 100644
--- a/llvm/test/CodeGen/AArch64/arm64-indexed-vector-ldst.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-indexed-vector-ldst.ll
@@ -1,5 +1,630 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=arm64-apple-ios7.0 -o - %s | FileCheck %s
+; RUN: llc -mtriple=arm64-apple-ios7.0 -o - %s | FileCheck %s --check-prefix=CHECK
+; RUN: llc -global-isel=1 -global-isel-abort=2 -mtriple=arm64-apple-ios7.0 -o - %s | FileCheck %s --check-prefix=CHECK-GISEL
+
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_pre_load
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_load
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_pre_store
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_store
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_pre_load
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_load
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_pre_store
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_store
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_pre_load
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_load
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_pre_store
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_store
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_pre_load
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_load
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_pre_store
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_store
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_pre_load
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_load
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_pre_store
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_store
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_pre_load
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_load
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_pre_store
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_store
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_pre_load
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_load
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_pre_store
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_store
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_pre_load
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_load
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_pre_store
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_store
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_pre_load
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_load
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_pre_store
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_store
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_pre_load
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_load
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_pre_store
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_store
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_pre_load
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_load
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_pre_store
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_store
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_st1_lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_st1_lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_st1_lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_st1_lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_st1_lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_st1_lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_st1_lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_st1_lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_st1_lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_st1_lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_st1_lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_st1_lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_st1_lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_st1_lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_st1_lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_st1_lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_st1_lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_st1_lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_st1_lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_st1_lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_ld2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_ld2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_ld2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_ld2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_ld2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_ld2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_ld2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_ld2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_ld2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_ld2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_ld2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_ld2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_ld2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_ld2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_ld2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_ld2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_ld2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_ld2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_ld2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_ld2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_ld2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_ld2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_ld2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_ld2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_ld3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_ld3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_ld3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_ld3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_ld3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_ld3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_ld3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_ld3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_ld3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_ld3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_ld3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_ld3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_ld3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_ld3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_ld3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_ld3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_ld3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_ld3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_ld3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_ld3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_ld3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_ld3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_ld3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_ld3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_ld4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_ld4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_ld4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_ld4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_ld4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_ld4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_ld4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_ld4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_ld4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_ld4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_ld4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_ld4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_ld4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_ld4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_ld4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_ld4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_ld4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_ld4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_ld4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_ld4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_ld4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_ld4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_ld4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_ld4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_ld1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_ld1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_ld1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_ld1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_ld1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_ld1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_ld1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_ld1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_ld1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_ld1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_ld1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_ld1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_ld1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_ld1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_ld1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_ld1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_ld1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_ld1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_ld1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_ld1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_ld1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_ld1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_ld1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_ld1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_ld1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_ld1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_ld1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_ld1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_ld1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_ld1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_ld1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_ld1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_ld1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_ld1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_ld1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_ld1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_ld1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_ld1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_ld1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_ld1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_ld1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_ld1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_ld1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_ld1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_ld1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_ld1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_ld1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_ld1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_ld1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_ld1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_ld1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_ld1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_ld1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_ld1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_ld1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_ld1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_ld1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_ld1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_ld1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_ld1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_ld1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_ld1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_ld1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_ld1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_ld1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_ld1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_ld1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_ld1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_ld1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_ld1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_ld1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_ld1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_ld2r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_ld2r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_ld2r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_ld2r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_ld2r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_ld2r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_ld2r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_ld2r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_ld2r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_ld2r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_ld2r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_ld2r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_ld2r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_ld2r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_ld2r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_ld2r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_ld2r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_ld2r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_ld2r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_ld2r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_ld2r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_ld2r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_ld2r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_ld2r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_ld3r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_ld3r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_ld3r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_ld3r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_ld3r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_ld3r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_ld3r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_ld3r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_ld3r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_ld3r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_ld3r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_ld3r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_ld3r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_ld3r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_ld3r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_ld3r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_ld3r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_ld3r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_ld3r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_ld3r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_ld3r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_ld3r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_ld3r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_ld3r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_ld4r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_ld4r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_ld4r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_ld4r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_ld4r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_ld4r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_ld4r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_ld4r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_ld4r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_ld4r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_ld4r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_ld4r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_ld4r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_ld4r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_ld4r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_ld4r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_ld4r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_ld4r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_ld4r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_ld4r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_ld4r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_ld4r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_ld4r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_ld4r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_ld2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_ld2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_ld2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_ld2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_ld2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_ld2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_ld2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_ld2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_ld2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_ld2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_ld2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_ld2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_ld2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_ld2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_ld2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_ld2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_ld2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_ld2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_ld2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_ld2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_ld2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_ld2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_ld2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_ld2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_ld3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_ld3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_ld3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_ld3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_ld3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_ld3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_ld3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_ld3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_ld3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_ld3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_ld3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_ld3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_ld3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_ld3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_ld3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_ld3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_ld3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_ld3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_ld3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_ld3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_ld3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_ld3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_ld3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_ld3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_ld4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_ld4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_ld4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_ld4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_ld4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_ld4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_ld4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_ld4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_ld4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_ld4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_ld4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_ld4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_ld4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_ld4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_ld4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_ld4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_ld4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_ld4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_ld4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_ld4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_ld4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_ld4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_ld4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_ld4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_st2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_st2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_st2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_st2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_st2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_st2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_st2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_st2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_st2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_st2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_st2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_st2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_st2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_st2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_st2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_st2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_st2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_st2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_st2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_st2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_st2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_st2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_st2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_st2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_st3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_st3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_st3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_st3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_st3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_st3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_st3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_st3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_st3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_st3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_st3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_st3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_st3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_st3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_st3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_st3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_st3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_st3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_st3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_st3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_st3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_st3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_st3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_st3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_st4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_st4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_st4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_st4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_st4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_st4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_st4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_st4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_st4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_st4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_st4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_st4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_st4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_st4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_st4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_st4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_st4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_st4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_st4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_st4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_st4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_st4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_st4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_st4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_st1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_st1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_st1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_st1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_st1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_st1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_st1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_st1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_st1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_st1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_st1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_st1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_st1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_st1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_st1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_st1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_st1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_st1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_st1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_st1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_st1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_st1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_st1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_st1x2
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_st1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_st1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_st1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_st1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_st1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_st1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_st1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_st1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_st1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_st1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_st1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_st1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_st1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_st1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_st1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_st1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_st1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_st1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_st1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_st1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_st1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_st1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_st1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_st1x3
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_st1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_st1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_st1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_st1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_st1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_st1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_st1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_st1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_st1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_st1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_st1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_st1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_st1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_st1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_st1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_st1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_st1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_st1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_st1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_st1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_st1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_st1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_st1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_st1x4
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_st2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_st2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_st2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_st2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_st2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_st2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_st2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_st2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_st2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_st2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_st2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_st2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_st2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_st2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_st2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_st2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_st2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_st2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_st2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_st2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_st2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_st2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_st2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_st2lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_st3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_st3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_st3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_st3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_st3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_st3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_st3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_st3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_st3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_st3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_st3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_st3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_st3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_st3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_st3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_st3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_st3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_st3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_st3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_st3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_st3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_st3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_st3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_st3lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_st4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_st4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_st4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_st4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_st4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_st4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_st4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_st4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_st4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_st4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_st4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_st4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_st4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_st4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_st4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_st4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_st4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_st4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_st4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_st4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_st4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_st4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_st4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_st4lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_ld1r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_ld1r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_ld1r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_ld1r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_ld1r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_ld1r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_ld1r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_ld1r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_ld1r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_ld1r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_ld1r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_ld1r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_ld1r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_ld1r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_ld1r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_ld1r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_ld1r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_ld1r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_ld1r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_ld1r
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_ld1lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_ld1lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_ld1lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_ld1lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_ld1lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_ld1lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_ld1lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_ld1lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_ld1lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_ld1lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_ld1lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_ld1lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_ld1lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_ld1lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_ld1lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_ld1lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_ld1lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_ld1lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_ld1lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_ld1lane
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_ld1lane_dep_vec_on_load
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_ld1lane_forced_narrow
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_ld1lane_build
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_ld1lane_build_i16
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_ld1lane_build_half
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_ld1lane_build_i8
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_inc_cycle
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for load_single_extract_variable_index_i8
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for load_single_extract_variable_index_i16
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for load_single_extract_variable_index_i32
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for load_single_extract_variable_index_v3i32_small_align
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for load_single_extract_variable_index_v3i32_default_align
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for load_single_extract_valid_const_index_v3i32
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for load_single_extract_variable_index_masked_i32
+; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for load_single_extract_variable_index_masked2_i32
@ptr = global ptr null
@@ -10,6 +635,14 @@ define <8 x i8> @test_v8i8_pre_load(ptr %addr) {
; CHECK-NEXT: adrp x8, _ptr at PAGE
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_pre_load:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr d0, [x0, #40]
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #40
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <8 x i8>, ptr %addr, i32 5
%val = load <8 x i8>, ptr %newaddr, align 8
store ptr %newaddr, ptr @ptr
@@ -23,6 +656,14 @@ define <8 x i8> @test_v8i8_post_load(ptr %addr) {
; CHECK-NEXT: adrp x8, _ptr at PAGE
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_load:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr d0, [x0]
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #40
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <8 x i8>, ptr %addr, i32 5
%val = load <8 x i8>, ptr %addr, align 8
store ptr %newaddr, ptr @ptr
@@ -36,6 +677,14 @@ define void @test_v8i8_pre_store(<8 x i8> %in, ptr %addr) {
; CHECK-NEXT: str d0, [x0, #40]!
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_pre_store:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #40
+; CHECK-GISEL-NEXT: str d0, [x0, #40]
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <8 x i8>, ptr %addr, i32 5
store <8 x i8> %in, ptr %newaddr, align 8
store ptr %newaddr, ptr @ptr
@@ -49,6 +698,14 @@ define void @test_v8i8_post_store(<8 x i8> %in, ptr %addr) {
; CHECK-NEXT: str d0, [x0], #40
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_store:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #40
+; CHECK-GISEL-NEXT: str d0, [x0]
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <8 x i8>, ptr %addr, i32 5
store <8 x i8> %in, ptr %addr, align 8
store ptr %newaddr, ptr @ptr
@@ -62,6 +719,14 @@ define <4 x i16> @test_v4i16_pre_load(ptr %addr) {
; CHECK-NEXT: adrp x8, _ptr at PAGE
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_pre_load:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr d0, [x0, #40]
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #40
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <4 x i16>, ptr %addr, i32 5
%val = load <4 x i16>, ptr %newaddr, align 8
store ptr %newaddr, ptr @ptr
@@ -75,6 +740,14 @@ define <4 x i16> @test_v4i16_post_load(ptr %addr) {
; CHECK-NEXT: adrp x8, _ptr at PAGE
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_load:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr d0, [x0]
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #40
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <4 x i16>, ptr %addr, i32 5
%val = load <4 x i16>, ptr %addr, align 8
store ptr %newaddr, ptr @ptr
@@ -88,6 +761,14 @@ define void @test_v4i16_pre_store(<4 x i16> %in, ptr %addr) {
; CHECK-NEXT: str d0, [x0, #40]!
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_pre_store:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #40
+; CHECK-GISEL-NEXT: str d0, [x0, #40]
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <4 x i16>, ptr %addr, i32 5
store <4 x i16> %in, ptr %newaddr, align 8
store ptr %newaddr, ptr @ptr
@@ -101,6 +782,14 @@ define void @test_v4i16_post_store(<4 x i16> %in, ptr %addr) {
; CHECK-NEXT: str d0, [x0], #40
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_store:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #40
+; CHECK-GISEL-NEXT: str d0, [x0]
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <4 x i16>, ptr %addr, i32 5
store <4 x i16> %in, ptr %addr, align 8
store ptr %newaddr, ptr @ptr
@@ -114,6 +803,14 @@ define <2 x i32> @test_v2i32_pre_load(ptr %addr) {
; CHECK-NEXT: adrp x8, _ptr at PAGE
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_pre_load:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr d0, [x0, #40]
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #40
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <2 x i32>, ptr %addr, i32 5
%val = load <2 x i32>, ptr %newaddr, align 8
store ptr %newaddr, ptr @ptr
@@ -127,6 +824,14 @@ define <2 x i32> @test_v2i32_post_load(ptr %addr) {
; CHECK-NEXT: adrp x8, _ptr at PAGE
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_load:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr d0, [x0]
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #40
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <2 x i32>, ptr %addr, i32 5
%val = load <2 x i32>, ptr %addr, align 8
store ptr %newaddr, ptr @ptr
@@ -140,6 +845,14 @@ define void @test_v2i32_pre_store(<2 x i32> %in, ptr %addr) {
; CHECK-NEXT: str d0, [x0, #40]!
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_pre_store:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #40
+; CHECK-GISEL-NEXT: str d0, [x0, #40]
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <2 x i32>, ptr %addr, i32 5
store <2 x i32> %in, ptr %newaddr, align 8
store ptr %newaddr, ptr @ptr
@@ -153,6 +866,14 @@ define void @test_v2i32_post_store(<2 x i32> %in, ptr %addr) {
; CHECK-NEXT: str d0, [x0], #40
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_store:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #40
+; CHECK-GISEL-NEXT: str d0, [x0]
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <2 x i32>, ptr %addr, i32 5
store <2 x i32> %in, ptr %addr, align 8
store ptr %newaddr, ptr @ptr
@@ -166,6 +887,14 @@ define <2 x float> @test_v2f32_pre_load(ptr %addr) {
; CHECK-NEXT: adrp x8, _ptr at PAGE
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_pre_load:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr d0, [x0, #40]
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #40
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <2 x float>, ptr %addr, i32 5
%val = load <2 x float>, ptr %newaddr, align 8
store ptr %newaddr, ptr @ptr
@@ -179,6 +908,14 @@ define <2 x float> @test_v2f32_post_load(ptr %addr) {
; CHECK-NEXT: adrp x8, _ptr at PAGE
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_load:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr d0, [x0]
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #40
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <2 x float>, ptr %addr, i32 5
%val = load <2 x float>, ptr %addr, align 8
store ptr %newaddr, ptr @ptr
@@ -192,6 +929,14 @@ define void @test_v2f32_pre_store(<2 x float> %in, ptr %addr) {
; CHECK-NEXT: str d0, [x0, #40]!
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_pre_store:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #40
+; CHECK-GISEL-NEXT: str d0, [x0, #40]
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <2 x float>, ptr %addr, i32 5
store <2 x float> %in, ptr %newaddr, align 8
store ptr %newaddr, ptr @ptr
@@ -205,6 +950,14 @@ define void @test_v2f32_post_store(<2 x float> %in, ptr %addr) {
; CHECK-NEXT: str d0, [x0], #40
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_store:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #40
+; CHECK-GISEL-NEXT: str d0, [x0]
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <2 x float>, ptr %addr, i32 5
store <2 x float> %in, ptr %addr, align 8
store ptr %newaddr, ptr @ptr
@@ -218,6 +971,14 @@ define <1 x i64> @test_v1i64_pre_load(ptr %addr) {
; CHECK-NEXT: adrp x8, _ptr at PAGE
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_pre_load:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr d0, [x0, #40]
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #40
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <1 x i64>, ptr %addr, i32 5
%val = load <1 x i64>, ptr %newaddr, align 8
store ptr %newaddr, ptr @ptr
@@ -231,6 +992,14 @@ define <1 x i64> @test_v1i64_post_load(ptr %addr) {
; CHECK-NEXT: adrp x8, _ptr at PAGE
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_load:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr d0, [x0]
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #40
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <1 x i64>, ptr %addr, i32 5
%val = load <1 x i64>, ptr %addr, align 8
store ptr %newaddr, ptr @ptr
@@ -244,6 +1013,14 @@ define void @test_v1i64_pre_store(<1 x i64> %in, ptr %addr) {
; CHECK-NEXT: str d0, [x0, #40]!
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_pre_store:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #40
+; CHECK-GISEL-NEXT: str d0, [x0, #40]
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <1 x i64>, ptr %addr, i32 5
store <1 x i64> %in, ptr %newaddr, align 8
store ptr %newaddr, ptr @ptr
@@ -257,6 +1034,14 @@ define void @test_v1i64_post_store(<1 x i64> %in, ptr %addr) {
; CHECK-NEXT: str d0, [x0], #40
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_store:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #40
+; CHECK-GISEL-NEXT: str d0, [x0]
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <1 x i64>, ptr %addr, i32 5
store <1 x i64> %in, ptr %addr, align 8
store ptr %newaddr, ptr @ptr
@@ -270,6 +1055,14 @@ define <16 x i8> @test_v16i8_pre_load(ptr %addr) {
; CHECK-NEXT: adrp x8, _ptr at PAGE
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_pre_load:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr q0, [x0, #80]
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #80
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <16 x i8>, ptr %addr, i32 5
%val = load <16 x i8>, ptr %newaddr, align 8
store ptr %newaddr, ptr @ptr
@@ -283,6 +1076,14 @@ define <16 x i8> @test_v16i8_post_load(ptr %addr) {
; CHECK-NEXT: adrp x8, _ptr at PAGE
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_load:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr q0, [x0]
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #80
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <16 x i8>, ptr %addr, i32 5
%val = load <16 x i8>, ptr %addr, align 8
store ptr %newaddr, ptr @ptr
@@ -296,6 +1097,14 @@ define void @test_v16i8_pre_store(<16 x i8> %in, ptr %addr) {
; CHECK-NEXT: str q0, [x0, #80]!
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_pre_store:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #80
+; CHECK-GISEL-NEXT: str q0, [x0, #80]
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <16 x i8>, ptr %addr, i32 5
store <16 x i8> %in, ptr %newaddr, align 8
store ptr %newaddr, ptr @ptr
@@ -309,6 +1118,14 @@ define void @test_v16i8_post_store(<16 x i8> %in, ptr %addr) {
; CHECK-NEXT: str q0, [x0], #80
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_store:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #80
+; CHECK-GISEL-NEXT: str q0, [x0]
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <16 x i8>, ptr %addr, i32 5
store <16 x i8> %in, ptr %addr, align 8
store ptr %newaddr, ptr @ptr
@@ -322,6 +1139,14 @@ define <8 x i16> @test_v8i16_pre_load(ptr %addr) {
; CHECK-NEXT: adrp x8, _ptr at PAGE
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_pre_load:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr q0, [x0, #80]
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #80
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <8 x i16>, ptr %addr, i32 5
%val = load <8 x i16>, ptr %newaddr, align 8
store ptr %newaddr, ptr @ptr
@@ -335,6 +1160,14 @@ define <8 x i16> @test_v8i16_post_load(ptr %addr) {
; CHECK-NEXT: adrp x8, _ptr at PAGE
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_load:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr q0, [x0]
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #80
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <8 x i16>, ptr %addr, i32 5
%val = load <8 x i16>, ptr %addr, align 8
store ptr %newaddr, ptr @ptr
@@ -348,6 +1181,14 @@ define void @test_v8i16_pre_store(<8 x i16> %in, ptr %addr) {
; CHECK-NEXT: str q0, [x0, #80]!
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_pre_store:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #80
+; CHECK-GISEL-NEXT: str q0, [x0, #80]
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <8 x i16>, ptr %addr, i32 5
store <8 x i16> %in, ptr %newaddr, align 8
store ptr %newaddr, ptr @ptr
@@ -361,6 +1202,14 @@ define void @test_v8i16_post_store(<8 x i16> %in, ptr %addr) {
; CHECK-NEXT: str q0, [x0], #80
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_store:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #80
+; CHECK-GISEL-NEXT: str q0, [x0]
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <8 x i16>, ptr %addr, i32 5
store <8 x i16> %in, ptr %addr, align 8
store ptr %newaddr, ptr @ptr
@@ -374,6 +1223,14 @@ define <4 x i32> @test_v4i32_pre_load(ptr %addr) {
; CHECK-NEXT: adrp x8, _ptr at PAGE
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_pre_load:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr q0, [x0, #80]
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #80
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <4 x i32>, ptr %addr, i32 5
%val = load <4 x i32>, ptr %newaddr, align 8
store ptr %newaddr, ptr @ptr
@@ -387,6 +1244,14 @@ define <4 x i32> @test_v4i32_post_load(ptr %addr) {
; CHECK-NEXT: adrp x8, _ptr at PAGE
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_load:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr q0, [x0]
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #80
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <4 x i32>, ptr %addr, i32 5
%val = load <4 x i32>, ptr %addr, align 8
store ptr %newaddr, ptr @ptr
@@ -400,6 +1265,14 @@ define void @test_v4i32_pre_store(<4 x i32> %in, ptr %addr) {
; CHECK-NEXT: str q0, [x0, #80]!
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_pre_store:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #80
+; CHECK-GISEL-NEXT: str q0, [x0, #80]
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <4 x i32>, ptr %addr, i32 5
store <4 x i32> %in, ptr %newaddr, align 8
store ptr %newaddr, ptr @ptr
@@ -413,6 +1286,14 @@ define void @test_v4i32_post_store(<4 x i32> %in, ptr %addr) {
; CHECK-NEXT: str q0, [x0], #80
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_store:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #80
+; CHECK-GISEL-NEXT: str q0, [x0]
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <4 x i32>, ptr %addr, i32 5
store <4 x i32> %in, ptr %addr, align 8
store ptr %newaddr, ptr @ptr
@@ -427,6 +1308,14 @@ define <4 x float> @test_v4f32_pre_load(ptr %addr) {
; CHECK-NEXT: adrp x8, _ptr at PAGE
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_pre_load:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr q0, [x0, #80]
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #80
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <4 x float>, ptr %addr, i32 5
%val = load <4 x float>, ptr %newaddr, align 8
store ptr %newaddr, ptr @ptr
@@ -440,6 +1329,14 @@ define <4 x float> @test_v4f32_post_load(ptr %addr) {
; CHECK-NEXT: adrp x8, _ptr at PAGE
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_load:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr q0, [x0]
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #80
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <4 x float>, ptr %addr, i32 5
%val = load <4 x float>, ptr %addr, align 8
store ptr %newaddr, ptr @ptr
@@ -453,6 +1350,14 @@ define void @test_v4f32_pre_store(<4 x float> %in, ptr %addr) {
; CHECK-NEXT: str q0, [x0, #80]!
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_pre_store:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #80
+; CHECK-GISEL-NEXT: str q0, [x0, #80]
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <4 x float>, ptr %addr, i32 5
store <4 x float> %in, ptr %newaddr, align 8
store ptr %newaddr, ptr @ptr
@@ -466,6 +1371,14 @@ define void @test_v4f32_post_store(<4 x float> %in, ptr %addr) {
; CHECK-NEXT: str q0, [x0], #80
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_store:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #80
+; CHECK-GISEL-NEXT: str q0, [x0]
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <4 x float>, ptr %addr, i32 5
store <4 x float> %in, ptr %addr, align 8
store ptr %newaddr, ptr @ptr
@@ -480,6 +1393,14 @@ define <2 x i64> @test_v2i64_pre_load(ptr %addr) {
; CHECK-NEXT: adrp x8, _ptr at PAGE
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_pre_load:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr q0, [x0, #80]
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #80
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <2 x i64>, ptr %addr, i32 5
%val = load <2 x i64>, ptr %newaddr, align 8
store ptr %newaddr, ptr @ptr
@@ -493,6 +1414,14 @@ define <2 x i64> @test_v2i64_post_load(ptr %addr) {
; CHECK-NEXT: adrp x8, _ptr at PAGE
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_load:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr q0, [x0]
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #80
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <2 x i64>, ptr %addr, i32 5
%val = load <2 x i64>, ptr %addr, align 8
store ptr %newaddr, ptr @ptr
@@ -506,6 +1435,14 @@ define void @test_v2i64_pre_store(<2 x i64> %in, ptr %addr) {
; CHECK-NEXT: str q0, [x0, #80]!
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_pre_store:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #80
+; CHECK-GISEL-NEXT: str q0, [x0, #80]
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <2 x i64>, ptr %addr, i32 5
store <2 x i64> %in, ptr %newaddr, align 8
store ptr %newaddr, ptr @ptr
@@ -519,6 +1456,14 @@ define void @test_v2i64_post_store(<2 x i64> %in, ptr %addr) {
; CHECK-NEXT: str q0, [x0], #80
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_store:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #80
+; CHECK-GISEL-NEXT: str q0, [x0]
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <2 x i64>, ptr %addr, i32 5
store <2 x i64> %in, ptr %addr, align 8
store ptr %newaddr, ptr @ptr
@@ -533,6 +1478,14 @@ define <2 x double> @test_v2f64_pre_load(ptr %addr) {
; CHECK-NEXT: adrp x8, _ptr at PAGE
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_pre_load:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr q0, [x0, #80]
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #80
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <2 x double>, ptr %addr, i32 5
%val = load <2 x double>, ptr %newaddr, align 8
store ptr %newaddr, ptr @ptr
@@ -546,6 +1499,14 @@ define <2 x double> @test_v2f64_post_load(ptr %addr) {
; CHECK-NEXT: adrp x8, _ptr at PAGE
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_load:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr q0, [x0]
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #80
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <2 x double>, ptr %addr, i32 5
%val = load <2 x double>, ptr %addr, align 8
store ptr %newaddr, ptr @ptr
@@ -559,6 +1520,14 @@ define void @test_v2f64_pre_store(<2 x double> %in, ptr %addr) {
; CHECK-NEXT: str q0, [x0, #80]!
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_pre_store:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #80
+; CHECK-GISEL-NEXT: str q0, [x0, #80]
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <2 x double>, ptr %addr, i32 5
store <2 x double> %in, ptr %newaddr, align 8
store ptr %newaddr, ptr @ptr
@@ -572,6 +1541,14 @@ define void @test_v2f64_post_store(<2 x double> %in, ptr %addr) {
; CHECK-NEXT: str q0, [x0], #80
; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_store:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: adrp x8, _ptr at PAGE
+; CHECK-GISEL-NEXT: add x9, x0, #80
+; CHECK-GISEL-NEXT: str q0, [x0]
+; CHECK-GISEL-NEXT: str x9, [x8, _ptr at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%newaddr = getelementptr <2 x double>, ptr %addr, i32 5
store <2 x double> %in, ptr %addr, align 8
store ptr %newaddr, ptr @ptr
@@ -583,6 +1560,13 @@ define ptr @test_v16i8_post_imm_st1_lane(<16 x i8> %in, ptr %addr) {
; CHECK: ; %bb.0:
; CHECK-NEXT: st1.b { v0 }[3], [x0], #1
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_imm_st1_lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #1
+; CHECK-GISEL-NEXT: st1.b { v0 }[3], [x8]
+; CHECK-GISEL-NEXT: ret
%elt = extractelement <16 x i8> %in, i32 3
store i8 %elt, ptr %addr
@@ -596,6 +1580,13 @@ define ptr @test_v16i8_post_reg_st1_lane(<16 x i8> %in, ptr %addr) {
; CHECK-NEXT: mov w8, #2 ; =0x2
; CHECK-NEXT: st1.b { v0 }[3], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_reg_st1_lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #2
+; CHECK-GISEL-NEXT: st1.b { v0 }[3], [x8]
+; CHECK-GISEL-NEXT: ret
%elt = extractelement <16 x i8> %in, i32 3
store i8 %elt, ptr %addr
@@ -609,6 +1600,13 @@ define ptr @test_v8i16_post_imm_st1_lane(<8 x i16> %in, ptr %addr) {
; CHECK: ; %bb.0:
; CHECK-NEXT: st1.h { v0 }[3], [x0], #2
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_imm_st1_lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #2
+; CHECK-GISEL-NEXT: st1.h { v0 }[3], [x8]
+; CHECK-GISEL-NEXT: ret
%elt = extractelement <8 x i16> %in, i32 3
store i16 %elt, ptr %addr
@@ -622,6 +1620,13 @@ define ptr @test_v8i16_post_reg_st1_lane(<8 x i16> %in, ptr %addr) {
; CHECK-NEXT: mov w8, #4 ; =0x4
; CHECK-NEXT: st1.h { v0 }[3], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_reg_st1_lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #4
+; CHECK-GISEL-NEXT: st1.h { v0 }[3], [x8]
+; CHECK-GISEL-NEXT: ret
%elt = extractelement <8 x i16> %in, i32 3
store i16 %elt, ptr %addr
@@ -634,6 +1639,13 @@ define ptr @test_v4i32_post_imm_st1_lane(<4 x i32> %in, ptr %addr) {
; CHECK: ; %bb.0:
; CHECK-NEXT: st1.s { v0 }[3], [x0], #4
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_imm_st1_lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #4
+; CHECK-GISEL-NEXT: st1.s { v0 }[3], [x8]
+; CHECK-GISEL-NEXT: ret
%elt = extractelement <4 x i32> %in, i32 3
store i32 %elt, ptr %addr
@@ -647,6 +1659,13 @@ define ptr @test_v4i32_post_reg_st1_lane(<4 x i32> %in, ptr %addr) {
; CHECK-NEXT: mov w8, #8 ; =0x8
; CHECK-NEXT: st1.s { v0 }[3], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_reg_st1_lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #8
+; CHECK-GISEL-NEXT: st1.s { v0 }[3], [x8]
+; CHECK-GISEL-NEXT: ret
%elt = extractelement <4 x i32> %in, i32 3
store i32 %elt, ptr %addr
@@ -659,6 +1678,13 @@ define ptr @test_v4f32_post_imm_st1_lane(<4 x float> %in, ptr %addr) {
; CHECK: ; %bb.0:
; CHECK-NEXT: st1.s { v0 }[3], [x0], #4
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_imm_st1_lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #4
+; CHECK-GISEL-NEXT: st1.s { v0 }[3], [x8]
+; CHECK-GISEL-NEXT: ret
%elt = extractelement <4 x float> %in, i32 3
store float %elt, ptr %addr
@@ -672,6 +1698,13 @@ define ptr @test_v4f32_post_reg_st1_lane(<4 x float> %in, ptr %addr) {
; CHECK-NEXT: mov w8, #8 ; =0x8
; CHECK-NEXT: st1.s { v0 }[3], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_reg_st1_lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #8
+; CHECK-GISEL-NEXT: st1.s { v0 }[3], [x8]
+; CHECK-GISEL-NEXT: ret
%elt = extractelement <4 x float> %in, i32 3
store float %elt, ptr %addr
@@ -684,6 +1717,13 @@ define ptr @test_v2i64_post_imm_st1_lane(<2 x i64> %in, ptr %addr) {
; CHECK: ; %bb.0:
; CHECK-NEXT: st1.d { v0 }[1], [x0], #8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_imm_st1_lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #8
+; CHECK-GISEL-NEXT: st1.d { v0 }[1], [x8]
+; CHECK-GISEL-NEXT: ret
%elt = extractelement <2 x i64> %in, i64 1
store i64 %elt, ptr %addr
@@ -697,6 +1737,13 @@ define ptr @test_v2i64_post_reg_st1_lane(<2 x i64> %in, ptr %addr) {
; CHECK-NEXT: mov w8, #16 ; =0x10
; CHECK-NEXT: st1.d { v0 }[1], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_reg_st1_lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #16
+; CHECK-GISEL-NEXT: st1.d { v0 }[1], [x8]
+; CHECK-GISEL-NEXT: ret
%elt = extractelement <2 x i64> %in, i64 1
store i64 %elt, ptr %addr
@@ -709,6 +1756,13 @@ define ptr @test_v2f64_post_imm_st1_lane(<2 x double> %in, ptr %addr) {
; CHECK: ; %bb.0:
; CHECK-NEXT: st1.d { v0 }[1], [x0], #8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_imm_st1_lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #8
+; CHECK-GISEL-NEXT: st1.d { v0 }[1], [x8]
+; CHECK-GISEL-NEXT: ret
%elt = extractelement <2 x double> %in, i32 1
store double %elt, ptr %addr
@@ -722,6 +1776,13 @@ define ptr @test_v2f64_post_reg_st1_lane(<2 x double> %in, ptr %addr) {
; CHECK-NEXT: mov w8, #16 ; =0x10
; CHECK-NEXT: st1.d { v0 }[1], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_reg_st1_lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #16
+; CHECK-GISEL-NEXT: st1.d { v0 }[1], [x8]
+; CHECK-GISEL-NEXT: ret
%elt = extractelement <2 x double> %in, i32 1
store double %elt, ptr %addr
@@ -735,6 +1796,14 @@ define ptr @test_v8i8_post_imm_st1_lane(<8 x i8> %in, ptr %addr) {
; CHECK-NEXT: ; kill: def $d0 killed $d0 def $q0
; CHECK-NEXT: st1.b { v0 }[3], [x0], #1
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_imm_st1_lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #1
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 def $q0
+; CHECK-GISEL-NEXT: st1.b { v0 }[3], [x8]
+; CHECK-GISEL-NEXT: ret
%elt = extractelement <8 x i8> %in, i32 3
store i8 %elt, ptr %addr
@@ -749,6 +1818,14 @@ define ptr @test_v8i8_post_reg_st1_lane(<8 x i8> %in, ptr %addr) {
; CHECK-NEXT: ; kill: def $d0 killed $d0 def $q0
; CHECK-NEXT: st1.b { v0 }[3], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_reg_st1_lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #2
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 def $q0
+; CHECK-GISEL-NEXT: st1.b { v0 }[3], [x8]
+; CHECK-GISEL-NEXT: ret
%elt = extractelement <8 x i8> %in, i32 3
store i8 %elt, ptr %addr
@@ -762,6 +1839,14 @@ define ptr @test_v4i16_post_imm_st1_lane(<4 x i16> %in, ptr %addr) {
; CHECK-NEXT: ; kill: def $d0 killed $d0 def $q0
; CHECK-NEXT: st1.h { v0 }[3], [x0], #2
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_imm_st1_lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #2
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 def $q0
+; CHECK-GISEL-NEXT: st1.h { v0 }[3], [x8]
+; CHECK-GISEL-NEXT: ret
%elt = extractelement <4 x i16> %in, i32 3
store i16 %elt, ptr %addr
@@ -776,6 +1861,14 @@ define ptr @test_v4i16_post_reg_st1_lane(<4 x i16> %in, ptr %addr) {
; CHECK-NEXT: ; kill: def $d0 killed $d0 def $q0
; CHECK-NEXT: st1.h { v0 }[3], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_reg_st1_lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #4
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 def $q0
+; CHECK-GISEL-NEXT: st1.h { v0 }[3], [x8]
+; CHECK-GISEL-NEXT: ret
%elt = extractelement <4 x i16> %in, i32 3
store i16 %elt, ptr %addr
@@ -789,6 +1882,14 @@ define ptr @test_v2i32_post_imm_st1_lane(<2 x i32> %in, ptr %addr) {
; CHECK-NEXT: ; kill: def $d0 killed $d0 def $q0
; CHECK-NEXT: st1.s { v0 }[1], [x0], #4
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_imm_st1_lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #4
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 def $q0
+; CHECK-GISEL-NEXT: st1.s { v0 }[1], [x8]
+; CHECK-GISEL-NEXT: ret
%elt = extractelement <2 x i32> %in, i32 1
store i32 %elt, ptr %addr
@@ -803,6 +1904,14 @@ define ptr @test_v2i32_post_reg_st1_lane(<2 x i32> %in, ptr %addr) {
; CHECK-NEXT: ; kill: def $d0 killed $d0 def $q0
; CHECK-NEXT: st1.s { v0 }[1], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_reg_st1_lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #8
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 def $q0
+; CHECK-GISEL-NEXT: st1.s { v0 }[1], [x8]
+; CHECK-GISEL-NEXT: ret
%elt = extractelement <2 x i32> %in, i32 1
store i32 %elt, ptr %addr
@@ -816,6 +1925,14 @@ define ptr @test_v2f32_post_imm_st1_lane(<2 x float> %in, ptr %addr) {
; CHECK-NEXT: ; kill: def $d0 killed $d0 def $q0
; CHECK-NEXT: st1.s { v0 }[1], [x0], #4
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_imm_st1_lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #4
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 def $q0
+; CHECK-GISEL-NEXT: st1.s { v0 }[1], [x8]
+; CHECK-GISEL-NEXT: ret
%elt = extractelement <2 x float> %in, i32 1
store float %elt, ptr %addr
@@ -830,6 +1947,14 @@ define ptr @test_v2f32_post_reg_st1_lane(<2 x float> %in, ptr %addr) {
; CHECK-NEXT: ; kill: def $d0 killed $d0 def $q0
; CHECK-NEXT: st1.s { v0 }[1], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_reg_st1_lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #8
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 def $q0
+; CHECK-GISEL-NEXT: st1.s { v0 }[1], [x8]
+; CHECK-GISEL-NEXT: ret
%elt = extractelement <2 x float> %in, i32 1
store float %elt, ptr %addr
@@ -843,6 +1968,13 @@ define { <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld2(ptr %A, ptr %ptr) {
; CHECK-NEXT: ld2.16b { v0, v1 }, [x0], #32
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2.16b { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #32
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = tail call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2.v16i8.p0(ptr %A)
%tmp = getelementptr i8, ptr %A, i32 32
store ptr %tmp, ptr %ptr
@@ -855,6 +1987,13 @@ define { <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld2(ptr %A, ptr %ptr, i64 %
; CHECK-NEXT: ld2.16b { v0, v1 }, [x0], x2
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2.16b { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = tail call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2.v16i8.p0(ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -870,6 +2009,13 @@ define { <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld2(ptr %A, ptr %ptr) {
; CHECK-NEXT: ld2.8b { v0, v1 }, [x0], #16
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2.8b { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #16
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = tail call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2.v8i8.p0(ptr %A)
%tmp = getelementptr i8, ptr %A, i32 16
store ptr %tmp, ptr %ptr
@@ -882,6 +2028,13 @@ define { <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc
; CHECK-NEXT: ld2.8b { v0, v1 }, [x0], x2
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2.8b { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = tail call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2.v8i8.p0(ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -897,6 +2050,13 @@ define { <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld2(ptr %A, ptr %ptr) {
; CHECK-NEXT: ld2.8h { v0, v1 }, [x0], #32
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2.8h { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #32
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = tail call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2.v8i16.p0(ptr %A)
%tmp = getelementptr i16, ptr %A, i32 16
store ptr %tmp, ptr %ptr
@@ -910,6 +2070,13 @@ define { <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld2(ptr %A, ptr %ptr, i64 %
; CHECK-NEXT: ld2.8h { v0, v1 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2.8h { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = tail call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2.v8i16.p0(ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -925,6 +2092,13 @@ define { <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld2(ptr %A, ptr %ptr) {
; CHECK-NEXT: ld2.4h { v0, v1 }, [x0], #16
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2.4h { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #16
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = tail call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2.v4i16.p0(ptr %A)
%tmp = getelementptr i16, ptr %A, i32 8
store ptr %tmp, ptr %ptr
@@ -938,6 +2112,13 @@ define { <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld2(ptr %A, ptr %ptr, i64 %
; CHECK-NEXT: ld2.4h { v0, v1 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2.4h { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = tail call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2.v4i16.p0(ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -953,6 +2134,13 @@ define { <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld2(ptr %A, ptr %ptr) {
; CHECK-NEXT: ld2.4s { v0, v1 }, [x0], #32
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2.4s { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #32
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = tail call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0(ptr %A)
%tmp = getelementptr i32, ptr %A, i32 8
store ptr %tmp, ptr %ptr
@@ -966,6 +2154,13 @@ define { <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld2(ptr %A, ptr %ptr, i64 %
; CHECK-NEXT: ld2.4s { v0, v1 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2.4s { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = tail call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0(ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -981,6 +2176,13 @@ define { <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld2(ptr %A, ptr %ptr) {
; CHECK-NEXT: ld2.2s { v0, v1 }, [x0], #16
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2.2s { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #16
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = tail call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2.v2i32.p0(ptr %A)
%tmp = getelementptr i32, ptr %A, i32 4
store ptr %tmp, ptr %ptr
@@ -994,6 +2196,13 @@ define { <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld2(ptr %A, ptr %ptr, i64 %
; CHECK-NEXT: ld2.2s { v0, v1 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2.2s { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = tail call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2.v2i32.p0(ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -1009,6 +2218,13 @@ define { <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld2(ptr %A, ptr %ptr) {
; CHECK-NEXT: ld2.2d { v0, v1 }, [x0], #32
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2.2d { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #32
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = tail call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2.v2i64.p0(ptr %A)
%tmp = getelementptr i64, ptr %A, i32 4
store ptr %tmp, ptr %ptr
@@ -1022,6 +2238,13 @@ define { <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld2(ptr %A, ptr %ptr, i64 %
; CHECK-NEXT: ld2.2d { v0, v1 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2.2d { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = tail call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2.v2i64.p0(ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -1037,6 +2260,13 @@ define { <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld2(ptr %A, ptr %ptr) {
; CHECK-NEXT: ld1.1d { v0, v1 }, [x0], #16
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_imm_ld2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.1d { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #16
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = tail call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2.v1i64.p0(ptr %A)
%tmp = getelementptr i64, ptr %A, i32 2
store ptr %tmp, ptr %ptr
@@ -1050,6 +2280,13 @@ define { <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld2(ptr %A, ptr %ptr, i64 %
; CHECK-NEXT: ld1.1d { v0, v1 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_reg_ld2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.1d { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = tail call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2.v1i64.p0(ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -1065,6 +2302,13 @@ define { <4 x float>, <4 x float> } @test_v4f32_post_imm_ld2(ptr %A, ptr %ptr) {
; CHECK-NEXT: ld2.4s { v0, v1 }, [x0], #32
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2.4s { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #32
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = tail call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2.v4f32.p0(ptr %A)
%tmp = getelementptr float, ptr %A, i32 8
store ptr %tmp, ptr %ptr
@@ -1078,6 +2322,13 @@ define { <4 x float>, <4 x float> } @test_v4f32_post_reg_ld2(ptr %A, ptr %ptr, i
; CHECK-NEXT: ld2.4s { v0, v1 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2.4s { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = tail call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2.v4f32.p0(ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -1093,6 +2344,13 @@ define { <2 x float>, <2 x float> } @test_v2f32_post_imm_ld2(ptr %A, ptr %ptr) {
; CHECK-NEXT: ld2.2s { v0, v1 }, [x0], #16
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2.2s { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #16
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = tail call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2.v2f32.p0(ptr %A)
%tmp = getelementptr float, ptr %A, i32 4
store ptr %tmp, ptr %ptr
@@ -1106,6 +2364,13 @@ define { <2 x float>, <2 x float> } @test_v2f32_post_reg_ld2(ptr %A, ptr %ptr, i
; CHECK-NEXT: ld2.2s { v0, v1 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2.2s { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = tail call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2.v2f32.p0(ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -1121,6 +2386,13 @@ define { <2 x double>, <2 x double> } @test_v2f64_post_imm_ld2(ptr %A, ptr %ptr)
; CHECK-NEXT: ld2.2d { v0, v1 }, [x0], #32
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2.2d { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #32
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = tail call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2.v2f64.p0(ptr %A)
%tmp = getelementptr double, ptr %A, i32 4
store ptr %tmp, ptr %ptr
@@ -1134,6 +2406,13 @@ define { <2 x double>, <2 x double> } @test_v2f64_post_reg_ld2(ptr %A, ptr %ptr,
; CHECK-NEXT: ld2.2d { v0, v1 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2.2d { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = tail call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2.v2f64.p0(ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -1149,6 +2428,13 @@ define { <1 x double>, <1 x double> } @test_v1f64_post_imm_ld2(ptr %A, ptr %ptr)
; CHECK-NEXT: ld1.1d { v0, v1 }, [x0], #16
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_imm_ld2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.1d { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #16
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = tail call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2.v1f64.p0(ptr %A)
%tmp = getelementptr double, ptr %A, i32 2
store ptr %tmp, ptr %ptr
@@ -1162,6 +2448,13 @@ define { <1 x double>, <1 x double> } @test_v1f64_post_reg_ld2(ptr %A, ptr %ptr,
; CHECK-NEXT: ld1.1d { v0, v1 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_reg_ld2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.1d { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = tail call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2.v1f64.p0(ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -1177,6 +2470,13 @@ define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld3(ptr %A, ptr
; CHECK-NEXT: ld3.16b { v0, v1, v2 }, [x0], #48
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3.16b { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #48
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = tail call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3.v16i8.p0(ptr %A)
%tmp = getelementptr i8, ptr %A, i32 48
store ptr %tmp, ptr %ptr
@@ -1189,6 +2489,13 @@ define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld3(ptr %A, ptr
; CHECK-NEXT: ld3.16b { v0, v1, v2 }, [x0], x2
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3.16b { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = tail call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3.v16i8.p0(ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -1204,6 +2511,13 @@ define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld3(ptr %A, ptr %ptr
; CHECK-NEXT: ld3.8b { v0, v1, v2 }, [x0], #24
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3.8b { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #24
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = tail call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3.v8i8.p0(ptr %A)
%tmp = getelementptr i8, ptr %A, i32 24
store ptr %tmp, ptr %ptr
@@ -1216,6 +2530,13 @@ define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld3(ptr %A, ptr %ptr
; CHECK-NEXT: ld3.8b { v0, v1, v2 }, [x0], x2
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3.8b { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = tail call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3.v8i8.p0(ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -1231,6 +2552,13 @@ define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld3(ptr %A, ptr
; CHECK-NEXT: ld3.8h { v0, v1, v2 }, [x0], #48
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3.8h { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #48
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = tail call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3.v8i16.p0(ptr %A)
%tmp = getelementptr i16, ptr %A, i32 24
store ptr %tmp, ptr %ptr
@@ -1244,6 +2572,13 @@ define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld3(ptr %A, ptr
; CHECK-NEXT: ld3.8h { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3.8h { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = tail call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3.v8i16.p0(ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -1259,6 +2594,13 @@ define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld3(ptr %A, ptr
; CHECK-NEXT: ld3.4h { v0, v1, v2 }, [x0], #24
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3.4h { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #24
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = tail call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3.v4i16.p0(ptr %A)
%tmp = getelementptr i16, ptr %A, i32 12
store ptr %tmp, ptr %ptr
@@ -1272,6 +2614,13 @@ define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld3(ptr %A, ptr
; CHECK-NEXT: ld3.4h { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3.4h { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = tail call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3.v4i16.p0(ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -1287,6 +2636,13 @@ define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld3(ptr %A, ptr
; CHECK-NEXT: ld3.4s { v0, v1, v2 }, [x0], #48
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3.4s { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #48
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = tail call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32.p0(ptr %A)
%tmp = getelementptr i32, ptr %A, i32 12
store ptr %tmp, ptr %ptr
@@ -1300,6 +2656,13 @@ define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld3(ptr %A, ptr
; CHECK-NEXT: ld3.4s { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3.4s { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = tail call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32.p0(ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -1315,6 +2678,13 @@ define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld3(ptr %A, ptr
; CHECK-NEXT: ld3.2s { v0, v1, v2 }, [x0], #24
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3.2s { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #24
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = tail call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3.v2i32.p0(ptr %A)
%tmp = getelementptr i32, ptr %A, i32 6
store ptr %tmp, ptr %ptr
@@ -1328,6 +2698,13 @@ define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld3(ptr %A, ptr
; CHECK-NEXT: ld3.2s { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3.2s { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = tail call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3.v2i32.p0(ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -1343,6 +2720,13 @@ define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld3(ptr %A, ptr
; CHECK-NEXT: ld3.2d { v0, v1, v2 }, [x0], #48
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3.2d { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #48
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = tail call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3.v2i64.p0(ptr %A)
%tmp = getelementptr i64, ptr %A, i32 6
store ptr %tmp, ptr %ptr
@@ -1356,6 +2740,13 @@ define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld3(ptr %A, ptr
; CHECK-NEXT: ld3.2d { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3.2d { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = tail call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3.v2i64.p0(ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -1371,6 +2762,13 @@ define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld3(ptr %A, ptr
; CHECK-NEXT: ld1.1d { v0, v1, v2 }, [x0], #24
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_imm_ld3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.1d { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #24
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = tail call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3.v1i64.p0(ptr %A)
%tmp = getelementptr i64, ptr %A, i32 3
store ptr %tmp, ptr %ptr
@@ -1384,6 +2782,13 @@ define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld3(ptr %A, ptr
; CHECK-NEXT: ld1.1d { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_reg_ld3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.1d { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = tail call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3.v1i64.p0(ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -1399,6 +2804,13 @@ define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld3(ptr %A
; CHECK-NEXT: ld3.4s { v0, v1, v2 }, [x0], #48
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3.4s { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #48
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = tail call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3.v4f32.p0(ptr %A)
%tmp = getelementptr float, ptr %A, i32 12
store ptr %tmp, ptr %ptr
@@ -1412,6 +2824,13 @@ define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_reg_ld3(ptr %A
; CHECK-NEXT: ld3.4s { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3.4s { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = tail call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3.v4f32.p0(ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -1427,6 +2846,13 @@ define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld3(ptr %A
; CHECK-NEXT: ld3.2s { v0, v1, v2 }, [x0], #24
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3.2s { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #24
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = tail call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3.v2f32.p0(ptr %A)
%tmp = getelementptr float, ptr %A, i32 6
store ptr %tmp, ptr %ptr
@@ -1440,6 +2866,13 @@ define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_reg_ld3(ptr %A
; CHECK-NEXT: ld3.2s { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3.2s { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = tail call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3.v2f32.p0(ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -1455,6 +2888,13 @@ define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld3(ptr
; CHECK-NEXT: ld3.2d { v0, v1, v2 }, [x0], #48
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3.2d { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #48
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = tail call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3.v2f64.p0(ptr %A)
%tmp = getelementptr double, ptr %A, i32 6
store ptr %tmp, ptr %ptr
@@ -1468,6 +2908,13 @@ define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_reg_ld3(ptr
; CHECK-NEXT: ld3.2d { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3.2d { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = tail call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3.v2f64.p0(ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -1483,6 +2930,13 @@ define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld3(ptr
; CHECK-NEXT: ld1.1d { v0, v1, v2 }, [x0], #24
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_imm_ld3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.1d { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #24
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = tail call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3.v1f64.p0(ptr %A)
%tmp = getelementptr double, ptr %A, i32 3
store ptr %tmp, ptr %ptr
@@ -1496,6 +2950,13 @@ define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_reg_ld3(ptr
; CHECK-NEXT: ld1.1d { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_reg_ld3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.1d { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = tail call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3.v1f64.p0(ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -1511,6 +2972,13 @@ define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld4(p
; CHECK-NEXT: ld4.16b { v0, v1, v2, v3 }, [x0], #64
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4.16b { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #64
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = tail call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4.v16i8.p0(ptr %A)
%tmp = getelementptr i8, ptr %A, i32 64
store ptr %tmp, ptr %ptr
@@ -1523,6 +2991,13 @@ define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld4(p
; CHECK-NEXT: ld4.16b { v0, v1, v2, v3 }, [x0], x2
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4.16b { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = tail call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4.v16i8.p0(ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -1538,6 +3013,13 @@ define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld4(ptr %A
; CHECK-NEXT: ld4.8b { v0, v1, v2, v3 }, [x0], #32
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4.8b { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #32
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = tail call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4.v8i8.p0(ptr %A)
%tmp = getelementptr i8, ptr %A, i32 32
store ptr %tmp, ptr %ptr
@@ -1550,6 +3032,13 @@ define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld4(ptr %A
; CHECK-NEXT: ld4.8b { v0, v1, v2, v3 }, [x0], x2
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4.8b { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = tail call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4.v8i8.p0(ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -1565,6 +3054,13 @@ define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld4(p
; CHECK-NEXT: ld4.8h { v0, v1, v2, v3 }, [x0], #64
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4.8h { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #64
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = tail call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4.v8i16.p0(ptr %A)
%tmp = getelementptr i16, ptr %A, i32 32
store ptr %tmp, ptr %ptr
@@ -1578,6 +3074,13 @@ define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld4(p
; CHECK-NEXT: ld4.8h { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4.8h { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = tail call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4.v8i16.p0(ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -1593,6 +3096,13 @@ define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld4(p
; CHECK-NEXT: ld4.4h { v0, v1, v2, v3 }, [x0], #32
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4.4h { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #32
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = tail call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4.v4i16.p0(ptr %A)
%tmp = getelementptr i16, ptr %A, i32 16
store ptr %tmp, ptr %ptr
@@ -1606,6 +3116,13 @@ define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld4(p
; CHECK-NEXT: ld4.4h { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4.4h { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = tail call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4.v4i16.p0(ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -1621,6 +3138,13 @@ define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld4(p
; CHECK-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0], #64
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #64
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = tail call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4.v4i32.p0(ptr %A)
%tmp = getelementptr i32, ptr %A, i32 16
store ptr %tmp, ptr %ptr
@@ -1634,6 +3158,13 @@ define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld4(p
; CHECK-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = tail call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4.v4i32.p0(ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -1649,6 +3180,13 @@ define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld4(p
; CHECK-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0], #32
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #32
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = tail call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4.v2i32.p0(ptr %A)
%tmp = getelementptr i32, ptr %A, i32 8
store ptr %tmp, ptr %ptr
@@ -1662,6 +3200,13 @@ define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld4(p
; CHECK-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = tail call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4.v2i32.p0(ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -1677,6 +3222,13 @@ define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld4(p
; CHECK-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0], #64
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #64
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = tail call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4.v2i64.p0(ptr %A)
%tmp = getelementptr i64, ptr %A, i32 8
store ptr %tmp, ptr %ptr
@@ -1690,6 +3242,13 @@ define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld4(p
; CHECK-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = tail call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4.v2i64.p0(ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -1705,6 +3264,13 @@ define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld4(p
; CHECK-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], #32
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_imm_ld4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #32
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = tail call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4.v1i64.p0(ptr %A)
%tmp = getelementptr i64, ptr %A, i32 4
store ptr %tmp, ptr %ptr
@@ -1718,6 +3284,13 @@ define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld4(p
; CHECK-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_reg_ld4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = tail call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4.v1i64.p0(ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -1733,6 +3306,13 @@ define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_i
; CHECK-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0], #64
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #64
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = tail call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld4.v4f32.p0(ptr %A)
%tmp = getelementptr float, ptr %A, i32 16
store ptr %tmp, ptr %ptr
@@ -1746,6 +3326,13 @@ define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_r
; CHECK-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = tail call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld4.v4f32.p0(ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -1761,6 +3348,13 @@ define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_i
; CHECK-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0], #32
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #32
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = tail call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld4.v2f32.p0(ptr %A)
%tmp = getelementptr float, ptr %A, i32 8
store ptr %tmp, ptr %ptr
@@ -1774,6 +3368,13 @@ define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_r
; CHECK-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = tail call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld4.v2f32.p0(ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -1789,6 +3390,13 @@ define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_po
; CHECK-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0], #64
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #64
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = tail call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4.v2f64.p0(ptr %A)
%tmp = getelementptr double, ptr %A, i32 8
store ptr %tmp, ptr %ptr
@@ -1802,6 +3410,13 @@ define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_po
; CHECK-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = tail call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4.v2f64.p0(ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -1817,6 +3432,13 @@ define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_po
; CHECK-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], #32
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_imm_ld4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #32
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = tail call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4.v1f64.p0(ptr %A)
%tmp = getelementptr double, ptr %A, i32 4
store ptr %tmp, ptr %ptr
@@ -1830,6 +3452,13 @@ define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_po
; CHECK-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_reg_ld4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = tail call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4.v1f64.p0(ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -1844,6 +3473,13 @@ define { <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld1x2(ptr %A, ptr %ptr) {
; CHECK-NEXT: ld1.16b { v0, v1 }, [x0], #32
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.16b { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #32
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x2 = tail call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld1x2.v16i8.p0(ptr %A)
%tmp = getelementptr i8, ptr %A, i32 32
store ptr %tmp, ptr %ptr
@@ -1856,6 +3492,13 @@ define { <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld1x2(ptr %A, ptr %ptr, i64
; CHECK-NEXT: ld1.16b { v0, v1 }, [x0], x2
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.16b { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x2 = tail call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld1x2.v16i8.p0(ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -1871,6 +3514,13 @@ define { <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld1x2(ptr %A, ptr %ptr) {
; CHECK-NEXT: ld1.8b { v0, v1 }, [x0], #16
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.8b { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #16
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x2 = tail call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld1x2.v8i8.p0(ptr %A)
%tmp = getelementptr i8, ptr %A, i32 16
store ptr %tmp, ptr %ptr
@@ -1883,6 +3533,13 @@ define { <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %i
; CHECK-NEXT: ld1.8b { v0, v1 }, [x0], x2
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.8b { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x2 = tail call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld1x2.v8i8.p0(ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -1898,6 +3555,13 @@ define { <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld1x2(ptr %A, ptr %ptr) {
; CHECK-NEXT: ld1.8h { v0, v1 }, [x0], #32
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.8h { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #32
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x2 = tail call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld1x2.v8i16.p0(ptr %A)
%tmp = getelementptr i16, ptr %A, i32 16
store ptr %tmp, ptr %ptr
@@ -1911,6 +3575,13 @@ define { <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld1x2(ptr %A, ptr %ptr, i64
; CHECK-NEXT: ld1.8h { v0, v1 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.8h { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x2 = tail call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld1x2.v8i16.p0(ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -1926,6 +3597,13 @@ define { <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld1x2(ptr %A, ptr %ptr) {
; CHECK-NEXT: ld1.4h { v0, v1 }, [x0], #16
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.4h { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #16
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x2 = tail call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld1x2.v4i16.p0(ptr %A)
%tmp = getelementptr i16, ptr %A, i32 8
store ptr %tmp, ptr %ptr
@@ -1939,6 +3617,13 @@ define { <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld1x2(ptr %A, ptr %ptr, i64
; CHECK-NEXT: ld1.4h { v0, v1 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.4h { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x2 = tail call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld1x2.v4i16.p0(ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -1954,6 +3639,13 @@ define { <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld1x2(ptr %A, ptr %ptr) {
; CHECK-NEXT: ld1.4s { v0, v1 }, [x0], #32
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.4s { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #32
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x2 = tail call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld1x2.v4i32.p0(ptr %A)
%tmp = getelementptr i32, ptr %A, i32 8
store ptr %tmp, ptr %ptr
@@ -1967,6 +3659,13 @@ define { <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld1x2(ptr %A, ptr %ptr, i64
; CHECK-NEXT: ld1.4s { v0, v1 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.4s { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x2 = tail call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld1x2.v4i32.p0(ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -1982,6 +3681,13 @@ define { <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld1x2(ptr %A, ptr %ptr) {
; CHECK-NEXT: ld1.2s { v0, v1 }, [x0], #16
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.2s { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #16
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x2 = tail call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld1x2.v2i32.p0(ptr %A)
%tmp = getelementptr i32, ptr %A, i32 4
store ptr %tmp, ptr %ptr
@@ -1995,6 +3701,13 @@ define { <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld1x2(ptr %A, ptr %ptr, i64
; CHECK-NEXT: ld1.2s { v0, v1 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.2s { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x2 = tail call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld1x2.v2i32.p0(ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -2010,6 +3723,13 @@ define { <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld1x2(ptr %A, ptr %ptr) {
; CHECK-NEXT: ld1.2d { v0, v1 }, [x0], #32
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.2d { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #32
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x2 = tail call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld1x2.v2i64.p0(ptr %A)
%tmp = getelementptr i64, ptr %A, i32 4
store ptr %tmp, ptr %ptr
@@ -2023,6 +3743,13 @@ define { <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld1x2(ptr %A, ptr %ptr, i64
; CHECK-NEXT: ld1.2d { v0, v1 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.2d { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x2 = tail call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld1x2.v2i64.p0(ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -2038,6 +3765,13 @@ define { <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld1x2(ptr %A, ptr %ptr) {
; CHECK-NEXT: ld1.1d { v0, v1 }, [x0], #16
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_imm_ld1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.1d { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #16
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x2 = tail call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld1x2.v1i64.p0(ptr %A)
%tmp = getelementptr i64, ptr %A, i32 2
store ptr %tmp, ptr %ptr
@@ -2051,6 +3785,13 @@ define { <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld1x2(ptr %A, ptr %ptr, i64
; CHECK-NEXT: ld1.1d { v0, v1 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_reg_ld1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.1d { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x2 = tail call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld1x2.v1i64.p0(ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -2066,6 +3807,13 @@ define { <4 x float>, <4 x float> } @test_v4f32_post_imm_ld1x2(ptr %A, ptr %ptr)
; CHECK-NEXT: ld1.4s { v0, v1 }, [x0], #32
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.4s { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #32
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x2 = tail call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld1x2.v4f32.p0(ptr %A)
%tmp = getelementptr float, ptr %A, i32 8
store ptr %tmp, ptr %ptr
@@ -2079,6 +3827,13 @@ define { <4 x float>, <4 x float> } @test_v4f32_post_reg_ld1x2(ptr %A, ptr %ptr,
; CHECK-NEXT: ld1.4s { v0, v1 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.4s { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x2 = tail call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld1x2.v4f32.p0(ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -2094,6 +3849,13 @@ define { <2 x float>, <2 x float> } @test_v2f32_post_imm_ld1x2(ptr %A, ptr %ptr)
; CHECK-NEXT: ld1.2s { v0, v1 }, [x0], #16
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.2s { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #16
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x2 = tail call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld1x2.v2f32.p0(ptr %A)
%tmp = getelementptr float, ptr %A, i32 4
store ptr %tmp, ptr %ptr
@@ -2107,6 +3869,13 @@ define { <2 x float>, <2 x float> } @test_v2f32_post_reg_ld1x2(ptr %A, ptr %ptr,
; CHECK-NEXT: ld1.2s { v0, v1 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.2s { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x2 = tail call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld1x2.v2f32.p0(ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -2122,6 +3891,13 @@ define { <2 x double>, <2 x double> } @test_v2f64_post_imm_ld1x2(ptr %A, ptr %pt
; CHECK-NEXT: ld1.2d { v0, v1 }, [x0], #32
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.2d { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #32
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x2 = tail call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld1x2.v2f64.p0(ptr %A)
%tmp = getelementptr double, ptr %A, i32 4
store ptr %tmp, ptr %ptr
@@ -2135,6 +3911,13 @@ define { <2 x double>, <2 x double> } @test_v2f64_post_reg_ld1x2(ptr %A, ptr %pt
; CHECK-NEXT: ld1.2d { v0, v1 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.2d { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x2 = tail call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld1x2.v2f64.p0(ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -2150,6 +3933,13 @@ define { <1 x double>, <1 x double> } @test_v1f64_post_imm_ld1x2(ptr %A, ptr %pt
; CHECK-NEXT: ld1.1d { v0, v1 }, [x0], #16
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_imm_ld1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.1d { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #16
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x2 = tail call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld1x2.v1f64.p0(ptr %A)
%tmp = getelementptr double, ptr %A, i32 2
store ptr %tmp, ptr %ptr
@@ -2163,6 +3953,13 @@ define { <1 x double>, <1 x double> } @test_v1f64_post_reg_ld1x2(ptr %A, ptr %pt
; CHECK-NEXT: ld1.1d { v0, v1 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_reg_ld1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.1d { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x2 = tail call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld1x2.v1f64.p0(ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -2178,6 +3975,13 @@ define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld1x3(ptr %A, pt
; CHECK-NEXT: ld1.16b { v0, v1, v2 }, [x0], #48
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.16b { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #48
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x3 = tail call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld1x3.v16i8.p0(ptr %A)
%tmp = getelementptr i8, ptr %A, i32 48
store ptr %tmp, ptr %ptr
@@ -2190,6 +3994,13 @@ define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld1x3(ptr %A, pt
; CHECK-NEXT: ld1.16b { v0, v1, v2 }, [x0], x2
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.16b { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x3 = tail call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld1x3.v16i8.p0(ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -2205,6 +4016,13 @@ define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld1x3(ptr %A, ptr %p
; CHECK-NEXT: ld1.8b { v0, v1, v2 }, [x0], #24
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.8b { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #24
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x3 = tail call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld1x3.v8i8.p0(ptr %A)
%tmp = getelementptr i8, ptr %A, i32 24
store ptr %tmp, ptr %ptr
@@ -2217,6 +4035,13 @@ define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld1x3(ptr %A, ptr %p
; CHECK-NEXT: ld1.8b { v0, v1, v2 }, [x0], x2
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.8b { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x3 = tail call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld1x3.v8i8.p0(ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -2232,6 +4057,13 @@ define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld1x3(ptr %A, pt
; CHECK-NEXT: ld1.8h { v0, v1, v2 }, [x0], #48
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.8h { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #48
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x3 = tail call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld1x3.v8i16.p0(ptr %A)
%tmp = getelementptr i16, ptr %A, i32 24
store ptr %tmp, ptr %ptr
@@ -2245,6 +4077,13 @@ define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld1x3(ptr %A, pt
; CHECK-NEXT: ld1.8h { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.8h { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x3 = tail call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld1x3.v8i16.p0(ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -2260,6 +4099,13 @@ define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld1x3(ptr %A, pt
; CHECK-NEXT: ld1.4h { v0, v1, v2 }, [x0], #24
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.4h { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #24
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x3 = tail call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld1x3.v4i16.p0(ptr %A)
%tmp = getelementptr i16, ptr %A, i32 12
store ptr %tmp, ptr %ptr
@@ -2273,6 +4119,13 @@ define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld1x3(ptr %A, pt
; CHECK-NEXT: ld1.4h { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.4h { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x3 = tail call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld1x3.v4i16.p0(ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -2288,6 +4141,13 @@ define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld1x3(ptr %A, pt
; CHECK-NEXT: ld1.4s { v0, v1, v2 }, [x0], #48
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.4s { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #48
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x3 = tail call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld1x3.v4i32.p0(ptr %A)
%tmp = getelementptr i32, ptr %A, i32 12
store ptr %tmp, ptr %ptr
@@ -2301,6 +4161,13 @@ define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld1x3(ptr %A, pt
; CHECK-NEXT: ld1.4s { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.4s { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x3 = tail call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld1x3.v4i32.p0(ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -2316,6 +4183,13 @@ define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld1x3(ptr %A, pt
; CHECK-NEXT: ld1.2s { v0, v1, v2 }, [x0], #24
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.2s { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #24
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x3 = tail call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld1x3.v2i32.p0(ptr %A)
%tmp = getelementptr i32, ptr %A, i32 6
store ptr %tmp, ptr %ptr
@@ -2329,6 +4203,13 @@ define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld1x3(ptr %A, pt
; CHECK-NEXT: ld1.2s { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.2s { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x3 = tail call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld1x3.v2i32.p0(ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -2344,6 +4225,13 @@ define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld1x3(ptr %A, pt
; CHECK-NEXT: ld1.2d { v0, v1, v2 }, [x0], #48
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.2d { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #48
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x3 = tail call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld1x3.v2i64.p0(ptr %A)
%tmp = getelementptr i64, ptr %A, i32 6
store ptr %tmp, ptr %ptr
@@ -2357,6 +4245,13 @@ define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld1x3(ptr %A, pt
; CHECK-NEXT: ld1.2d { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.2d { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x3 = tail call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld1x3.v2i64.p0(ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -2372,6 +4267,13 @@ define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld1x3(ptr %A, pt
; CHECK-NEXT: ld1.1d { v0, v1, v2 }, [x0], #24
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_imm_ld1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.1d { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #24
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x3 = tail call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld1x3.v1i64.p0(ptr %A)
%tmp = getelementptr i64, ptr %A, i32 3
store ptr %tmp, ptr %ptr
@@ -2385,6 +4287,13 @@ define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld1x3(ptr %A, pt
; CHECK-NEXT: ld1.1d { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_reg_ld1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.1d { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x3 = tail call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld1x3.v1i64.p0(ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -2400,6 +4309,13 @@ define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld1x3(ptr
; CHECK-NEXT: ld1.4s { v0, v1, v2 }, [x0], #48
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.4s { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #48
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x3 = tail call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld1x3.v4f32.p0(ptr %A)
%tmp = getelementptr float, ptr %A, i32 12
store ptr %tmp, ptr %ptr
@@ -2413,6 +4329,13 @@ define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_reg_ld1x3(ptr
; CHECK-NEXT: ld1.4s { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.4s { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x3 = tail call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld1x3.v4f32.p0(ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -2428,6 +4351,13 @@ define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld1x3(ptr
; CHECK-NEXT: ld1.2s { v0, v1, v2 }, [x0], #24
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.2s { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #24
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x3 = tail call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld1x3.v2f32.p0(ptr %A)
%tmp = getelementptr float, ptr %A, i32 6
store ptr %tmp, ptr %ptr
@@ -2441,6 +4371,13 @@ define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_reg_ld1x3(ptr
; CHECK-NEXT: ld1.2s { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.2s { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x3 = tail call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld1x3.v2f32.p0(ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -2456,6 +4393,13 @@ define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld1x3(p
; CHECK-NEXT: ld1.2d { v0, v1, v2 }, [x0], #48
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.2d { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #48
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x3 = tail call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld1x3.v2f64.p0(ptr %A)
%tmp = getelementptr double, ptr %A, i32 6
store ptr %tmp, ptr %ptr
@@ -2469,6 +4413,13 @@ define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_reg_ld1x3(p
; CHECK-NEXT: ld1.2d { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.2d { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x3 = tail call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld1x3.v2f64.p0(ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -2484,6 +4435,13 @@ define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld1x3(p
; CHECK-NEXT: ld1.1d { v0, v1, v2 }, [x0], #24
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_imm_ld1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.1d { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #24
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x3 = tail call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld1x3.v1f64.p0(ptr %A)
%tmp = getelementptr double, ptr %A, i32 3
store ptr %tmp, ptr %ptr
@@ -2497,6 +4455,13 @@ define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_reg_ld1x3(p
; CHECK-NEXT: ld1.1d { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_reg_ld1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.1d { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x3 = tail call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld1x3.v1f64.p0(ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -2512,6 +4477,13 @@ define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld1x4
; CHECK-NEXT: ld1.16b { v0, v1, v2, v3 }, [x0], #64
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.16b { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #64
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x4 = tail call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld1x4.v16i8.p0(ptr %A)
%tmp = getelementptr i8, ptr %A, i32 64
store ptr %tmp, ptr %ptr
@@ -2524,6 +4496,13 @@ define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld1x4
; CHECK-NEXT: ld1.16b { v0, v1, v2, v3 }, [x0], x2
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.16b { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x4 = tail call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld1x4.v16i8.p0(ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -2539,6 +4518,13 @@ define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld1x4(ptr
; CHECK-NEXT: ld1.8b { v0, v1, v2, v3 }, [x0], #32
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.8b { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #32
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x4 = tail call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld1x4.v8i8.p0(ptr %A)
%tmp = getelementptr i8, ptr %A, i32 32
store ptr %tmp, ptr %ptr
@@ -2551,6 +4537,13 @@ define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld1x4(ptr
; CHECK-NEXT: ld1.8b { v0, v1, v2, v3 }, [x0], x2
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.8b { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x4 = tail call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld1x4.v8i8.p0(ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -2566,6 +4559,13 @@ define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld1x4
; CHECK-NEXT: ld1.8h { v0, v1, v2, v3 }, [x0], #64
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.8h { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #64
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x4 = tail call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld1x4.v8i16.p0(ptr %A)
%tmp = getelementptr i16, ptr %A, i32 32
store ptr %tmp, ptr %ptr
@@ -2579,6 +4579,13 @@ define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld1x4
; CHECK-NEXT: ld1.8h { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.8h { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x4 = tail call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld1x4.v8i16.p0(ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -2594,6 +4601,13 @@ define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld1x4
; CHECK-NEXT: ld1.4h { v0, v1, v2, v3 }, [x0], #32
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.4h { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #32
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x4 = tail call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld1x4.v4i16.p0(ptr %A)
%tmp = getelementptr i16, ptr %A, i32 16
store ptr %tmp, ptr %ptr
@@ -2607,6 +4621,13 @@ define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld1x4
; CHECK-NEXT: ld1.4h { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.4h { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x4 = tail call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld1x4.v4i16.p0(ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -2622,6 +4643,13 @@ define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld1x4
; CHECK-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0], #64
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #64
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x4 = tail call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld1x4.v4i32.p0(ptr %A)
%tmp = getelementptr i32, ptr %A, i32 16
store ptr %tmp, ptr %ptr
@@ -2635,6 +4663,13 @@ define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld1x4
; CHECK-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x4 = tail call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld1x4.v4i32.p0(ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -2650,6 +4685,13 @@ define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld1x4
; CHECK-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0], #32
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #32
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x4 = tail call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld1x4.v2i32.p0(ptr %A)
%tmp = getelementptr i32, ptr %A, i32 8
store ptr %tmp, ptr %ptr
@@ -2663,6 +4705,13 @@ define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld1x4
; CHECK-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x4 = tail call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld1x4.v2i32.p0(ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -2678,6 +4727,13 @@ define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld1x4
; CHECK-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0], #64
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #64
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x4 = tail call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld1x4.v2i64.p0(ptr %A)
%tmp = getelementptr i64, ptr %A, i32 8
store ptr %tmp, ptr %ptr
@@ -2691,6 +4747,13 @@ define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld1x4
; CHECK-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x4 = tail call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld1x4.v2i64.p0(ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -2706,6 +4769,13 @@ define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld1x4
; CHECK-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], #32
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_imm_ld1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #32
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x4 = tail call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld1x4.v1i64.p0(ptr %A)
%tmp = getelementptr i64, ptr %A, i32 4
store ptr %tmp, ptr %ptr
@@ -2719,6 +4789,13 @@ define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld1x4
; CHECK-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_reg_ld1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x4 = tail call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld1x4.v1i64.p0(ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -2734,6 +4811,13 @@ define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_i
; CHECK-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0], #64
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #64
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x4 = tail call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld1x4.v4f32.p0(ptr %A)
%tmp = getelementptr float, ptr %A, i32 16
store ptr %tmp, ptr %ptr
@@ -2747,6 +4831,13 @@ define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_r
; CHECK-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x4 = tail call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld1x4.v4f32.p0(ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -2762,6 +4853,13 @@ define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_i
; CHECK-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0], #32
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #32
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x4 = tail call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld1x4.v2f32.p0(ptr %A)
%tmp = getelementptr float, ptr %A, i32 8
store ptr %tmp, ptr %ptr
@@ -2775,6 +4873,13 @@ define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_r
; CHECK-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x4 = tail call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld1x4.v2f32.p0(ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -2790,6 +4895,13 @@ define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_po
; CHECK-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0], #64
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #64
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x4 = tail call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld1x4.v2f64.p0(ptr %A)
%tmp = getelementptr double, ptr %A, i32 8
store ptr %tmp, ptr %ptr
@@ -2803,6 +4915,13 @@ define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_po
; CHECK-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x4 = tail call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld1x4.v2f64.p0(ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -2818,6 +4937,13 @@ define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_po
; CHECK-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], #32
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_imm_ld1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #32
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x4 = tail call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld1x4.v1f64.p0(ptr %A)
%tmp = getelementptr double, ptr %A, i32 4
store ptr %tmp, ptr %ptr
@@ -2831,6 +4957,13 @@ define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_po
; CHECK-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_reg_ld1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld1x4 = tail call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld1x4.v1f64.p0(ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -2846,6 +4979,13 @@ define { <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld2r(ptr %A, ptr %ptr) noun
; CHECK-NEXT: ld2r.16b { v0, v1 }, [x0], #2
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld2r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2r.16b { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2r.v16i8.p0(ptr %A)
%tmp = getelementptr i8, ptr %A, i32 2
store ptr %tmp, ptr %ptr
@@ -2858,6 +4998,13 @@ define { <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld2r(ptr %A, ptr %ptr, i64
; CHECK-NEXT: ld2r.16b { v0, v1 }, [x0], x2
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld2r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2r.16b { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2r.v16i8.p0(ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -2873,6 +5020,13 @@ define { <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld2r(ptr %A, ptr %ptr) nounwin
; CHECK-NEXT: ld2r.8b { v0, v1 }, [x0], #2
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld2r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2r.8b { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2r.v8i8.p0(ptr %A)
%tmp = getelementptr i8, ptr %A, i32 2
store ptr %tmp, ptr %ptr
@@ -2885,6 +5039,13 @@ define { <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld2r(ptr %A, ptr %ptr, i64 %in
; CHECK-NEXT: ld2r.8b { v0, v1 }, [x0], x2
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld2r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2r.8b { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2r.v8i8.p0(ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -2900,6 +5061,13 @@ define { <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld2r(ptr %A, ptr %ptr) noun
; CHECK-NEXT: ld2r.8h { v0, v1 }, [x0], #4
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld2r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2r.8h { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #4
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2r.v8i16.p0(ptr %A)
%tmp = getelementptr i16, ptr %A, i32 2
store ptr %tmp, ptr %ptr
@@ -2913,6 +5081,13 @@ define { <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld2r(ptr %A, ptr %ptr, i64
; CHECK-NEXT: ld2r.8h { v0, v1 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld2r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2r.8h { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2r.v8i16.p0(ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -2928,6 +5103,13 @@ define { <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld2r(ptr %A, ptr %ptr) noun
; CHECK-NEXT: ld2r.4h { v0, v1 }, [x0], #4
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld2r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2r.4h { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #4
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2r.v4i16.p0(ptr %A)
%tmp = getelementptr i16, ptr %A, i32 2
store ptr %tmp, ptr %ptr
@@ -2941,6 +5123,13 @@ define { <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld2r(ptr %A, ptr %ptr, i64
; CHECK-NEXT: ld2r.4h { v0, v1 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld2r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2r.4h { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2r.v4i16.p0(ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -2956,6 +5145,13 @@ define { <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld2r(ptr %A, ptr %ptr) noun
; CHECK-NEXT: ld2r.4s { v0, v1 }, [x0], #8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld2r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2r.4s { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #8
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2r.v4i32.p0(ptr %A)
%tmp = getelementptr i32, ptr %A, i32 2
store ptr %tmp, ptr %ptr
@@ -2969,6 +5165,13 @@ define { <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld2r(ptr %A, ptr %ptr, i64
; CHECK-NEXT: ld2r.4s { v0, v1 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld2r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2r.4s { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2r.v4i32.p0(ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -2983,6 +5186,13 @@ define { <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld2r(ptr %A, ptr %ptr) noun
; CHECK-NEXT: ld2r.2s { v0, v1 }, [x0], #8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld2r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2r.2s { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #8
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2r.v2i32.p0(ptr %A)
%tmp = getelementptr i32, ptr %A, i32 2
store ptr %tmp, ptr %ptr
@@ -2996,6 +5206,13 @@ define { <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld2r(ptr %A, ptr %ptr, i64
; CHECK-NEXT: ld2r.2s { v0, v1 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld2r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2r.2s { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2r.v2i32.p0(ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -3011,6 +5228,13 @@ define { <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld2r(ptr %A, ptr %ptr) noun
; CHECK-NEXT: ld2r.2d { v0, v1 }, [x0], #16
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld2r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2r.2d { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #16
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2r.v2i64.p0(ptr %A)
%tmp = getelementptr i64, ptr %A, i32 2
store ptr %tmp, ptr %ptr
@@ -3024,6 +5248,13 @@ define { <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld2r(ptr %A, ptr %ptr, i64
; CHECK-NEXT: ld2r.2d { v0, v1 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld2r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2r.2d { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2r.v2i64.p0(ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -3038,6 +5269,13 @@ define { <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld2r(ptr %A, ptr %ptr) noun
; CHECK-NEXT: ld2r.1d { v0, v1 }, [x0], #16
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_imm_ld2r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2r.1d { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #16
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2r.v1i64.p0(ptr %A)
%tmp = getelementptr i64, ptr %A, i32 2
store ptr %tmp, ptr %ptr
@@ -3051,6 +5289,13 @@ define { <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld2r(ptr %A, ptr %ptr, i64
; CHECK-NEXT: ld2r.1d { v0, v1 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_reg_ld2r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2r.1d { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2r.v1i64.p0(ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -3066,6 +5311,13 @@ define { <4 x float>, <4 x float> } @test_v4f32_post_imm_ld2r(ptr %A, ptr %ptr)
; CHECK-NEXT: ld2r.4s { v0, v1 }, [x0], #8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld2r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2r.4s { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #8
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2r.v4f32.p0(ptr %A)
%tmp = getelementptr float, ptr %A, i32 2
store ptr %tmp, ptr %ptr
@@ -3079,6 +5331,13 @@ define { <4 x float>, <4 x float> } @test_v4f32_post_reg_ld2r(ptr %A, ptr %ptr,
; CHECK-NEXT: ld2r.4s { v0, v1 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld2r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2r.4s { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2r.v4f32.p0(ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -3093,6 +5352,13 @@ define { <2 x float>, <2 x float> } @test_v2f32_post_imm_ld2r(ptr %A, ptr %ptr)
; CHECK-NEXT: ld2r.2s { v0, v1 }, [x0], #8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld2r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2r.2s { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #8
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2r.v2f32.p0(ptr %A)
%tmp = getelementptr float, ptr %A, i32 2
store ptr %tmp, ptr %ptr
@@ -3106,6 +5372,13 @@ define { <2 x float>, <2 x float> } @test_v2f32_post_reg_ld2r(ptr %A, ptr %ptr,
; CHECK-NEXT: ld2r.2s { v0, v1 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld2r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2r.2s { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2r.v2f32.p0(ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -3121,6 +5394,13 @@ define { <2 x double>, <2 x double> } @test_v2f64_post_imm_ld2r(ptr %A, ptr %ptr
; CHECK-NEXT: ld2r.2d { v0, v1 }, [x0], #16
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld2r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2r.2d { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #16
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2r.v2f64.p0(ptr %A)
%tmp = getelementptr double, ptr %A, i32 2
store ptr %tmp, ptr %ptr
@@ -3134,6 +5414,13 @@ define { <2 x double>, <2 x double> } @test_v2f64_post_reg_ld2r(ptr %A, ptr %ptr
; CHECK-NEXT: ld2r.2d { v0, v1 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld2r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2r.2d { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2r.v2f64.p0(ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -3148,6 +5435,13 @@ define { <1 x double>, <1 x double> } @test_v1f64_post_imm_ld2r(ptr %A, ptr %ptr
; CHECK-NEXT: ld2r.1d { v0, v1 }, [x0], #16
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_imm_ld2r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2r.1d { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #16
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2r.v1f64.p0(ptr %A)
%tmp = getelementptr double, ptr %A, i32 2
store ptr %tmp, ptr %ptr
@@ -3161,6 +5455,13 @@ define { <1 x double>, <1 x double> } @test_v1f64_post_reg_ld2r(ptr %A, ptr %ptr
; CHECK-NEXT: ld2r.1d { v0, v1 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_reg_ld2r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld2r.1d { v0, v1 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2r.v1f64.p0(ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -3176,6 +5477,13 @@ define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld3r(ptr %A, ptr
; CHECK-NEXT: ld3r.16b { v0, v1, v2 }, [x0], #3
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld3r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3r.16b { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3r.v16i8.p0(ptr %A)
%tmp = getelementptr i8, ptr %A, i32 3
store ptr %tmp, ptr %ptr
@@ -3188,6 +5496,13 @@ define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld3r(ptr %A, ptr
; CHECK-NEXT: ld3r.16b { v0, v1, v2 }, [x0], x2
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld3r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3r.16b { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3r.v16i8.p0(ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -3203,6 +5518,13 @@ define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld3r(ptr %A, ptr %pt
; CHECK-NEXT: ld3r.8b { v0, v1, v2 }, [x0], #3
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld3r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3r.8b { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3r.v8i8.p0(ptr %A)
%tmp = getelementptr i8, ptr %A, i32 3
store ptr %tmp, ptr %ptr
@@ -3215,6 +5537,13 @@ define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld3r(ptr %A, ptr %pt
; CHECK-NEXT: ld3r.8b { v0, v1, v2 }, [x0], x2
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld3r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3r.8b { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3r.v8i8.p0(ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -3230,6 +5559,13 @@ define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld3r(ptr %A, ptr
; CHECK-NEXT: ld3r.8h { v0, v1, v2 }, [x0], #6
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld3r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3r.8h { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #6
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3r.v8i16.p0(ptr %A)
%tmp = getelementptr i16, ptr %A, i32 3
store ptr %tmp, ptr %ptr
@@ -3243,6 +5579,13 @@ define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld3r(ptr %A, ptr
; CHECK-NEXT: ld3r.8h { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld3r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3r.8h { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3r.v8i16.p0(ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -3258,6 +5601,13 @@ define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld3r(ptr %A, ptr
; CHECK-NEXT: ld3r.4h { v0, v1, v2 }, [x0], #6
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld3r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3r.4h { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #6
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3r.v4i16.p0(ptr %A)
%tmp = getelementptr i16, ptr %A, i32 3
store ptr %tmp, ptr %ptr
@@ -3271,6 +5621,13 @@ define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld3r(ptr %A, ptr
; CHECK-NEXT: ld3r.4h { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld3r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3r.4h { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3r.v4i16.p0(ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -3286,6 +5643,13 @@ define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld3r(ptr %A, ptr
; CHECK-NEXT: ld3r.4s { v0, v1, v2 }, [x0], #12
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld3r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3r.4s { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #12
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3r.v4i32.p0(ptr %A)
%tmp = getelementptr i32, ptr %A, i32 3
store ptr %tmp, ptr %ptr
@@ -3299,6 +5663,13 @@ define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld3r(ptr %A, ptr
; CHECK-NEXT: ld3r.4s { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld3r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3r.4s { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3r.v4i32.p0(ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -3313,6 +5684,13 @@ define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld3r(ptr %A, ptr
; CHECK-NEXT: ld3r.2s { v0, v1, v2 }, [x0], #12
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld3r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3r.2s { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #12
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3r.v2i32.p0(ptr %A)
%tmp = getelementptr i32, ptr %A, i32 3
store ptr %tmp, ptr %ptr
@@ -3326,6 +5704,13 @@ define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld3r(ptr %A, ptr
; CHECK-NEXT: ld3r.2s { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld3r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3r.2s { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3r.v2i32.p0(ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -3341,6 +5726,13 @@ define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld3r(ptr %A, ptr
; CHECK-NEXT: ld3r.2d { v0, v1, v2 }, [x0], #24
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld3r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3r.2d { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #24
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3r.v2i64.p0(ptr %A)
%tmp = getelementptr i64, ptr %A, i32 3
store ptr %tmp, ptr %ptr
@@ -3354,6 +5746,13 @@ define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld3r(ptr %A, ptr
; CHECK-NEXT: ld3r.2d { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld3r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3r.2d { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3r.v2i64.p0(ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -3368,6 +5767,13 @@ define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld3r(ptr %A, ptr
; CHECK-NEXT: ld3r.1d { v0, v1, v2 }, [x0], #24
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_imm_ld3r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3r.1d { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #24
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3r.v1i64.p0(ptr %A)
%tmp = getelementptr i64, ptr %A, i32 3
store ptr %tmp, ptr %ptr
@@ -3381,6 +5787,13 @@ define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld3r(ptr %A, ptr
; CHECK-NEXT: ld3r.1d { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_reg_ld3r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3r.1d { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3r.v1i64.p0(ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -3396,6 +5809,13 @@ define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld3r(ptr %
; CHECK-NEXT: ld3r.4s { v0, v1, v2 }, [x0], #12
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld3r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3r.4s { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #12
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3r.v4f32.p0(ptr %A)
%tmp = getelementptr float, ptr %A, i32 3
store ptr %tmp, ptr %ptr
@@ -3409,6 +5829,13 @@ define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_reg_ld3r(ptr %
; CHECK-NEXT: ld3r.4s { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld3r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3r.4s { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3r.v4f32.p0(ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -3423,6 +5850,13 @@ define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld3r(ptr %
; CHECK-NEXT: ld3r.2s { v0, v1, v2 }, [x0], #12
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld3r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3r.2s { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #12
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3r.v2f32.p0(ptr %A)
%tmp = getelementptr float, ptr %A, i32 3
store ptr %tmp, ptr %ptr
@@ -3436,6 +5870,13 @@ define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_reg_ld3r(ptr %
; CHECK-NEXT: ld3r.2s { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld3r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3r.2s { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3r.v2f32.p0(ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -3451,6 +5892,13 @@ define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld3r(pt
; CHECK-NEXT: ld3r.2d { v0, v1, v2 }, [x0], #24
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld3r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3r.2d { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #24
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3r.v2f64.p0(ptr %A)
%tmp = getelementptr double, ptr %A, i32 3
store ptr %tmp, ptr %ptr
@@ -3464,6 +5912,13 @@ define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_reg_ld3r(pt
; CHECK-NEXT: ld3r.2d { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld3r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3r.2d { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3r.v2f64.p0(ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -3478,6 +5933,13 @@ define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld3r(pt
; CHECK-NEXT: ld3r.1d { v0, v1, v2 }, [x0], #24
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_imm_ld3r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3r.1d { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #24
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3r.v1f64.p0(ptr %A)
%tmp = getelementptr double, ptr %A, i32 3
store ptr %tmp, ptr %ptr
@@ -3491,6 +5953,13 @@ define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_reg_ld3r(pt
; CHECK-NEXT: ld3r.1d { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_reg_ld3r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld3r.1d { v0, v1, v2 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3r.v1f64.p0(ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -3506,6 +5975,13 @@ define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld4r(
; CHECK-NEXT: ld4r.16b { v0, v1, v2, v3 }, [x0], #4
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld4r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4r.16b { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #4
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4r.v16i8.p0(ptr %A)
%tmp = getelementptr i8, ptr %A, i32 4
store ptr %tmp, ptr %ptr
@@ -3518,6 +5994,13 @@ define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld4r(
; CHECK-NEXT: ld4r.16b { v0, v1, v2, v3 }, [x0], x2
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld4r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4r.16b { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4r.v16i8.p0(ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -3533,6 +6016,13 @@ define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld4r(ptr %
; CHECK-NEXT: ld4r.8b { v0, v1, v2, v3 }, [x0], #4
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld4r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4r.8b { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #4
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4r.v8i8.p0(ptr %A)
%tmp = getelementptr i8, ptr %A, i32 4
store ptr %tmp, ptr %ptr
@@ -3545,6 +6035,13 @@ define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld4r(ptr %
; CHECK-NEXT: ld4r.8b { v0, v1, v2, v3 }, [x0], x2
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld4r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4r.8b { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4r.v8i8.p0(ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -3560,6 +6057,13 @@ define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld4r(
; CHECK-NEXT: ld4r.8h { v0, v1, v2, v3 }, [x0], #8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld4r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4r.8h { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #8
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4r.v8i16.p0(ptr %A)
%tmp = getelementptr i16, ptr %A, i32 4
store ptr %tmp, ptr %ptr
@@ -3573,6 +6077,13 @@ define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld4r(
; CHECK-NEXT: ld4r.8h { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld4r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4r.8h { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4r.v8i16.p0(ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -3588,6 +6099,13 @@ define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld4r(
; CHECK-NEXT: ld4r.4h { v0, v1, v2, v3 }, [x0], #8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld4r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4r.4h { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #8
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4r.v4i16.p0(ptr %A)
%tmp = getelementptr i16, ptr %A, i32 4
store ptr %tmp, ptr %ptr
@@ -3601,6 +6119,13 @@ define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld4r(
; CHECK-NEXT: ld4r.4h { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld4r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4r.4h { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4r.v4i16.p0(ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -3616,6 +6141,13 @@ define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld4r(
; CHECK-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0], #16
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld4r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #16
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4r.v4i32.p0(ptr %A)
%tmp = getelementptr i32, ptr %A, i32 4
store ptr %tmp, ptr %ptr
@@ -3629,6 +6161,13 @@ define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld4r(
; CHECK-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld4r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4r.v4i32.p0(ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -3643,6 +6182,13 @@ define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld4r(
; CHECK-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0], #16
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld4r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #16
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4r.v2i32.p0(ptr %A)
%tmp = getelementptr i32, ptr %A, i32 4
store ptr %tmp, ptr %ptr
@@ -3656,6 +6202,13 @@ define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld4r(
; CHECK-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld4r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4r.v2i32.p0(ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -3671,6 +6224,13 @@ define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld4r(
; CHECK-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0], #32
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld4r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #32
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4r.v2i64.p0(ptr %A)
%tmp = getelementptr i64, ptr %A, i32 4
store ptr %tmp, ptr %ptr
@@ -3684,6 +6244,13 @@ define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld4r(
; CHECK-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld4r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4r.v2i64.p0(ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -3698,6 +6265,13 @@ define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld4r(
; CHECK-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0], #32
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_imm_ld4r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #32
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4r.v1i64.p0(ptr %A)
%tmp = getelementptr i64, ptr %A, i32 4
store ptr %tmp, ptr %ptr
@@ -3711,6 +6285,13 @@ define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld4r(
; CHECK-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_reg_ld4r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4r.v1i64.p0(ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -3726,6 +6307,13 @@ define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_i
; CHECK-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0], #16
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld4r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #16
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld4r.v4f32.p0(ptr %A)
%tmp = getelementptr float, ptr %A, i32 4
store ptr %tmp, ptr %ptr
@@ -3739,6 +6327,13 @@ define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_r
; CHECK-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld4r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld4r.v4f32.p0(ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -3753,6 +6348,13 @@ define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_i
; CHECK-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0], #16
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld4r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #16
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld4r.v2f32.p0(ptr %A)
%tmp = getelementptr float, ptr %A, i32 4
store ptr %tmp, ptr %ptr
@@ -3766,6 +6368,13 @@ define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_r
; CHECK-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld4r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld4r.v2f32.p0(ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -3781,6 +6390,13 @@ define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_po
; CHECK-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0], #32
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld4r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #32
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4r.v2f64.p0(ptr %A)
%tmp = getelementptr double, ptr %A, i32 4
store ptr %tmp, ptr %ptr
@@ -3794,6 +6410,13 @@ define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_po
; CHECK-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld4r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4r.v2f64.p0(ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -3808,6 +6431,13 @@ define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_po
; CHECK-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0], #32
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_imm_ld4r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #32
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4r.v1f64.p0(ptr %A)
%tmp = getelementptr double, ptr %A, i32 4
store ptr %tmp, ptr %ptr
@@ -3821,6 +6451,13 @@ define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_po
; CHECK-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_reg_ld4r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4r.v1f64.p0(ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -3838,6 +6475,15 @@ define { <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld2lane(ptr %A, ptr %ptr, <
; CHECK-NEXT: ld2.b { v0, v1 }[0], [x0], #2
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x8, x0, #2
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ld2.b { v0, v1 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2lane.v16i8.p0(<16 x i8> %B, <16 x i8> %C, i64 0, ptr %A)
%tmp = getelementptr i8, ptr %A, i32 2
store ptr %tmp, ptr %ptr
@@ -3852,6 +6498,15 @@ define { <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld2lane(ptr %A, ptr %ptr, i
; CHECK-NEXT: ld2.b { v0, v1 }[0], [x0], x2
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x8, x0, x2
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ld2.b { v0, v1 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2lane.v16i8.p0(<16 x i8> %B, <16 x i8> %C, i64 0, ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -3869,6 +6524,15 @@ define { <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld2lane(ptr %A, ptr %ptr, <8 x
; CHECK-NEXT: ld2.b { v0, v1 }[0], [x0], #2
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x8, x0, #2
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ld2.b { v0, v1 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2lane.v8i8.p0(<8 x i8> %B, <8 x i8> %C, i64 0, ptr %A)
%tmp = getelementptr i8, ptr %A, i32 2
store ptr %tmp, ptr %ptr
@@ -3883,6 +6547,15 @@ define { <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld2lane(ptr %A, ptr %ptr, i64
; CHECK-NEXT: ld2.b { v0, v1 }[0], [x0], x2
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x8, x0, x2
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ld2.b { v0, v1 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2lane.v8i8.p0(<8 x i8> %B, <8 x i8> %C, i64 0, ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -3900,6 +6573,15 @@ define { <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld2lane(ptr %A, ptr %ptr, <
; CHECK-NEXT: ld2.h { v0, v1 }[0], [x0], #4
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x8, x0, #4
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ld2.h { v0, v1 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2lane.v8i16.p0(<8 x i16> %B, <8 x i16> %C, i64 0, ptr %A)
%tmp = getelementptr i16, ptr %A, i32 2
store ptr %tmp, ptr %ptr
@@ -3915,6 +6597,15 @@ define { <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld2lane(ptr %A, ptr %ptr, i
; CHECK-NEXT: ld2.h { v0, v1 }[0], [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ld2.h { v0, v1 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2lane.v8i16.p0(<8 x i16> %B, <8 x i16> %C, i64 0, ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -3932,6 +6623,15 @@ define { <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld2lane(ptr %A, ptr %ptr, <
; CHECK-NEXT: ld2.h { v0, v1 }[0], [x0], #4
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x8, x0, #4
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ld2.h { v0, v1 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2lane.v4i16.p0(<4 x i16> %B, <4 x i16> %C, i64 0, ptr %A)
%tmp = getelementptr i16, ptr %A, i32 2
store ptr %tmp, ptr %ptr
@@ -3947,6 +6647,15 @@ define { <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld2lane(ptr %A, ptr %ptr, i
; CHECK-NEXT: ld2.h { v0, v1 }[0], [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ld2.h { v0, v1 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2lane.v4i16.p0(<4 x i16> %B, <4 x i16> %C, i64 0, ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -3964,6 +6673,15 @@ define { <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld2lane(ptr %A, ptr %ptr, <
; CHECK-NEXT: ld2.s { v0, v1 }[0], [x0], #8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x8, x0, #8
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ld2.s { v0, v1 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i32.p0(<4 x i32> %B, <4 x i32> %C, i64 0, ptr %A)
%tmp = getelementptr i32, ptr %A, i32 2
store ptr %tmp, ptr %ptr
@@ -3979,6 +6697,15 @@ define { <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld2lane(ptr %A, ptr %ptr, i
; CHECK-NEXT: ld2.s { v0, v1 }[0], [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ld2.s { v0, v1 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i32.p0(<4 x i32> %B, <4 x i32> %C, i64 0, ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -3996,6 +6723,15 @@ define { <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld2lane(ptr %A, ptr %ptr, <
; CHECK-NEXT: ld2.s { v0, v1 }[0], [x0], #8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x8, x0, #8
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ld2.s { v0, v1 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2lane.v2i32.p0(<2 x i32> %B, <2 x i32> %C, i64 0, ptr %A)
%tmp = getelementptr i32, ptr %A, i32 2
store ptr %tmp, ptr %ptr
@@ -4011,6 +6747,15 @@ define { <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld2lane(ptr %A, ptr %ptr, i
; CHECK-NEXT: ld2.s { v0, v1 }[0], [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ld2.s { v0, v1 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2lane.v2i32.p0(<2 x i32> %B, <2 x i32> %C, i64 0, ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -4028,6 +6773,15 @@ define { <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld2lane(ptr %A, ptr %ptr, <
; CHECK-NEXT: ld2.d { v0, v1 }[0], [x0], #16
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x8, x0, #16
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ld2.d { v0, v1 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2lane.v2i64.p0(<2 x i64> %B, <2 x i64> %C, i64 0, ptr %A)
%tmp = getelementptr i64, ptr %A, i32 2
store ptr %tmp, ptr %ptr
@@ -4043,6 +6797,15 @@ define { <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld2lane(ptr %A, ptr %ptr, i
; CHECK-NEXT: ld2.d { v0, v1 }[0], [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ld2.d { v0, v1 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2lane.v2i64.p0(<2 x i64> %B, <2 x i64> %C, i64 0, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -4060,6 +6823,15 @@ define { <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld2lane(ptr %A, ptr %ptr, <
; CHECK-NEXT: ld2.d { v0, v1 }[0], [x0], #16
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_imm_ld2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x8, x0, #16
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ld2.d { v0, v1 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2lane.v1i64.p0(<1 x i64> %B, <1 x i64> %C, i64 0, ptr %A)
%tmp = getelementptr i64, ptr %A, i32 2
store ptr %tmp, ptr %ptr
@@ -4075,6 +6847,15 @@ define { <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld2lane(ptr %A, ptr %ptr, i
; CHECK-NEXT: ld2.d { v0, v1 }[0], [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_reg_ld2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ld2.d { v0, v1 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2lane.v1i64.p0(<1 x i64> %B, <1 x i64> %C, i64 0, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -4092,6 +6873,15 @@ define { <4 x float>, <4 x float> } @test_v4f32_post_imm_ld2lane(ptr %A, ptr %pt
; CHECK-NEXT: ld2.s { v0, v1 }[0], [x0], #8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x8, x0, #8
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ld2.s { v0, v1 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2lane.v4f32.p0(<4 x float> %B, <4 x float> %C, i64 0, ptr %A)
%tmp = getelementptr float, ptr %A, i32 2
store ptr %tmp, ptr %ptr
@@ -4107,6 +6897,15 @@ define { <4 x float>, <4 x float> } @test_v4f32_post_reg_ld2lane(ptr %A, ptr %pt
; CHECK-NEXT: ld2.s { v0, v1 }[0], [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ld2.s { v0, v1 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2lane.v4f32.p0(<4 x float> %B, <4 x float> %C, i64 0, ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -4124,6 +6923,15 @@ define { <2 x float>, <2 x float> } @test_v2f32_post_imm_ld2lane(ptr %A, ptr %pt
; CHECK-NEXT: ld2.s { v0, v1 }[0], [x0], #8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x8, x0, #8
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ld2.s { v0, v1 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2lane.v2f32.p0(<2 x float> %B, <2 x float> %C, i64 0, ptr %A)
%tmp = getelementptr float, ptr %A, i32 2
store ptr %tmp, ptr %ptr
@@ -4139,6 +6947,15 @@ define { <2 x float>, <2 x float> } @test_v2f32_post_reg_ld2lane(ptr %A, ptr %pt
; CHECK-NEXT: ld2.s { v0, v1 }[0], [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ld2.s { v0, v1 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2lane.v2f32.p0(<2 x float> %B, <2 x float> %C, i64 0, ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -4156,6 +6973,15 @@ define { <2 x double>, <2 x double> } @test_v2f64_post_imm_ld2lane(ptr %A, ptr %
; CHECK-NEXT: ld2.d { v0, v1 }[0], [x0], #16
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x8, x0, #16
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ld2.d { v0, v1 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2lane.v2f64.p0(<2 x double> %B, <2 x double> %C, i64 0, ptr %A)
%tmp = getelementptr double, ptr %A, i32 2
store ptr %tmp, ptr %ptr
@@ -4171,6 +6997,15 @@ define { <2 x double>, <2 x double> } @test_v2f64_post_reg_ld2lane(ptr %A, ptr %
; CHECK-NEXT: ld2.d { v0, v1 }[0], [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ld2.d { v0, v1 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2lane.v2f64.p0(<2 x double> %B, <2 x double> %C, i64 0, ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -4188,6 +7023,15 @@ define { <1 x double>, <1 x double> } @test_v1f64_post_imm_ld2lane(ptr %A, ptr %
; CHECK-NEXT: ld2.d { v0, v1 }[0], [x0], #16
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_imm_ld2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x8, x0, #16
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ld2.d { v0, v1 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2lane.v1f64.p0(<1 x double> %B, <1 x double> %C, i64 0, ptr %A)
%tmp = getelementptr double, ptr %A, i32 2
store ptr %tmp, ptr %ptr
@@ -4203,6 +7047,15 @@ define { <1 x double>, <1 x double> } @test_v1f64_post_reg_ld2lane(ptr %A, ptr %
; CHECK-NEXT: ld2.d { v0, v1 }[0], [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_reg_ld2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ld2.d { v0, v1 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld2 = call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2lane.v1f64.p0(<1 x double> %B, <1 x double> %C, i64 0, ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -4221,6 +7074,16 @@ define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld3lane(ptr %A,
; CHECK-NEXT: ld3.b { v0, v1, v2 }[0], [x0], #3
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x8, x0, #3
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ld3.b { v0, v1, v2 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3lane.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i64 0, ptr %A)
%tmp = getelementptr i8, ptr %A, i32 3
store ptr %tmp, ptr %ptr
@@ -4236,6 +7099,16 @@ define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld3lane(ptr %A,
; CHECK-NEXT: ld3.b { v0, v1, v2 }[0], [x0], x2
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x8, x0, x2
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ld3.b { v0, v1, v2 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3lane.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i64 0, ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -4254,6 +7127,16 @@ define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld3lane(ptr %A, ptr
; CHECK-NEXT: ld3.b { v0, v1, v2 }[0], [x0], #3
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x8, x0, #3
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ld3.b { v0, v1, v2 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3lane.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i64 0, ptr %A)
%tmp = getelementptr i8, ptr %A, i32 3
store ptr %tmp, ptr %ptr
@@ -4269,6 +7152,16 @@ define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld3lane(ptr %A, ptr
; CHECK-NEXT: ld3.b { v0, v1, v2 }[0], [x0], x2
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x8, x0, x2
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ld3.b { v0, v1, v2 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3lane.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i64 0, ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -4287,6 +7180,16 @@ define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld3lane(ptr %A,
; CHECK-NEXT: ld3.h { v0, v1, v2 }[0], [x0], #6
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x8, x0, #6
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ld3.h { v0, v1, v2 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3lane.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i64 0, ptr %A)
%tmp = getelementptr i16, ptr %A, i32 3
store ptr %tmp, ptr %ptr
@@ -4303,6 +7206,16 @@ define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld3lane(ptr %A,
; CHECK-NEXT: ld3.h { v0, v1, v2 }[0], [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ld3.h { v0, v1, v2 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3lane.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i64 0, ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -4321,6 +7234,16 @@ define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld3lane(ptr %A,
; CHECK-NEXT: ld3.h { v0, v1, v2 }[0], [x0], #6
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x8, x0, #6
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ld3.h { v0, v1, v2 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3lane.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i64 0, ptr %A)
%tmp = getelementptr i16, ptr %A, i32 3
store ptr %tmp, ptr %ptr
@@ -4337,6 +7260,16 @@ define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld3lane(ptr %A,
; CHECK-NEXT: ld3.h { v0, v1, v2 }[0], [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ld3.h { v0, v1, v2 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3lane.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i64 0, ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -4355,6 +7288,16 @@ define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld3lane(ptr %A,
; CHECK-NEXT: ld3.s { v0, v1, v2 }[0], [x0], #12
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x8, x0, #12
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ld3.s { v0, v1, v2 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3lane.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i64 0, ptr %A)
%tmp = getelementptr i32, ptr %A, i32 3
store ptr %tmp, ptr %ptr
@@ -4371,6 +7314,16 @@ define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld3lane(ptr %A,
; CHECK-NEXT: ld3.s { v0, v1, v2 }[0], [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ld3.s { v0, v1, v2 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3lane.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i64 0, ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -4389,6 +7342,16 @@ define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld3lane(ptr %A,
; CHECK-NEXT: ld3.s { v0, v1, v2 }[0], [x0], #12
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x8, x0, #12
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ld3.s { v0, v1, v2 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3lane.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i64 0, ptr %A)
%tmp = getelementptr i32, ptr %A, i32 3
store ptr %tmp, ptr %ptr
@@ -4405,6 +7368,16 @@ define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld3lane(ptr %A,
; CHECK-NEXT: ld3.s { v0, v1, v2 }[0], [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ld3.s { v0, v1, v2 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3lane.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i64 0, ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -4423,6 +7396,16 @@ define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld3lane(ptr %A,
; CHECK-NEXT: ld3.d { v0, v1, v2 }[0], [x0], #24
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x8, x0, #24
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ld3.d { v0, v1, v2 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3lane.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64 0, ptr %A)
%tmp = getelementptr i64, ptr %A, i32 3
store ptr %tmp, ptr %ptr
@@ -4439,6 +7422,16 @@ define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld3lane(ptr %A,
; CHECK-NEXT: ld3.d { v0, v1, v2 }[0], [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ld3.d { v0, v1, v2 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3lane.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64 0, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -4457,6 +7450,16 @@ define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld3lane(ptr %A,
; CHECK-NEXT: ld3.d { v0, v1, v2 }[0], [x0], #24
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_imm_ld3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x8, x0, #24
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ld3.d { v0, v1, v2 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3lane.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64 0, ptr %A)
%tmp = getelementptr i64, ptr %A, i32 3
store ptr %tmp, ptr %ptr
@@ -4473,6 +7476,16 @@ define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld3lane(ptr %A,
; CHECK-NEXT: ld3.d { v0, v1, v2 }[0], [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_reg_ld3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ld3.d { v0, v1, v2 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3lane.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64 0, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -4491,6 +7504,16 @@ define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld3lane(pt
; CHECK-NEXT: ld3.s { v0, v1, v2 }[0], [x0], #12
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x8, x0, #12
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ld3.s { v0, v1, v2 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3lane.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, i64 0, ptr %A)
%tmp = getelementptr float, ptr %A, i32 3
store ptr %tmp, ptr %ptr
@@ -4507,6 +7530,16 @@ define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_reg_ld3lane(pt
; CHECK-NEXT: ld3.s { v0, v1, v2 }[0], [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ld3.s { v0, v1, v2 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3lane.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, i64 0, ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -4525,6 +7558,16 @@ define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld3lane(pt
; CHECK-NEXT: ld3.s { v0, v1, v2 }[0], [x0], #12
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x8, x0, #12
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ld3.s { v0, v1, v2 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3lane.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, i64 0, ptr %A)
%tmp = getelementptr float, ptr %A, i32 3
store ptr %tmp, ptr %ptr
@@ -4541,6 +7584,16 @@ define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_reg_ld3lane(pt
; CHECK-NEXT: ld3.s { v0, v1, v2 }[0], [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ld3.s { v0, v1, v2 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3lane.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, i64 0, ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -4559,6 +7612,16 @@ define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld3lane
; CHECK-NEXT: ld3.d { v0, v1, v2 }[0], [x0], #24
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x8, x0, #24
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ld3.d { v0, v1, v2 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3lane.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, i64 0, ptr %A)
%tmp = getelementptr double, ptr %A, i32 3
store ptr %tmp, ptr %ptr
@@ -4575,6 +7638,16 @@ define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_reg_ld3lane
; CHECK-NEXT: ld3.d { v0, v1, v2 }[0], [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ld3.d { v0, v1, v2 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3lane.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, i64 0, ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -4593,6 +7666,16 @@ define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld3lane
; CHECK-NEXT: ld3.d { v0, v1, v2 }[0], [x0], #24
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_imm_ld3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x8, x0, #24
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ld3.d { v0, v1, v2 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3lane.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, i64 0, ptr %A)
%tmp = getelementptr double, ptr %A, i32 3
store ptr %tmp, ptr %ptr
@@ -4609,6 +7692,16 @@ define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_reg_ld3lane
; CHECK-NEXT: ld3.d { v0, v1, v2 }[0], [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_reg_ld3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ld3.d { v0, v1, v2 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld3 = call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3lane.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, i64 0, ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -4628,6 +7721,17 @@ define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld4la
; CHECK-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0], #4
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: add x8, x0, #4
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4lane.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, i64 0, ptr %A)
%tmp = getelementptr i8, ptr %A, i32 4
store ptr %tmp, ptr %ptr
@@ -4644,6 +7748,17 @@ define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld4la
; CHECK-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0], x2
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: add x8, x0, x2
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4lane.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, i64 0, ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -4663,6 +7778,17 @@ define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld4lane(pt
; CHECK-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0], #4
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: add x8, x0, #4
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4lane.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, i64 0, ptr %A)
%tmp = getelementptr i8, ptr %A, i32 4
store ptr %tmp, ptr %ptr
@@ -4679,6 +7805,17 @@ define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld4lane(pt
; CHECK-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0], x2
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: add x8, x0, x2
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4lane.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, i64 0, ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -4698,6 +7835,17 @@ define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld4la
; CHECK-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0], #8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: add x8, x0, #8
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4lane.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, i64 0, ptr %A)
%tmp = getelementptr i16, ptr %A, i32 4
store ptr %tmp, ptr %ptr
@@ -4715,6 +7863,17 @@ define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld4la
; CHECK-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4lane.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, i64 0, ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -4734,6 +7893,17 @@ define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld4la
; CHECK-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0], #8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: add x8, x0, #8
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4lane.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, i64 0, ptr %A)
%tmp = getelementptr i16, ptr %A, i32 4
store ptr %tmp, ptr %ptr
@@ -4751,6 +7921,17 @@ define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld4la
; CHECK-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4lane.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, i64 0, ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -4770,6 +7951,17 @@ define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld4la
; CHECK-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], #16
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: add x8, x0, #16
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4lane.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, i64 0, ptr %A)
%tmp = getelementptr i32, ptr %A, i32 4
store ptr %tmp, ptr %ptr
@@ -4787,6 +7979,17 @@ define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld4la
; CHECK-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4lane.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, i64 0, ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -4806,6 +8009,17 @@ define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld4la
; CHECK-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], #16
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: add x8, x0, #16
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4lane.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, i64 0, ptr %A)
%tmp = getelementptr i32, ptr %A, i32 4
store ptr %tmp, ptr %ptr
@@ -4823,6 +8037,17 @@ define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld4la
; CHECK-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4lane.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, i64 0, ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -4842,6 +8067,17 @@ define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld4la
; CHECK-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], #32
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: add x8, x0, #32
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4lane.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, i64 0, ptr %A)
%tmp = getelementptr i64, ptr %A, i32 4
store ptr %tmp, ptr %ptr
@@ -4859,6 +8095,17 @@ define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld4la
; CHECK-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4lane.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, i64 0, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -4878,6 +8125,17 @@ define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld4la
; CHECK-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], #32
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_imm_ld4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: add x8, x0, #32
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4lane.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, i64 0, ptr %A)
%tmp = getelementptr i64, ptr %A, i32 4
store ptr %tmp, ptr %ptr
@@ -4895,6 +8153,17 @@ define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld4la
; CHECK-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_reg_ld4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4lane.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, i64 0, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -4914,6 +8183,17 @@ define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_i
; CHECK-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], #16
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: add x8, x0, #16
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld4lane.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, i64 0, ptr %A)
%tmp = getelementptr float, ptr %A, i32 4
store ptr %tmp, ptr %ptr
@@ -4931,6 +8211,17 @@ define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_r
; CHECK-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld4lane.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, i64 0, ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -4950,6 +8241,17 @@ define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_i
; CHECK-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], #16
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: add x8, x0, #16
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld4lane.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, i64 0, ptr %A)
%tmp = getelementptr float, ptr %A, i32 4
store ptr %tmp, ptr %ptr
@@ -4967,6 +8269,17 @@ define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_r
; CHECK-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld4lane.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, i64 0, ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -4986,6 +8299,17 @@ define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_po
; CHECK-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], #32
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: add x8, x0, #32
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4lane.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, i64 0, ptr %A)
%tmp = getelementptr double, ptr %A, i32 4
store ptr %tmp, ptr %ptr
@@ -5003,6 +8327,17 @@ define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_po
; CHECK-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4lane.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, i64 0, ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -5022,6 +8357,17 @@ define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_po
; CHECK-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], #32
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_imm_ld4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: add x8, x0, #32
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4lane.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, i64 0, ptr %A)
%tmp = getelementptr double, ptr %A, i32 4
store ptr %tmp, ptr %ptr
@@ -5039,6 +8385,17 @@ define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_po
; CHECK-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_reg_ld4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%ld4 = call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4lane.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, i64 0, ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
store ptr %tmp, ptr %ptr
@@ -5055,6 +8412,15 @@ define ptr @test_v16i8_post_imm_st2(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st2.16b { v0, v1 }, [x0], #32
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_imm_st2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x0, x0, #32
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st2.16b { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2.v16i8.p0(<16 x i8> %B, <16 x i8> %C, ptr %A)
%tmp = getelementptr i8, ptr %A, i32 32
ret ptr %tmp
@@ -5067,6 +8433,15 @@ define ptr @test_v16i8_post_reg_st2(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st2.16b { v0, v1 }, [x0], x2
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_reg_st2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x0, x0, x2
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st2.16b { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2.v16i8.p0(<16 x i8> %B, <16 x i8> %C, ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
ret ptr %tmp
@@ -5082,6 +8457,15 @@ define ptr @test_v8i8_post_imm_st2(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C) n
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
; CHECK-NEXT: st2.8b { v0, v1 }, [x0], #16
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_imm_st2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: add x0, x0, #16
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: st2.8b { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2.v8i8.p0(<8 x i8> %B, <8 x i8> %C, ptr %A)
%tmp = getelementptr i8, ptr %A, i32 16
ret ptr %tmp
@@ -5094,6 +8478,15 @@ define ptr @test_v8i8_post_reg_st2(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, i
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
; CHECK-NEXT: st2.8b { v0, v1 }, [x0], x2
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_reg_st2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: add x0, x0, x2
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: st2.8b { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2.v8i8.p0(<8 x i8> %B, <8 x i8> %C, ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
ret ptr %tmp
@@ -5109,6 +8502,15 @@ define ptr @test_v8i16_post_imm_st2(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st2.8h { v0, v1 }, [x0], #32
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_imm_st2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x0, x0, #32
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st2.8h { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2.v8i16.p0(<8 x i16> %B, <8 x i16> %C, ptr %A)
%tmp = getelementptr i16, ptr %A, i32 16
ret ptr %tmp
@@ -5122,6 +8524,15 @@ define ptr @test_v8i16_post_reg_st2(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st2.8h { v0, v1 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_reg_st2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st2.8h { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2.v8i16.p0(<8 x i16> %B, <8 x i16> %C, ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
ret ptr %tmp
@@ -5137,6 +8548,15 @@ define ptr @test_v4i16_post_imm_st2(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
; CHECK-NEXT: st2.4h { v0, v1 }, [x0], #16
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_imm_st2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: add x0, x0, #16
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: st2.4h { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2.v4i16.p0(<4 x i16> %B, <4 x i16> %C, ptr %A)
%tmp = getelementptr i16, ptr %A, i32 8
ret ptr %tmp
@@ -5150,6 +8570,15 @@ define ptr @test_v4i16_post_reg_st2(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
; CHECK-NEXT: st2.4h { v0, v1 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_reg_st2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: st2.4h { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2.v4i16.p0(<4 x i16> %B, <4 x i16> %C, ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
ret ptr %tmp
@@ -5165,6 +8594,15 @@ define ptr @test_v4i32_post_imm_st2(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st2.4s { v0, v1 }, [x0], #32
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_imm_st2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x0, x0, #32
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st2.4s { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2.v4i32.p0(<4 x i32> %B, <4 x i32> %C, ptr %A)
%tmp = getelementptr i32, ptr %A, i32 8
ret ptr %tmp
@@ -5178,6 +8616,15 @@ define ptr @test_v4i32_post_reg_st2(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st2.4s { v0, v1 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_reg_st2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st2.4s { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2.v4i32.p0(<4 x i32> %B, <4 x i32> %C, ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
ret ptr %tmp
@@ -5193,6 +8640,15 @@ define ptr @test_v2i32_post_imm_st2(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
; CHECK-NEXT: st2.2s { v0, v1 }, [x0], #16
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_imm_st2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: add x0, x0, #16
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: st2.2s { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2.v2i32.p0(<2 x i32> %B, <2 x i32> %C, ptr %A)
%tmp = getelementptr i32, ptr %A, i32 4
ret ptr %tmp
@@ -5206,6 +8662,15 @@ define ptr @test_v2i32_post_reg_st2(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
; CHECK-NEXT: st2.2s { v0, v1 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_reg_st2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: st2.2s { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2.v2i32.p0(<2 x i32> %B, <2 x i32> %C, ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
ret ptr %tmp
@@ -5221,6 +8686,15 @@ define ptr @test_v2i64_post_imm_st2(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st2.2d { v0, v1 }, [x0], #32
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_imm_st2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x0, x0, #32
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st2.2d { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2.v2i64.p0(<2 x i64> %B, <2 x i64> %C, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 4
ret ptr %tmp
@@ -5234,6 +8708,15 @@ define ptr @test_v2i64_post_reg_st2(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st2.2d { v0, v1 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_reg_st2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st2.2d { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2.v2i64.p0(<2 x i64> %B, <2 x i64> %C, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
ret ptr %tmp
@@ -5249,6 +8732,15 @@ define ptr @test_v1i64_post_imm_st2(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
; CHECK-NEXT: st1.1d { v0, v1 }, [x0], #16
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_imm_st2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: add x0, x0, #16
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: st1.1d { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2.v1i64.p0(<1 x i64> %B, <1 x i64> %C, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 2
ret ptr %tmp
@@ -5262,6 +8754,15 @@ define ptr @test_v1i64_post_reg_st2(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
; CHECK-NEXT: st1.1d { v0, v1 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_reg_st2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: st1.1d { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2.v1i64.p0(<1 x i64> %B, <1 x i64> %C, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
ret ptr %tmp
@@ -5277,6 +8778,15 @@ define ptr @test_v4f32_post_imm_st2(ptr %A, ptr %ptr, <4 x float> %B, <4 x float
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st2.4s { v0, v1 }, [x0], #32
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_imm_st2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x0, x0, #32
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st2.4s { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2.v4f32.p0(<4 x float> %B, <4 x float> %C, ptr %A)
%tmp = getelementptr float, ptr %A, i32 8
ret ptr %tmp
@@ -5290,6 +8800,15 @@ define ptr @test_v4f32_post_reg_st2(ptr %A, ptr %ptr, <4 x float> %B, <4 x float
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st2.4s { v0, v1 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_reg_st2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st2.4s { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2.v4f32.p0(<4 x float> %B, <4 x float> %C, ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
ret ptr %tmp
@@ -5305,6 +8824,15 @@ define ptr @test_v2f32_post_imm_st2(ptr %A, ptr %ptr, <2 x float> %B, <2 x float
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
; CHECK-NEXT: st2.2s { v0, v1 }, [x0], #16
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_imm_st2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: add x0, x0, #16
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: st2.2s { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2.v2f32.p0(<2 x float> %B, <2 x float> %C, ptr %A)
%tmp = getelementptr float, ptr %A, i32 4
ret ptr %tmp
@@ -5318,6 +8846,15 @@ define ptr @test_v2f32_post_reg_st2(ptr %A, ptr %ptr, <2 x float> %B, <2 x float
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
; CHECK-NEXT: st2.2s { v0, v1 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_reg_st2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: st2.2s { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2.v2f32.p0(<2 x float> %B, <2 x float> %C, ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
ret ptr %tmp
@@ -5333,6 +8870,15 @@ define ptr @test_v2f64_post_imm_st2(ptr %A, ptr %ptr, <2 x double> %B, <2 x doub
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st2.2d { v0, v1 }, [x0], #32
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_imm_st2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x0, x0, #32
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st2.2d { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2.v2f64.p0(<2 x double> %B, <2 x double> %C, ptr %A)
%tmp = getelementptr double, ptr %A, i64 4
ret ptr %tmp
@@ -5346,6 +8892,15 @@ define ptr @test_v2f64_post_reg_st2(ptr %A, ptr %ptr, <2 x double> %B, <2 x doub
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st2.2d { v0, v1 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_reg_st2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st2.2d { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2.v2f64.p0(<2 x double> %B, <2 x double> %C, ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
ret ptr %tmp
@@ -5361,6 +8916,15 @@ define ptr @test_v1f64_post_imm_st2(ptr %A, ptr %ptr, <1 x double> %B, <1 x doub
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
; CHECK-NEXT: st1.1d { v0, v1 }, [x0], #16
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_imm_st2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: add x0, x0, #16
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: st1.1d { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2.v1f64.p0(<1 x double> %B, <1 x double> %C, ptr %A)
%tmp = getelementptr double, ptr %A, i64 2
ret ptr %tmp
@@ -5374,6 +8938,15 @@ define ptr @test_v1f64_post_reg_st2(ptr %A, ptr %ptr, <1 x double> %B, <1 x doub
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
; CHECK-NEXT: st1.1d { v0, v1 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_reg_st2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: st1.1d { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2.v1f64.p0(<1 x double> %B, <1 x double> %C, ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
ret ptr %tmp
@@ -5390,6 +8963,16 @@ define ptr @test_v16i8_post_imm_st3(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st3.16b { v0, v1, v2 }, [x0], #48
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_imm_st3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #48
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st3.16b { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, ptr %A)
%tmp = getelementptr i8, ptr %A, i32 48
ret ptr %tmp
@@ -5403,6 +8986,16 @@ define ptr @test_v16i8_post_reg_st3(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st3.16b { v0, v1, v2 }, [x0], x2
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_reg_st3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st3.16b { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
ret ptr %tmp
@@ -5419,6 +9012,16 @@ define ptr @test_v8i8_post_imm_st3(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
; CHECK-NEXT: st3.8b { v0, v1, v2 }, [x0], #24
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_imm_st3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #24
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: st3.8b { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, ptr %A)
%tmp = getelementptr i8, ptr %A, i32 24
ret ptr %tmp
@@ -5432,6 +9035,16 @@ define ptr @test_v8i8_post_reg_st3(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
; CHECK-NEXT: st3.8b { v0, v1, v2 }, [x0], x2
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_reg_st3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: st3.8b { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
ret ptr %tmp
@@ -5448,6 +9061,16 @@ define ptr @test_v8i16_post_imm_st3(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st3.8h { v0, v1, v2 }, [x0], #48
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_imm_st3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #48
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st3.8h { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, ptr %A)
%tmp = getelementptr i16, ptr %A, i32 24
ret ptr %tmp
@@ -5462,6 +9085,16 @@ define ptr @test_v8i16_post_reg_st3(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st3.8h { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_reg_st3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st3.8h { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
ret ptr %tmp
@@ -5478,6 +9111,16 @@ define ptr @test_v4i16_post_imm_st3(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
; CHECK-NEXT: st3.4h { v0, v1, v2 }, [x0], #24
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_imm_st3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #24
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: st3.4h { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, ptr %A)
%tmp = getelementptr i16, ptr %A, i32 12
ret ptr %tmp
@@ -5492,6 +9135,16 @@ define ptr @test_v4i16_post_reg_st3(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
; CHECK-NEXT: st3.4h { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_reg_st3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: st3.4h { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
ret ptr %tmp
@@ -5508,6 +9161,16 @@ define ptr @test_v4i32_post_imm_st3(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st3.4s { v0, v1, v2 }, [x0], #48
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_imm_st3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #48
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st3.4s { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, ptr %A)
%tmp = getelementptr i32, ptr %A, i32 12
ret ptr %tmp
@@ -5522,6 +9185,16 @@ define ptr @test_v4i32_post_reg_st3(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st3.4s { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_reg_st3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st3.4s { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
ret ptr %tmp
@@ -5538,6 +9211,16 @@ define ptr @test_v2i32_post_imm_st3(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
; CHECK-NEXT: st3.2s { v0, v1, v2 }, [x0], #24
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_imm_st3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #24
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: st3.2s { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, ptr %A)
%tmp = getelementptr i32, ptr %A, i32 6
ret ptr %tmp
@@ -5552,6 +9235,16 @@ define ptr @test_v2i32_post_reg_st3(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
; CHECK-NEXT: st3.2s { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_reg_st3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: st3.2s { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
ret ptr %tmp
@@ -5568,6 +9261,16 @@ define ptr @test_v2i64_post_imm_st3(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st3.2d { v0, v1, v2 }, [x0], #48
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_imm_st3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #48
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st3.2d { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 6
ret ptr %tmp
@@ -5582,6 +9285,16 @@ define ptr @test_v2i64_post_reg_st3(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st3.2d { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_reg_st3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st3.2d { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
ret ptr %tmp
@@ -5598,6 +9311,16 @@ define ptr @test_v1i64_post_imm_st3(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
; CHECK-NEXT: st1.1d { v0, v1, v2 }, [x0], #24
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_imm_st3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #24
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: st1.1d { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 3
ret ptr %tmp
@@ -5612,6 +9335,16 @@ define ptr @test_v1i64_post_reg_st3(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
; CHECK-NEXT: st1.1d { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_reg_st3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: st1.1d { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
ret ptr %tmp
@@ -5628,6 +9361,16 @@ define ptr @test_v4f32_post_imm_st3(ptr %A, ptr %ptr, <4 x float> %B, <4 x float
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st3.4s { v0, v1, v2 }, [x0], #48
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_imm_st3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #48
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st3.4s { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, ptr %A)
%tmp = getelementptr float, ptr %A, i32 12
ret ptr %tmp
@@ -5642,6 +9385,16 @@ define ptr @test_v4f32_post_reg_st3(ptr %A, ptr %ptr, <4 x float> %B, <4 x float
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st3.4s { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_reg_st3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st3.4s { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
ret ptr %tmp
@@ -5658,6 +9411,16 @@ define ptr @test_v2f32_post_imm_st3(ptr %A, ptr %ptr, <2 x float> %B, <2 x float
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
; CHECK-NEXT: st3.2s { v0, v1, v2 }, [x0], #24
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_imm_st3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #24
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: st3.2s { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, ptr %A)
%tmp = getelementptr float, ptr %A, i32 6
ret ptr %tmp
@@ -5672,6 +9435,16 @@ define ptr @test_v2f32_post_reg_st3(ptr %A, ptr %ptr, <2 x float> %B, <2 x float
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
; CHECK-NEXT: st3.2s { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_reg_st3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: st3.2s { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
ret ptr %tmp
@@ -5688,6 +9461,16 @@ define ptr @test_v2f64_post_imm_st3(ptr %A, ptr %ptr, <2 x double> %B, <2 x doub
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st3.2d { v0, v1, v2 }, [x0], #48
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_imm_st3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #48
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st3.2d { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, ptr %A)
%tmp = getelementptr double, ptr %A, i64 6
ret ptr %tmp
@@ -5702,6 +9485,16 @@ define ptr @test_v2f64_post_reg_st3(ptr %A, ptr %ptr, <2 x double> %B, <2 x doub
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st3.2d { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_reg_st3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st3.2d { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
ret ptr %tmp
@@ -5718,6 +9511,16 @@ define ptr @test_v1f64_post_imm_st3(ptr %A, ptr %ptr, <1 x double> %B, <1 x doub
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
; CHECK-NEXT: st1.1d { v0, v1, v2 }, [x0], #24
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_imm_st3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #24
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: st1.1d { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, ptr %A)
%tmp = getelementptr double, ptr %A, i64 3
ret ptr %tmp
@@ -5732,6 +9535,16 @@ define ptr @test_v1f64_post_reg_st3(ptr %A, ptr %ptr, <1 x double> %B, <1 x doub
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
; CHECK-NEXT: st1.1d { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_reg_st3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: st1.1d { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
ret ptr %tmp
@@ -5749,6 +9562,17 @@ define ptr @test_v16i8_post_imm_st4(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st4.16b { v0, v1, v2, v3 }, [x0], #64
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_imm_st4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #64
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st4.16b { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, ptr %A)
%tmp = getelementptr i8, ptr %A, i32 64
ret ptr %tmp
@@ -5763,6 +9587,17 @@ define ptr @test_v16i8_post_reg_st4(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st4.16b { v0, v1, v2, v3 }, [x0], x2
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_reg_st4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st4.16b { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
ret ptr %tmp
@@ -5780,6 +9615,17 @@ define ptr @test_v8i8_post_imm_st4(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
; CHECK-NEXT: st4.8b { v0, v1, v2, v3 }, [x0], #32
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_imm_st4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #32
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: st4.8b { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, ptr %A)
%tmp = getelementptr i8, ptr %A, i32 32
ret ptr %tmp
@@ -5794,6 +9640,17 @@ define ptr @test_v8i8_post_reg_st4(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
; CHECK-NEXT: st4.8b { v0, v1, v2, v3 }, [x0], x2
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_reg_st4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: st4.8b { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
ret ptr %tmp
@@ -5811,6 +9668,17 @@ define ptr @test_v8i16_post_imm_st4(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st4.8h { v0, v1, v2, v3 }, [x0], #64
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_imm_st4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #64
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st4.8h { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, ptr %A)
%tmp = getelementptr i16, ptr %A, i32 32
ret ptr %tmp
@@ -5826,6 +9694,17 @@ define ptr @test_v8i16_post_reg_st4(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st4.8h { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_reg_st4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st4.8h { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
ret ptr %tmp
@@ -5843,6 +9722,17 @@ define ptr @test_v4i16_post_imm_st4(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
; CHECK-NEXT: st4.4h { v0, v1, v2, v3 }, [x0], #32
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_imm_st4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #32
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: st4.4h { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, ptr %A)
%tmp = getelementptr i16, ptr %A, i32 16
ret ptr %tmp
@@ -5858,6 +9748,17 @@ define ptr @test_v4i16_post_reg_st4(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
; CHECK-NEXT: st4.4h { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_reg_st4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: st4.4h { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
ret ptr %tmp
@@ -5875,6 +9776,17 @@ define ptr @test_v4i32_post_imm_st4(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st4.4s { v0, v1, v2, v3 }, [x0], #64
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_imm_st4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #64
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st4.4s { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, ptr %A)
%tmp = getelementptr i32, ptr %A, i32 16
ret ptr %tmp
@@ -5890,6 +9802,17 @@ define ptr @test_v4i32_post_reg_st4(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st4.4s { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_reg_st4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st4.4s { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
ret ptr %tmp
@@ -5907,6 +9830,17 @@ define ptr @test_v2i32_post_imm_st4(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
; CHECK-NEXT: st4.2s { v0, v1, v2, v3 }, [x0], #32
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_imm_st4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #32
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: st4.2s { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, ptr %A)
%tmp = getelementptr i32, ptr %A, i32 8
ret ptr %tmp
@@ -5922,6 +9856,17 @@ define ptr @test_v2i32_post_reg_st4(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
; CHECK-NEXT: st4.2s { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_reg_st4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: st4.2s { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
ret ptr %tmp
@@ -5939,6 +9884,17 @@ define ptr @test_v2i64_post_imm_st4(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st4.2d { v0, v1, v2, v3 }, [x0], #64
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_imm_st4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #64
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st4.2d { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 8
ret ptr %tmp
@@ -5954,6 +9910,17 @@ define ptr @test_v2i64_post_reg_st4(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st4.2d { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_reg_st4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st4.2d { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
ret ptr %tmp
@@ -5971,6 +9938,17 @@ define ptr @test_v1i64_post_imm_st4(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
; CHECK-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], #32
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_imm_st4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #32
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: st1.1d { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 4
ret ptr %tmp
@@ -5986,6 +9964,17 @@ define ptr @test_v1i64_post_reg_st4(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
; CHECK-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_reg_st4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: st1.1d { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
ret ptr %tmp
@@ -6003,6 +9992,17 @@ define ptr @test_v4f32_post_imm_st4(ptr %A, ptr %ptr, <4 x float> %B, <4 x float
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st4.4s { v0, v1, v2, v3 }, [x0], #64
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_imm_st4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #64
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st4.4s { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, ptr %A)
%tmp = getelementptr float, ptr %A, i32 16
ret ptr %tmp
@@ -6018,6 +10018,17 @@ define ptr @test_v4f32_post_reg_st4(ptr %A, ptr %ptr, <4 x float> %B, <4 x float
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st4.4s { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_reg_st4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st4.4s { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
ret ptr %tmp
@@ -6035,6 +10046,17 @@ define ptr @test_v2f32_post_imm_st4(ptr %A, ptr %ptr, <2 x float> %B, <2 x float
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
; CHECK-NEXT: st4.2s { v0, v1, v2, v3 }, [x0], #32
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_imm_st4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #32
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: st4.2s { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, ptr %A)
%tmp = getelementptr float, ptr %A, i32 8
ret ptr %tmp
@@ -6050,6 +10072,17 @@ define ptr @test_v2f32_post_reg_st4(ptr %A, ptr %ptr, <2 x float> %B, <2 x float
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
; CHECK-NEXT: st4.2s { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_reg_st4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: st4.2s { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
ret ptr %tmp
@@ -6067,6 +10100,17 @@ define ptr @test_v2f64_post_imm_st4(ptr %A, ptr %ptr, <2 x double> %B, <2 x doub
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st4.2d { v0, v1, v2, v3 }, [x0], #64
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_imm_st4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #64
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st4.2d { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, ptr %A)
%tmp = getelementptr double, ptr %A, i64 8
ret ptr %tmp
@@ -6082,6 +10126,17 @@ define ptr @test_v2f64_post_reg_st4(ptr %A, ptr %ptr, <2 x double> %B, <2 x doub
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st4.2d { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_reg_st4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st4.2d { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
ret ptr %tmp
@@ -6099,6 +10154,17 @@ define ptr @test_v1f64_post_imm_st4(ptr %A, ptr %ptr, <1 x double> %B, <1 x doub
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
; CHECK-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], #32
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_imm_st4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #32
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: st1.1d { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, ptr %A)
%tmp = getelementptr double, ptr %A, i64 4
ret ptr %tmp
@@ -6114,6 +10180,17 @@ define ptr @test_v1f64_post_reg_st4(ptr %A, ptr %ptr, <1 x double> %B, <1 x doub
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
; CHECK-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_reg_st4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: st1.1d { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
ret ptr %tmp
@@ -6129,6 +10206,15 @@ define ptr @test_v16i8_post_imm_st1x2(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8>
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st1.16b { v0, v1 }, [x0], #32
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_imm_st1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x0, x0, #32
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st1.16b { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x2.v16i8.p0(<16 x i8> %B, <16 x i8> %C, ptr %A)
%tmp = getelementptr i8, ptr %A, i32 32
ret ptr %tmp
@@ -6141,6 +10227,15 @@ define ptr @test_v16i8_post_reg_st1x2(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8>
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st1.16b { v0, v1 }, [x0], x2
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_reg_st1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x0, x0, x2
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st1.16b { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x2.v16i8.p0(<16 x i8> %B, <16 x i8> %C, ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
ret ptr %tmp
@@ -6156,6 +10251,15 @@ define ptr @test_v8i8_post_imm_st1x2(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C)
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
; CHECK-NEXT: st1.8b { v0, v1 }, [x0], #16
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_imm_st1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: add x0, x0, #16
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: st1.8b { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x2.v8i8.p0(<8 x i8> %B, <8 x i8> %C, ptr %A)
%tmp = getelementptr i8, ptr %A, i32 16
ret ptr %tmp
@@ -6168,6 +10272,15 @@ define ptr @test_v8i8_post_reg_st1x2(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C,
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
; CHECK-NEXT: st1.8b { v0, v1 }, [x0], x2
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_reg_st1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: add x0, x0, x2
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: st1.8b { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x2.v8i8.p0(<8 x i8> %B, <8 x i8> %C, ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
ret ptr %tmp
@@ -6183,6 +10296,15 @@ define ptr @test_v8i16_post_imm_st1x2(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16>
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st1.8h { v0, v1 }, [x0], #32
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_imm_st1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x0, x0, #32
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st1.8h { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x2.v8i16.p0(<8 x i16> %B, <8 x i16> %C, ptr %A)
%tmp = getelementptr i16, ptr %A, i32 16
ret ptr %tmp
@@ -6196,6 +10318,15 @@ define ptr @test_v8i16_post_reg_st1x2(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16>
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st1.8h { v0, v1 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_reg_st1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st1.8h { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x2.v8i16.p0(<8 x i16> %B, <8 x i16> %C, ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
ret ptr %tmp
@@ -6211,6 +10342,15 @@ define ptr @test_v4i16_post_imm_st1x2(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16>
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
; CHECK-NEXT: st1.4h { v0, v1 }, [x0], #16
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_imm_st1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: add x0, x0, #16
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: st1.4h { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x2.v4i16.p0(<4 x i16> %B, <4 x i16> %C, ptr %A)
%tmp = getelementptr i16, ptr %A, i32 8
ret ptr %tmp
@@ -6224,6 +10364,15 @@ define ptr @test_v4i16_post_reg_st1x2(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16>
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
; CHECK-NEXT: st1.4h { v0, v1 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_reg_st1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: st1.4h { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x2.v4i16.p0(<4 x i16> %B, <4 x i16> %C, ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
ret ptr %tmp
@@ -6239,6 +10388,15 @@ define ptr @test_v4i32_post_imm_st1x2(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32>
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st1.4s { v0, v1 }, [x0], #32
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_imm_st1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x0, x0, #32
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st1.4s { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x2.v4i32.p0(<4 x i32> %B, <4 x i32> %C, ptr %A)
%tmp = getelementptr i32, ptr %A, i32 8
ret ptr %tmp
@@ -6252,6 +10410,15 @@ define ptr @test_v4i32_post_reg_st1x2(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32>
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st1.4s { v0, v1 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_reg_st1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st1.4s { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x2.v4i32.p0(<4 x i32> %B, <4 x i32> %C, ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
ret ptr %tmp
@@ -6267,6 +10434,15 @@ define ptr @test_v2i32_post_imm_st1x2(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32>
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
; CHECK-NEXT: st1.2s { v0, v1 }, [x0], #16
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_imm_st1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: add x0, x0, #16
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: st1.2s { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x2.v2i32.p0(<2 x i32> %B, <2 x i32> %C, ptr %A)
%tmp = getelementptr i32, ptr %A, i32 4
ret ptr %tmp
@@ -6280,6 +10456,15 @@ define ptr @test_v2i32_post_reg_st1x2(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32>
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
; CHECK-NEXT: st1.2s { v0, v1 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_reg_st1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: st1.2s { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x2.v2i32.p0(<2 x i32> %B, <2 x i32> %C, ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
ret ptr %tmp
@@ -6295,6 +10480,15 @@ define ptr @test_v2i64_post_imm_st1x2(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64>
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st1.2d { v0, v1 }, [x0], #32
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_imm_st1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x0, x0, #32
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st1.2d { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x2.v2i64.p0(<2 x i64> %B, <2 x i64> %C, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 4
ret ptr %tmp
@@ -6308,6 +10502,15 @@ define ptr @test_v2i64_post_reg_st1x2(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64>
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st1.2d { v0, v1 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_reg_st1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st1.2d { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x2.v2i64.p0(<2 x i64> %B, <2 x i64> %C, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
ret ptr %tmp
@@ -6323,6 +10526,15 @@ define ptr @test_v1i64_post_imm_st1x2(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64>
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
; CHECK-NEXT: st1.1d { v0, v1 }, [x0], #16
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_imm_st1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: add x0, x0, #16
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: st1.1d { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x2.v1i64.p0(<1 x i64> %B, <1 x i64> %C, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 2
ret ptr %tmp
@@ -6336,6 +10548,15 @@ define ptr @test_v1i64_post_reg_st1x2(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64>
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
; CHECK-NEXT: st1.1d { v0, v1 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_reg_st1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: st1.1d { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x2.v1i64.p0(<1 x i64> %B, <1 x i64> %C, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
ret ptr %tmp
@@ -6351,6 +10572,15 @@ define ptr @test_v4f32_post_imm_st1x2(ptr %A, ptr %ptr, <4 x float> %B, <4 x flo
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st1.4s { v0, v1 }, [x0], #32
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_imm_st1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x0, x0, #32
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st1.4s { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x2.v4f32.p0(<4 x float> %B, <4 x float> %C, ptr %A)
%tmp = getelementptr float, ptr %A, i32 8
ret ptr %tmp
@@ -6364,6 +10594,15 @@ define ptr @test_v4f32_post_reg_st1x2(ptr %A, ptr %ptr, <4 x float> %B, <4 x flo
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st1.4s { v0, v1 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_reg_st1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st1.4s { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x2.v4f32.p0(<4 x float> %B, <4 x float> %C, ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
ret ptr %tmp
@@ -6379,6 +10618,15 @@ define ptr @test_v2f32_post_imm_st1x2(ptr %A, ptr %ptr, <2 x float> %B, <2 x flo
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
; CHECK-NEXT: st1.2s { v0, v1 }, [x0], #16
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_imm_st1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: add x0, x0, #16
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: st1.2s { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x2.v2f32.p0(<2 x float> %B, <2 x float> %C, ptr %A)
%tmp = getelementptr float, ptr %A, i32 4
ret ptr %tmp
@@ -6392,6 +10640,15 @@ define ptr @test_v2f32_post_reg_st1x2(ptr %A, ptr %ptr, <2 x float> %B, <2 x flo
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
; CHECK-NEXT: st1.2s { v0, v1 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_reg_st1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: st1.2s { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x2.v2f32.p0(<2 x float> %B, <2 x float> %C, ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
ret ptr %tmp
@@ -6407,6 +10664,15 @@ define ptr @test_v2f64_post_imm_st1x2(ptr %A, ptr %ptr, <2 x double> %B, <2 x do
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st1.2d { v0, v1 }, [x0], #32
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_imm_st1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x0, x0, #32
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st1.2d { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x2.v2f64.p0(<2 x double> %B, <2 x double> %C, ptr %A)
%tmp = getelementptr double, ptr %A, i64 4
ret ptr %tmp
@@ -6420,6 +10686,15 @@ define ptr @test_v2f64_post_reg_st1x2(ptr %A, ptr %ptr, <2 x double> %B, <2 x do
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st1.2d { v0, v1 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_reg_st1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st1.2d { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x2.v2f64.p0(<2 x double> %B, <2 x double> %C, ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
ret ptr %tmp
@@ -6435,6 +10710,15 @@ define ptr @test_v1f64_post_imm_st1x2(ptr %A, ptr %ptr, <1 x double> %B, <1 x do
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
; CHECK-NEXT: st1.1d { v0, v1 }, [x0], #16
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_imm_st1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: add x0, x0, #16
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: st1.1d { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x2.v1f64.p0(<1 x double> %B, <1 x double> %C, ptr %A)
%tmp = getelementptr double, ptr %A, i64 2
ret ptr %tmp
@@ -6448,6 +10732,15 @@ define ptr @test_v1f64_post_reg_st1x2(ptr %A, ptr %ptr, <1 x double> %B, <1 x do
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
; CHECK-NEXT: st1.1d { v0, v1 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_reg_st1x2:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; CHECK-GISEL-NEXT: st1.1d { v0, v1 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x2.v1f64.p0(<1 x double> %B, <1 x double> %C, ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
ret ptr %tmp
@@ -6464,6 +10757,16 @@ define ptr @test_v16i8_post_imm_st1x3(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8>
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st1.16b { v0, v1, v2 }, [x0], #48
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_imm_st1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #48
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st1.16b { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x3.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, ptr %A)
%tmp = getelementptr i8, ptr %A, i32 48
ret ptr %tmp
@@ -6477,6 +10780,16 @@ define ptr @test_v16i8_post_reg_st1x3(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8>
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st1.16b { v0, v1, v2 }, [x0], x2
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_reg_st1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st1.16b { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x3.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
ret ptr %tmp
@@ -6493,6 +10806,16 @@ define ptr @test_v8i8_post_imm_st1x3(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C,
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
; CHECK-NEXT: st1.8b { v0, v1, v2 }, [x0], #24
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_imm_st1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #24
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: st1.8b { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x3.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, ptr %A)
%tmp = getelementptr i8, ptr %A, i32 24
ret ptr %tmp
@@ -6506,6 +10829,16 @@ define ptr @test_v8i8_post_reg_st1x3(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C,
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
; CHECK-NEXT: st1.8b { v0, v1, v2 }, [x0], x2
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_reg_st1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: st1.8b { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x3.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
ret ptr %tmp
@@ -6522,6 +10855,16 @@ define ptr @test_v8i16_post_imm_st1x3(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16>
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st1.8h { v0, v1, v2 }, [x0], #48
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_imm_st1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #48
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st1.8h { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x3.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, ptr %A)
%tmp = getelementptr i16, ptr %A, i32 24
ret ptr %tmp
@@ -6536,6 +10879,16 @@ define ptr @test_v8i16_post_reg_st1x3(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16>
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st1.8h { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_reg_st1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st1.8h { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x3.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
ret ptr %tmp
@@ -6552,6 +10905,16 @@ define ptr @test_v4i16_post_imm_st1x3(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16>
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
; CHECK-NEXT: st1.4h { v0, v1, v2 }, [x0], #24
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_imm_st1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #24
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: st1.4h { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x3.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, ptr %A)
%tmp = getelementptr i16, ptr %A, i32 12
ret ptr %tmp
@@ -6566,6 +10929,16 @@ define ptr @test_v4i16_post_reg_st1x3(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16>
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
; CHECK-NEXT: st1.4h { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_reg_st1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: st1.4h { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x3.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
ret ptr %tmp
@@ -6582,6 +10955,16 @@ define ptr @test_v4i32_post_imm_st1x3(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32>
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st1.4s { v0, v1, v2 }, [x0], #48
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_imm_st1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #48
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st1.4s { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x3.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, ptr %A)
%tmp = getelementptr i32, ptr %A, i32 12
ret ptr %tmp
@@ -6596,6 +10979,16 @@ define ptr @test_v4i32_post_reg_st1x3(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32>
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st1.4s { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_reg_st1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st1.4s { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x3.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
ret ptr %tmp
@@ -6612,6 +11005,16 @@ define ptr @test_v2i32_post_imm_st1x3(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32>
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
; CHECK-NEXT: st1.2s { v0, v1, v2 }, [x0], #24
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_imm_st1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #24
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: st1.2s { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x3.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, ptr %A)
%tmp = getelementptr i32, ptr %A, i32 6
ret ptr %tmp
@@ -6626,6 +11029,16 @@ define ptr @test_v2i32_post_reg_st1x3(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32>
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
; CHECK-NEXT: st1.2s { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_reg_st1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: st1.2s { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x3.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
ret ptr %tmp
@@ -6642,6 +11055,16 @@ define ptr @test_v2i64_post_imm_st1x3(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64>
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st1.2d { v0, v1, v2 }, [x0], #48
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_imm_st1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #48
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st1.2d { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x3.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 6
ret ptr %tmp
@@ -6656,6 +11079,16 @@ define ptr @test_v2i64_post_reg_st1x3(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64>
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st1.2d { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_reg_st1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st1.2d { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x3.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
ret ptr %tmp
@@ -6672,6 +11105,16 @@ define ptr @test_v1i64_post_imm_st1x3(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64>
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
; CHECK-NEXT: st1.1d { v0, v1, v2 }, [x0], #24
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_imm_st1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #24
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: st1.1d { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x3.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 3
ret ptr %tmp
@@ -6686,6 +11129,16 @@ define ptr @test_v1i64_post_reg_st1x3(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64>
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
; CHECK-NEXT: st1.1d { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_reg_st1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: st1.1d { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x3.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
ret ptr %tmp
@@ -6702,6 +11155,16 @@ define ptr @test_v4f32_post_imm_st1x3(ptr %A, ptr %ptr, <4 x float> %B, <4 x flo
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st1.4s { v0, v1, v2 }, [x0], #48
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_imm_st1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #48
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st1.4s { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x3.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, ptr %A)
%tmp = getelementptr float, ptr %A, i32 12
ret ptr %tmp
@@ -6716,6 +11179,16 @@ define ptr @test_v4f32_post_reg_st1x3(ptr %A, ptr %ptr, <4 x float> %B, <4 x flo
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st1.4s { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_reg_st1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st1.4s { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x3.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
ret ptr %tmp
@@ -6732,6 +11205,16 @@ define ptr @test_v2f32_post_imm_st1x3(ptr %A, ptr %ptr, <2 x float> %B, <2 x flo
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
; CHECK-NEXT: st1.2s { v0, v1, v2 }, [x0], #24
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_imm_st1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #24
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: st1.2s { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x3.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, ptr %A)
%tmp = getelementptr float, ptr %A, i32 6
ret ptr %tmp
@@ -6746,6 +11229,16 @@ define ptr @test_v2f32_post_reg_st1x3(ptr %A, ptr %ptr, <2 x float> %B, <2 x flo
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
; CHECK-NEXT: st1.2s { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_reg_st1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: st1.2s { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x3.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
ret ptr %tmp
@@ -6762,6 +11255,16 @@ define ptr @test_v2f64_post_imm_st1x3(ptr %A, ptr %ptr, <2 x double> %B, <2 x do
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st1.2d { v0, v1, v2 }, [x0], #48
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_imm_st1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #48
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st1.2d { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x3.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, ptr %A)
%tmp = getelementptr double, ptr %A, i64 6
ret ptr %tmp
@@ -6776,6 +11279,16 @@ define ptr @test_v2f64_post_reg_st1x3(ptr %A, ptr %ptr, <2 x double> %B, <2 x do
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st1.2d { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_reg_st1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st1.2d { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x3.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
ret ptr %tmp
@@ -6792,6 +11305,16 @@ define ptr @test_v1f64_post_imm_st1x3(ptr %A, ptr %ptr, <1 x double> %B, <1 x do
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
; CHECK-NEXT: st1.1d { v0, v1, v2 }, [x0], #24
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_imm_st1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #24
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: st1.1d { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x3.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, ptr %A)
%tmp = getelementptr double, ptr %A, i64 3
ret ptr %tmp
@@ -6806,6 +11329,16 @@ define ptr @test_v1f64_post_reg_st1x3(ptr %A, ptr %ptr, <1 x double> %B, <1 x do
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
; CHECK-NEXT: st1.1d { v0, v1, v2 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_reg_st1x3:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; CHECK-GISEL-NEXT: st1.1d { v0, v1, v2 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x3.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
ret ptr %tmp
@@ -6823,6 +11356,17 @@ define ptr @test_v16i8_post_imm_st1x4(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8>
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st1.16b { v0, v1, v2, v3 }, [x0], #64
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_imm_st1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #64
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st1.16b { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x4.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, ptr %A)
%tmp = getelementptr i8, ptr %A, i32 64
ret ptr %tmp
@@ -6837,6 +11381,17 @@ define ptr @test_v16i8_post_reg_st1x4(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8>
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st1.16b { v0, v1, v2, v3 }, [x0], x2
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_reg_st1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st1.16b { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x4.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
ret ptr %tmp
@@ -6854,6 +11409,17 @@ define ptr @test_v8i8_post_imm_st1x4(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C,
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
; CHECK-NEXT: st1.8b { v0, v1, v2, v3 }, [x0], #32
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_imm_st1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #32
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: st1.8b { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x4.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, ptr %A)
%tmp = getelementptr i8, ptr %A, i32 32
ret ptr %tmp
@@ -6868,6 +11434,17 @@ define ptr @test_v8i8_post_reg_st1x4(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C,
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
; CHECK-NEXT: st1.8b { v0, v1, v2, v3 }, [x0], x2
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_reg_st1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: st1.8b { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x4.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
ret ptr %tmp
@@ -6885,6 +11462,17 @@ define ptr @test_v8i16_post_imm_st1x4(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16>
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st1.8h { v0, v1, v2, v3 }, [x0], #64
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_imm_st1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #64
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st1.8h { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x4.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, ptr %A)
%tmp = getelementptr i16, ptr %A, i32 32
ret ptr %tmp
@@ -6900,6 +11488,17 @@ define ptr @test_v8i16_post_reg_st1x4(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16>
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st1.8h { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_reg_st1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st1.8h { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x4.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
ret ptr %tmp
@@ -6917,6 +11516,17 @@ define ptr @test_v4i16_post_imm_st1x4(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16>
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
; CHECK-NEXT: st1.4h { v0, v1, v2, v3 }, [x0], #32
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_imm_st1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #32
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: st1.4h { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x4.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, ptr %A)
%tmp = getelementptr i16, ptr %A, i32 16
ret ptr %tmp
@@ -6932,6 +11542,17 @@ define ptr @test_v4i16_post_reg_st1x4(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16>
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
; CHECK-NEXT: st1.4h { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_reg_st1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: st1.4h { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x4.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
ret ptr %tmp
@@ -6949,6 +11570,17 @@ define ptr @test_v4i32_post_imm_st1x4(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32>
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st1.4s { v0, v1, v2, v3 }, [x0], #64
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_imm_st1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #64
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st1.4s { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x4.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, ptr %A)
%tmp = getelementptr i32, ptr %A, i32 16
ret ptr %tmp
@@ -6964,6 +11596,17 @@ define ptr @test_v4i32_post_reg_st1x4(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32>
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st1.4s { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_reg_st1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st1.4s { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x4.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
ret ptr %tmp
@@ -6981,6 +11624,17 @@ define ptr @test_v2i32_post_imm_st1x4(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32>
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
; CHECK-NEXT: st1.2s { v0, v1, v2, v3 }, [x0], #32
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_imm_st1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #32
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: st1.2s { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x4.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, ptr %A)
%tmp = getelementptr i32, ptr %A, i32 8
ret ptr %tmp
@@ -6996,6 +11650,17 @@ define ptr @test_v2i32_post_reg_st1x4(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32>
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
; CHECK-NEXT: st1.2s { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_reg_st1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: st1.2s { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x4.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
ret ptr %tmp
@@ -7013,6 +11678,17 @@ define ptr @test_v2i64_post_imm_st1x4(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64>
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st1.2d { v0, v1, v2, v3 }, [x0], #64
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_imm_st1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #64
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st1.2d { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x4.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 8
ret ptr %tmp
@@ -7028,6 +11704,17 @@ define ptr @test_v2i64_post_reg_st1x4(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64>
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st1.2d { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_reg_st1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st1.2d { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x4.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
ret ptr %tmp
@@ -7045,6 +11732,17 @@ define ptr @test_v1i64_post_imm_st1x4(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64>
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
; CHECK-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], #32
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_imm_st1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #32
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: st1.1d { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x4.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 4
ret ptr %tmp
@@ -7060,6 +11758,17 @@ define ptr @test_v1i64_post_reg_st1x4(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64>
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
; CHECK-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_reg_st1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: st1.1d { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x4.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
ret ptr %tmp
@@ -7077,6 +11786,17 @@ define ptr @test_v4f32_post_imm_st1x4(ptr %A, ptr %ptr, <4 x float> %B, <4 x flo
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st1.4s { v0, v1, v2, v3 }, [x0], #64
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_imm_st1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #64
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st1.4s { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x4.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, ptr %A)
%tmp = getelementptr float, ptr %A, i32 16
ret ptr %tmp
@@ -7092,6 +11812,17 @@ define ptr @test_v4f32_post_reg_st1x4(ptr %A, ptr %ptr, <4 x float> %B, <4 x flo
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st1.4s { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_reg_st1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st1.4s { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x4.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
ret ptr %tmp
@@ -7109,6 +11840,17 @@ define ptr @test_v2f32_post_imm_st1x4(ptr %A, ptr %ptr, <2 x float> %B, <2 x flo
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
; CHECK-NEXT: st1.2s { v0, v1, v2, v3 }, [x0], #32
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_imm_st1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #32
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: st1.2s { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x4.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, ptr %A)
%tmp = getelementptr float, ptr %A, i32 8
ret ptr %tmp
@@ -7124,6 +11866,17 @@ define ptr @test_v2f32_post_reg_st1x4(ptr %A, ptr %ptr, <2 x float> %B, <2 x flo
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
; CHECK-NEXT: st1.2s { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_reg_st1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: st1.2s { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x4.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
ret ptr %tmp
@@ -7141,6 +11894,17 @@ define ptr @test_v2f64_post_imm_st1x4(ptr %A, ptr %ptr, <2 x double> %B, <2 x do
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st1.2d { v0, v1, v2, v3 }, [x0], #64
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_imm_st1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #64
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st1.2d { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x4.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, ptr %A)
%tmp = getelementptr double, ptr %A, i64 8
ret ptr %tmp
@@ -7156,6 +11920,17 @@ define ptr @test_v2f64_post_reg_st1x4(ptr %A, ptr %ptr, <2 x double> %B, <2 x do
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st1.2d { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_reg_st1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st1.2d { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x4.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
ret ptr %tmp
@@ -7173,6 +11948,17 @@ define ptr @test_v1f64_post_imm_st1x4(ptr %A, ptr %ptr, <1 x double> %B, <1 x do
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
; CHECK-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], #32
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_imm_st1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #32
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: st1.1d { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x4.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, ptr %A)
%tmp = getelementptr double, ptr %A, i64 4
ret ptr %tmp
@@ -7188,6 +11974,17 @@ define ptr @test_v1f64_post_reg_st1x4(ptr %A, ptr %ptr, <1 x double> %B, <1 x do
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
; CHECK-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_reg_st1x4:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; CHECK-GISEL-NEXT: st1.1d { v0, v1, v2, v3 }, [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st1x4.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
ret ptr %tmp
@@ -7202,6 +11999,15 @@ define ptr @test_v16i8_post_imm_st2lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st2.b { v0, v1 }[0], [x0], #2
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_imm_st2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x0, x0, #2
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st2.b { v0, v1 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2lane.v16i8.p0(<16 x i8> %B, <16 x i8> %C, i64 0, ptr %A)
%tmp = getelementptr i8, ptr %A, i32 2
ret ptr %tmp
@@ -7214,6 +12020,15 @@ define ptr @test_v16i8_post_reg_st2lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st2.b { v0, v1 }[0], [x0], x2
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_reg_st2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x0, x0, x2
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st2.b { v0, v1 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2lane.v16i8.p0(<16 x i8> %B, <16 x i8> %C, i64 0, ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
ret ptr %tmp
@@ -7229,6 +12044,15 @@ define ptr @test_v8i8_post_imm_st2lane(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st2.b { v0, v1 }[0], [x0], #2
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_imm_st2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x0, x0, #2
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st2.b { v0, v1 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2lane.v8i8.p0(<8 x i8> %B, <8 x i8> %C, i64 0, ptr %A)
%tmp = getelementptr i8, ptr %A, i32 2
ret ptr %tmp
@@ -7241,6 +12065,15 @@ define ptr @test_v8i8_post_reg_st2lane(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st2.b { v0, v1 }[0], [x0], x2
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_reg_st2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x0, x0, x2
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st2.b { v0, v1 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2lane.v8i8.p0(<8 x i8> %B, <8 x i8> %C, i64 0, ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
ret ptr %tmp
@@ -7256,6 +12089,15 @@ define ptr @test_v8i16_post_imm_st2lane(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st2.h { v0, v1 }[0], [x0], #4
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_imm_st2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x0, x0, #4
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st2.h { v0, v1 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2lane.v8i16.p0(<8 x i16> %B, <8 x i16> %C, i64 0, ptr %A)
%tmp = getelementptr i16, ptr %A, i32 2
ret ptr %tmp
@@ -7269,6 +12111,15 @@ define ptr @test_v8i16_post_reg_st2lane(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st2.h { v0, v1 }[0], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_reg_st2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st2.h { v0, v1 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2lane.v8i16.p0(<8 x i16> %B, <8 x i16> %C, i64 0, ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
ret ptr %tmp
@@ -7284,6 +12135,15 @@ define ptr @test_v4i16_post_imm_st2lane(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st2.h { v0, v1 }[0], [x0], #4
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_imm_st2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x0, x0, #4
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st2.h { v0, v1 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2lane.v4i16.p0(<4 x i16> %B, <4 x i16> %C, i64 0, ptr %A)
%tmp = getelementptr i16, ptr %A, i32 2
ret ptr %tmp
@@ -7297,6 +12157,15 @@ define ptr @test_v4i16_post_reg_st2lane(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st2.h { v0, v1 }[0], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_reg_st2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st2.h { v0, v1 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2lane.v4i16.p0(<4 x i16> %B, <4 x i16> %C, i64 0, ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
ret ptr %tmp
@@ -7312,6 +12181,15 @@ define ptr @test_v4i32_post_imm_st2lane(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st2.s { v0, v1 }[0], [x0], #8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_imm_st2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x0, x0, #8
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st2.s { v0, v1 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2lane.v4i32.p0(<4 x i32> %B, <4 x i32> %C, i64 0, ptr %A)
%tmp = getelementptr i32, ptr %A, i32 2
ret ptr %tmp
@@ -7325,6 +12203,15 @@ define ptr @test_v4i32_post_reg_st2lane(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st2.s { v0, v1 }[0], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_reg_st2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st2.s { v0, v1 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2lane.v4i32.p0(<4 x i32> %B, <4 x i32> %C, i64 0, ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
ret ptr %tmp
@@ -7340,6 +12227,15 @@ define ptr @test_v2i32_post_imm_st2lane(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st2.s { v0, v1 }[0], [x0], #8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_imm_st2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x0, x0, #8
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st2.s { v0, v1 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2lane.v2i32.p0(<2 x i32> %B, <2 x i32> %C, i64 0, ptr %A)
%tmp = getelementptr i32, ptr %A, i32 2
ret ptr %tmp
@@ -7353,6 +12249,15 @@ define ptr @test_v2i32_post_reg_st2lane(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st2.s { v0, v1 }[0], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_reg_st2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st2.s { v0, v1 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2lane.v2i32.p0(<2 x i32> %B, <2 x i32> %C, i64 0, ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
ret ptr %tmp
@@ -7368,6 +12273,15 @@ define ptr @test_v2i64_post_imm_st2lane(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st2.d { v0, v1 }[0], [x0], #16
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_imm_st2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x0, x0, #16
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st2.d { v0, v1 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2lane.v2i64.p0(<2 x i64> %B, <2 x i64> %C, i64 0, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 2
ret ptr %tmp
@@ -7381,6 +12295,15 @@ define ptr @test_v2i64_post_reg_st2lane(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st2.d { v0, v1 }[0], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_reg_st2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st2.d { v0, v1 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2lane.v2i64.p0(<2 x i64> %B, <2 x i64> %C, i64 0, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
ret ptr %tmp
@@ -7396,6 +12319,15 @@ define ptr @test_v1i64_post_imm_st2lane(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st2.d { v0, v1 }[0], [x0], #16
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_imm_st2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x0, x0, #16
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st2.d { v0, v1 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2lane.v1i64.p0(<1 x i64> %B, <1 x i64> %C, i64 0, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 2
ret ptr %tmp
@@ -7409,6 +12341,15 @@ define ptr @test_v1i64_post_reg_st2lane(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st2.d { v0, v1 }[0], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_reg_st2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st2.d { v0, v1 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2lane.v1i64.p0(<1 x i64> %B, <1 x i64> %C, i64 0, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
ret ptr %tmp
@@ -7424,6 +12365,15 @@ define ptr @test_v4f32_post_imm_st2lane(ptr %A, ptr %ptr, <4 x float> %B, <4 x f
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st2.s { v0, v1 }[0], [x0], #8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_imm_st2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x0, x0, #8
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st2.s { v0, v1 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2lane.v4f32.p0(<4 x float> %B, <4 x float> %C, i64 0, ptr %A)
%tmp = getelementptr float, ptr %A, i32 2
ret ptr %tmp
@@ -7437,6 +12387,15 @@ define ptr @test_v4f32_post_reg_st2lane(ptr %A, ptr %ptr, <4 x float> %B, <4 x f
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st2.s { v0, v1 }[0], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_reg_st2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st2.s { v0, v1 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2lane.v4f32.p0(<4 x float> %B, <4 x float> %C, i64 0, ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
ret ptr %tmp
@@ -7452,6 +12411,15 @@ define ptr @test_v2f32_post_imm_st2lane(ptr %A, ptr %ptr, <2 x float> %B, <2 x f
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st2.s { v0, v1 }[0], [x0], #8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_imm_st2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x0, x0, #8
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st2.s { v0, v1 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2lane.v2f32.p0(<2 x float> %B, <2 x float> %C, i64 0, ptr %A)
%tmp = getelementptr float, ptr %A, i32 2
ret ptr %tmp
@@ -7465,6 +12433,15 @@ define ptr @test_v2f32_post_reg_st2lane(ptr %A, ptr %ptr, <2 x float> %B, <2 x f
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st2.s { v0, v1 }[0], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_reg_st2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st2.s { v0, v1 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2lane.v2f32.p0(<2 x float> %B, <2 x float> %C, i64 0, ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
ret ptr %tmp
@@ -7480,6 +12457,15 @@ define ptr @test_v2f64_post_imm_st2lane(ptr %A, ptr %ptr, <2 x double> %B, <2 x
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st2.d { v0, v1 }[0], [x0], #16
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_imm_st2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x0, x0, #16
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st2.d { v0, v1 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2lane.v2f64.p0(<2 x double> %B, <2 x double> %C, i64 0, ptr %A)
%tmp = getelementptr double, ptr %A, i64 2
ret ptr %tmp
@@ -7493,6 +12479,15 @@ define ptr @test_v2f64_post_reg_st2lane(ptr %A, ptr %ptr, <2 x double> %B, <2 x
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st2.d { v0, v1 }[0], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_reg_st2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st2.d { v0, v1 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2lane.v2f64.p0(<2 x double> %B, <2 x double> %C, i64 0, ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
ret ptr %tmp
@@ -7508,6 +12503,15 @@ define ptr @test_v1f64_post_imm_st2lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st2.d { v0, v1 }[0], [x0], #16
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_imm_st2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: add x0, x0, #16
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st2.d { v0, v1 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2lane.v1f64.p0(<1 x double> %B, <1 x double> %C, i64 0, ptr %A)
%tmp = getelementptr double, ptr %A, i64 2
ret ptr %tmp
@@ -7521,6 +12525,15 @@ define ptr @test_v1f64_post_reg_st2lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
; CHECK-NEXT: st2.d { v0, v1 }[0], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_reg_st2lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; CHECK-GISEL-NEXT: st2.d { v0, v1 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st2lane.v1f64.p0(<1 x double> %B, <1 x double> %C, i64 0, ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
ret ptr %tmp
@@ -7537,6 +12550,16 @@ define ptr @test_v16i8_post_imm_st3lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st3.b { v0, v1, v2 }[0], [x0], #3
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_imm_st3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #3
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st3.b { v0, v1, v2 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3lane.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i64 0, ptr %A)
%tmp = getelementptr i8, ptr %A, i32 3
ret ptr %tmp
@@ -7550,6 +12573,16 @@ define ptr @test_v16i8_post_reg_st3lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st3.b { v0, v1, v2 }[0], [x0], x2
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_reg_st3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st3.b { v0, v1, v2 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3lane.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i64 0, ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
ret ptr %tmp
@@ -7566,6 +12599,16 @@ define ptr @test_v8i8_post_imm_st3lane(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st3.b { v0, v1, v2 }[0], [x0], #3
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_imm_st3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #3
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st3.b { v0, v1, v2 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3lane.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i64 0, ptr %A)
%tmp = getelementptr i8, ptr %A, i32 3
ret ptr %tmp
@@ -7579,6 +12622,16 @@ define ptr @test_v8i8_post_reg_st3lane(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st3.b { v0, v1, v2 }[0], [x0], x2
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_reg_st3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st3.b { v0, v1, v2 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3lane.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i64 0, ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
ret ptr %tmp
@@ -7595,6 +12648,16 @@ define ptr @test_v8i16_post_imm_st3lane(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st3.h { v0, v1, v2 }[0], [x0], #6
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_imm_st3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #6
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st3.h { v0, v1, v2 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3lane.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i64 0, ptr %A)
%tmp = getelementptr i16, ptr %A, i32 3
ret ptr %tmp
@@ -7609,6 +12672,16 @@ define ptr @test_v8i16_post_reg_st3lane(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st3.h { v0, v1, v2 }[0], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_reg_st3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st3.h { v0, v1, v2 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3lane.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i64 0, ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
ret ptr %tmp
@@ -7625,6 +12698,16 @@ define ptr @test_v4i16_post_imm_st3lane(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st3.h { v0, v1, v2 }[0], [x0], #6
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_imm_st3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #6
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st3.h { v0, v1, v2 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3lane.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i64 0, ptr %A)
%tmp = getelementptr i16, ptr %A, i32 3
ret ptr %tmp
@@ -7639,6 +12722,16 @@ define ptr @test_v4i16_post_reg_st3lane(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st3.h { v0, v1, v2 }[0], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_reg_st3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st3.h { v0, v1, v2 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3lane.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i64 0, ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
ret ptr %tmp
@@ -7655,6 +12748,16 @@ define ptr @test_v4i32_post_imm_st3lane(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st3.s { v0, v1, v2 }[0], [x0], #12
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_imm_st3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #12
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st3.s { v0, v1, v2 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3lane.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i64 0, ptr %A)
%tmp = getelementptr i32, ptr %A, i32 3
ret ptr %tmp
@@ -7669,6 +12772,16 @@ define ptr @test_v4i32_post_reg_st3lane(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st3.s { v0, v1, v2 }[0], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_reg_st3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st3.s { v0, v1, v2 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3lane.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i64 0, ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
ret ptr %tmp
@@ -7685,6 +12798,16 @@ define ptr @test_v2i32_post_imm_st3lane(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st3.s { v0, v1, v2 }[0], [x0], #12
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_imm_st3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #12
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st3.s { v0, v1, v2 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3lane.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i64 0, ptr %A)
%tmp = getelementptr i32, ptr %A, i32 3
ret ptr %tmp
@@ -7699,6 +12822,16 @@ define ptr @test_v2i32_post_reg_st3lane(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st3.s { v0, v1, v2 }[0], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_reg_st3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st3.s { v0, v1, v2 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3lane.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i64 0, ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
ret ptr %tmp
@@ -7715,6 +12848,16 @@ define ptr @test_v2i64_post_imm_st3lane(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st3.d { v0, v1, v2 }[0], [x0], #24
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_imm_st3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #24
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st3.d { v0, v1, v2 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3lane.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64 0, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 3
ret ptr %tmp
@@ -7729,6 +12872,16 @@ define ptr @test_v2i64_post_reg_st3lane(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st3.d { v0, v1, v2 }[0], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_reg_st3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st3.d { v0, v1, v2 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3lane.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64 0, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
ret ptr %tmp
@@ -7745,6 +12898,16 @@ define ptr @test_v1i64_post_imm_st3lane(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st3.d { v0, v1, v2 }[0], [x0], #24
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_imm_st3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #24
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st3.d { v0, v1, v2 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3lane.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64 0, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 3
ret ptr %tmp
@@ -7759,6 +12922,16 @@ define ptr @test_v1i64_post_reg_st3lane(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st3.d { v0, v1, v2 }[0], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_reg_st3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st3.d { v0, v1, v2 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3lane.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64 0, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
ret ptr %tmp
@@ -7775,6 +12948,16 @@ define ptr @test_v4f32_post_imm_st3lane(ptr %A, ptr %ptr, <4 x float> %B, <4 x f
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st3.s { v0, v1, v2 }[0], [x0], #12
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_imm_st3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #12
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st3.s { v0, v1, v2 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3lane.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, i64 0, ptr %A)
%tmp = getelementptr float, ptr %A, i32 3
ret ptr %tmp
@@ -7789,6 +12972,16 @@ define ptr @test_v4f32_post_reg_st3lane(ptr %A, ptr %ptr, <4 x float> %B, <4 x f
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st3.s { v0, v1, v2 }[0], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_reg_st3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st3.s { v0, v1, v2 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3lane.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, i64 0, ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
ret ptr %tmp
@@ -7805,6 +12998,16 @@ define ptr @test_v2f32_post_imm_st3lane(ptr %A, ptr %ptr, <2 x float> %B, <2 x f
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st3.s { v0, v1, v2 }[0], [x0], #12
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_imm_st3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #12
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st3.s { v0, v1, v2 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3lane.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, i64 0, ptr %A)
%tmp = getelementptr float, ptr %A, i32 3
ret ptr %tmp
@@ -7819,6 +13022,16 @@ define ptr @test_v2f32_post_reg_st3lane(ptr %A, ptr %ptr, <2 x float> %B, <2 x f
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st3.s { v0, v1, v2 }[0], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_reg_st3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st3.s { v0, v1, v2 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3lane.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, i64 0, ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
ret ptr %tmp
@@ -7835,6 +13048,16 @@ define ptr @test_v2f64_post_imm_st3lane(ptr %A, ptr %ptr, <2 x double> %B, <2 x
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st3.d { v0, v1, v2 }[0], [x0], #24
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_imm_st3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #24
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st3.d { v0, v1, v2 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3lane.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, i64 0, ptr %A)
%tmp = getelementptr double, ptr %A, i64 3
ret ptr %tmp
@@ -7849,6 +13072,16 @@ define ptr @test_v2f64_post_reg_st3lane(ptr %A, ptr %ptr, <2 x double> %B, <2 x
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st3.d { v0, v1, v2 }[0], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_reg_st3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st3.d { v0, v1, v2 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3lane.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, i64 0, ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
ret ptr %tmp
@@ -7865,6 +13098,16 @@ define ptr @test_v1f64_post_imm_st3lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st3.d { v0, v1, v2 }[0], [x0], #24
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_imm_st3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #24
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st3.d { v0, v1, v2 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3lane.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, i64 0, ptr %A)
%tmp = getelementptr double, ptr %A, i64 3
ret ptr %tmp
@@ -7879,6 +13122,16 @@ define ptr @test_v1f64_post_reg_st3lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
; CHECK-NEXT: st3.d { v0, v1, v2 }[0], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_reg_st3lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; CHECK-GISEL-NEXT: st3.d { v0, v1, v2 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st3lane.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, i64 0, ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
ret ptr %tmp
@@ -7896,6 +13149,17 @@ define ptr @test_v16i8_post_imm_st4lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st4.b { v0, v1, v2, v3 }[0], [x0], #4
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_imm_st4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #4
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st4.b { v0, v1, v2, v3 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4lane.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, i64 0, ptr %A)
%tmp = getelementptr i8, ptr %A, i32 4
ret ptr %tmp
@@ -7910,6 +13174,17 @@ define ptr @test_v16i8_post_reg_st4lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st4.b { v0, v1, v2, v3 }[0], [x0], x2
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_reg_st4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st4.b { v0, v1, v2, v3 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4lane.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, i64 0, ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
ret ptr %tmp
@@ -7927,6 +13202,17 @@ define ptr @test_v8i8_post_imm_st4lane(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st4.b { v0, v1, v2, v3 }[0], [x0], #4
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_imm_st4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #4
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st4.b { v0, v1, v2, v3 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4lane.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, i64 0, ptr %A)
%tmp = getelementptr i8, ptr %A, i32 4
ret ptr %tmp
@@ -7941,6 +13227,17 @@ define ptr @test_v8i8_post_reg_st4lane(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st4.b { v0, v1, v2, v3 }[0], [x0], x2
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_reg_st4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st4.b { v0, v1, v2, v3 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4lane.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, i64 0, ptr %A)
%tmp = getelementptr i8, ptr %A, i64 %inc
ret ptr %tmp
@@ -7958,6 +13255,17 @@ define ptr @test_v8i16_post_imm_st4lane(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st4.h { v0, v1, v2, v3 }[0], [x0], #8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_imm_st4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #8
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st4.h { v0, v1, v2, v3 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4lane.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, i64 0, ptr %A)
%tmp = getelementptr i16, ptr %A, i32 4
ret ptr %tmp
@@ -7973,6 +13281,17 @@ define ptr @test_v8i16_post_reg_st4lane(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st4.h { v0, v1, v2, v3 }[0], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_reg_st4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st4.h { v0, v1, v2, v3 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4lane.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, i64 0, ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
ret ptr %tmp
@@ -7990,6 +13309,17 @@ define ptr @test_v4i16_post_imm_st4lane(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st4.h { v0, v1, v2, v3 }[0], [x0], #8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_imm_st4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #8
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st4.h { v0, v1, v2, v3 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4lane.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, i64 0, ptr %A)
%tmp = getelementptr i16, ptr %A, i32 4
ret ptr %tmp
@@ -8005,6 +13335,17 @@ define ptr @test_v4i16_post_reg_st4lane(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st4.h { v0, v1, v2, v3 }[0], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_reg_st4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st4.h { v0, v1, v2, v3 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4lane.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, i64 0, ptr %A)
%tmp = getelementptr i16, ptr %A, i64 %inc
ret ptr %tmp
@@ -8022,6 +13363,17 @@ define ptr @test_v4i32_post_imm_st4lane(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], #16
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_imm_st4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #16
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st4.s { v0, v1, v2, v3 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4lane.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, i64 0, ptr %A)
%tmp = getelementptr i32, ptr %A, i32 4
ret ptr %tmp
@@ -8037,6 +13389,17 @@ define ptr @test_v4i32_post_reg_st4lane(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_reg_st4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st4.s { v0, v1, v2, v3 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4lane.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, i64 0, ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
ret ptr %tmp
@@ -8054,6 +13417,17 @@ define ptr @test_v2i32_post_imm_st4lane(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], #16
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_imm_st4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #16
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st4.s { v0, v1, v2, v3 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4lane.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, i64 0, ptr %A)
%tmp = getelementptr i32, ptr %A, i32 4
ret ptr %tmp
@@ -8069,6 +13443,17 @@ define ptr @test_v2i32_post_reg_st4lane(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_reg_st4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st4.s { v0, v1, v2, v3 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4lane.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, i64 0, ptr %A)
%tmp = getelementptr i32, ptr %A, i64 %inc
ret ptr %tmp
@@ -8086,6 +13471,17 @@ define ptr @test_v2i64_post_imm_st4lane(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], #32
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_imm_st4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #32
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st4.d { v0, v1, v2, v3 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4lane.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, i64 0, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 4
ret ptr %tmp
@@ -8101,6 +13497,17 @@ define ptr @test_v2i64_post_reg_st4lane(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_reg_st4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st4.d { v0, v1, v2, v3 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4lane.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, i64 0, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
ret ptr %tmp
@@ -8118,6 +13525,17 @@ define ptr @test_v1i64_post_imm_st4lane(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], #32
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_imm_st4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #32
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st4.d { v0, v1, v2, v3 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4lane.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, i64 0, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 4
ret ptr %tmp
@@ -8133,6 +13551,17 @@ define ptr @test_v1i64_post_reg_st4lane(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1i64_post_reg_st4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st4.d { v0, v1, v2, v3 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4lane.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, i64 0, ptr %A)
%tmp = getelementptr i64, ptr %A, i64 %inc
ret ptr %tmp
@@ -8150,6 +13579,17 @@ define ptr @test_v4f32_post_imm_st4lane(ptr %A, ptr %ptr, <4 x float> %B, <4 x f
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], #16
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_imm_st4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #16
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st4.s { v0, v1, v2, v3 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4lane.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, i64 0, ptr %A)
%tmp = getelementptr float, ptr %A, i32 4
ret ptr %tmp
@@ -8165,6 +13605,17 @@ define ptr @test_v4f32_post_reg_st4lane(ptr %A, ptr %ptr, <4 x float> %B, <4 x f
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_reg_st4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st4.s { v0, v1, v2, v3 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4lane.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, i64 0, ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
ret ptr %tmp
@@ -8182,6 +13633,17 @@ define ptr @test_v2f32_post_imm_st4lane(ptr %A, ptr %ptr, <2 x float> %B, <2 x f
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], #16
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_imm_st4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #16
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st4.s { v0, v1, v2, v3 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4lane.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, i64 0, ptr %A)
%tmp = getelementptr float, ptr %A, i32 4
ret ptr %tmp
@@ -8197,6 +13659,17 @@ define ptr @test_v2f32_post_reg_st4lane(ptr %A, ptr %ptr, <2 x float> %B, <2 x f
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_reg_st4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st4.s { v0, v1, v2, v3 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4lane.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, i64 0, ptr %A)
%tmp = getelementptr float, ptr %A, i64 %inc
ret ptr %tmp
@@ -8214,6 +13687,17 @@ define ptr @test_v2f64_post_imm_st4lane(ptr %A, ptr %ptr, <2 x double> %B, <2 x
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], #32
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_imm_st4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #32
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st4.d { v0, v1, v2, v3 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4lane.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, i64 0, ptr %A)
%tmp = getelementptr double, ptr %A, i64 4
ret ptr %tmp
@@ -8229,6 +13713,17 @@ define ptr @test_v2f64_post_reg_st4lane(ptr %A, ptr %ptr, <2 x double> %B, <2 x
; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_reg_st4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st4.d { v0, v1, v2, v3 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4lane.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, i64 0, ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
ret ptr %tmp
@@ -8246,6 +13741,17 @@ define ptr @test_v1f64_post_imm_st4lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], #32
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_imm_st4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, #32
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st4.d { v0, v1, v2, v3 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4lane.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, i64 0, ptr %A)
%tmp = getelementptr double, ptr %A, i64 4
ret ptr %tmp
@@ -8261,6 +13767,17 @@ define ptr @test_v1f64_post_reg_st4lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
; CHECK-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], x8
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v1f64_post_reg_st4lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: mov x8, x0
+; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; CHECK-GISEL-NEXT: st4.d { v0, v1, v2, v3 }[0], [x8]
+; CHECK-GISEL-NEXT: ret
call void @llvm.aarch64.neon.st4lane.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, i64 0, ptr %A)
%tmp = getelementptr double, ptr %A, i64 %inc
ret ptr %tmp
@@ -8274,6 +13791,12 @@ define <16 x i8> @test_v16i8_post_imm_ld1r(ptr %bar, ptr %ptr) {
; CHECK-NEXT: ld1r.16b { v0 }, [x0], #1
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld1r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1r.16b { v0 }, [x0], #1
+; CHECK-GISEL-NEXT: str x0, [x1]
+; CHECK-GISEL-NEXT: ret
%tmp1 = load i8, ptr %bar
%tmp2 = insertelement <16 x i8> <i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, i8 %tmp1, i32 0
%tmp3 = insertelement <16 x i8> %tmp2, i8 %tmp1, i32 1
@@ -8302,6 +13825,12 @@ define <16 x i8> @test_v16i8_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {
; CHECK-NEXT: ld1r.16b { v0 }, [x0], x2
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld1r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1r.16b { v0 }, [x0], x2
+; CHECK-GISEL-NEXT: str x0, [x1]
+; CHECK-GISEL-NEXT: ret
%tmp1 = load i8, ptr %bar
%tmp2 = insertelement <16 x i8> <i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, i8 %tmp1, i32 0
%tmp3 = insertelement <16 x i8> %tmp2, i8 %tmp1, i32 1
@@ -8330,6 +13859,12 @@ define <8 x i8> @test_v8i8_post_imm_ld1r(ptr %bar, ptr %ptr) {
; CHECK-NEXT: ld1r.8b { v0 }, [x0], #1
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld1r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1r.8b { v0 }, [x0], #1
+; CHECK-GISEL-NEXT: str x0, [x1]
+; CHECK-GISEL-NEXT: ret
%tmp1 = load i8, ptr %bar
%tmp2 = insertelement <8 x i8> <i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, i8 %tmp1, i32 0
%tmp3 = insertelement <8 x i8> %tmp2, i8 %tmp1, i32 1
@@ -8350,6 +13885,12 @@ define <8 x i8> @test_v8i8_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {
; CHECK-NEXT: ld1r.8b { v0 }, [x0], x2
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld1r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1r.8b { v0 }, [x0], x2
+; CHECK-GISEL-NEXT: str x0, [x1]
+; CHECK-GISEL-NEXT: ret
%tmp1 = load i8, ptr %bar
%tmp2 = insertelement <8 x i8> <i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, i8 %tmp1, i32 0
%tmp3 = insertelement <8 x i8> %tmp2, i8 %tmp1, i32 1
@@ -8370,6 +13911,13 @@ define <8 x i16> @test_v8i16_post_imm_ld1r(ptr %bar, ptr %ptr) {
; CHECK-NEXT: ld1r.8h { v0 }, [x0], #2
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld1r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1r.8h { v0 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%tmp1 = load i16, ptr %bar
%tmp2 = insertelement <8 x i16> <i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef>, i16 %tmp1, i32 0
%tmp3 = insertelement <8 x i16> %tmp2, i16 %tmp1, i32 1
@@ -8391,6 +13939,13 @@ define <8 x i16> @test_v8i16_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {
; CHECK-NEXT: ld1r.8h { v0 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld1r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1r.8h { v0 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%tmp1 = load i16, ptr %bar
%tmp2 = insertelement <8 x i16> <i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef>, i16 %tmp1, i32 0
%tmp3 = insertelement <8 x i16> %tmp2, i16 %tmp1, i32 1
@@ -8411,6 +13966,13 @@ define <4 x i16> @test_v4i16_post_imm_ld1r(ptr %bar, ptr %ptr) {
; CHECK-NEXT: ld1r.4h { v0 }, [x0], #2
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld1r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1r.4h { v0 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%tmp1 = load i16, ptr %bar
%tmp2 = insertelement <4 x i16> <i16 undef, i16 undef, i16 undef, i16 undef>, i16 %tmp1, i32 0
%tmp3 = insertelement <4 x i16> %tmp2, i16 %tmp1, i32 1
@@ -8428,6 +13990,13 @@ define <4 x i16> @test_v4i16_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {
; CHECK-NEXT: ld1r.4h { v0 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld1r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1r.4h { v0 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%tmp1 = load i16, ptr %bar
%tmp2 = insertelement <4 x i16> <i16 undef, i16 undef, i16 undef, i16 undef>, i16 %tmp1, i32 0
%tmp3 = insertelement <4 x i16> %tmp2, i16 %tmp1, i32 1
@@ -8444,6 +14013,13 @@ define <4 x i32> @test_v4i32_post_imm_ld1r(ptr %bar, ptr %ptr) {
; CHECK-NEXT: ld1r.4s { v0 }, [x0], #4
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld1r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1r.4s { v0 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #4
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%tmp1 = load i32, ptr %bar
%tmp2 = insertelement <4 x i32> <i32 undef, i32 undef, i32 undef, i32 undef>, i32 %tmp1, i32 0
%tmp3 = insertelement <4 x i32> %tmp2, i32 %tmp1, i32 1
@@ -8461,6 +14037,13 @@ define <4 x i32> @test_v4i32_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {
; CHECK-NEXT: ld1r.4s { v0 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld1r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1r.4s { v0 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%tmp1 = load i32, ptr %bar
%tmp2 = insertelement <4 x i32> <i32 undef, i32 undef, i32 undef, i32 undef>, i32 %tmp1, i32 0
%tmp3 = insertelement <4 x i32> %tmp2, i32 %tmp1, i32 1
@@ -8477,6 +14060,13 @@ define <2 x i32> @test_v2i32_post_imm_ld1r(ptr %bar, ptr %ptr) {
; CHECK-NEXT: ld1r.2s { v0 }, [x0], #4
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld1r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1r.2s { v0 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #4
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%tmp1 = load i32, ptr %bar
%tmp2 = insertelement <2 x i32> <i32 undef, i32 undef>, i32 %tmp1, i32 0
%tmp3 = insertelement <2 x i32> %tmp2, i32 %tmp1, i32 1
@@ -8492,6 +14082,13 @@ define <2 x i32> @test_v2i32_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {
; CHECK-NEXT: ld1r.2s { v0 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld1r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1r.2s { v0 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%tmp1 = load i32, ptr %bar
%tmp2 = insertelement <2 x i32> <i32 undef, i32 undef>, i32 %tmp1, i32 0
%tmp3 = insertelement <2 x i32> %tmp2, i32 %tmp1, i32 1
@@ -8506,6 +14103,13 @@ define <2 x i64> @test_v2i64_post_imm_ld1r(ptr %bar, ptr %ptr) {
; CHECK-NEXT: ld1r.2d { v0 }, [x0], #8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld1r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1r.2d { v0 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #8
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%tmp1 = load i64, ptr %bar
%tmp2 = insertelement <2 x i64> <i64 undef, i64 undef>, i64 %tmp1, i32 0
%tmp3 = insertelement <2 x i64> %tmp2, i64 %tmp1, i32 1
@@ -8521,6 +14125,13 @@ define <2 x i64> @test_v2i64_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {
; CHECK-NEXT: ld1r.2d { v0 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld1r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1r.2d { v0 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%tmp1 = load i64, ptr %bar
%tmp2 = insertelement <2 x i64> <i64 undef, i64 undef>, i64 %tmp1, i32 0
%tmp3 = insertelement <2 x i64> %tmp2, i64 %tmp1, i32 1
@@ -8535,6 +14146,13 @@ define <4 x float> @test_v4f32_post_imm_ld1r(ptr %bar, ptr %ptr) {
; CHECK-NEXT: ld1r.4s { v0 }, [x0], #4
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld1r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1r.4s { v0 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #4
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%tmp1 = load float, ptr %bar
%tmp2 = insertelement <4 x float> <float undef, float undef, float undef, float undef>, float %tmp1, i32 0
%tmp3 = insertelement <4 x float> %tmp2, float %tmp1, i32 1
@@ -8552,6 +14170,13 @@ define <4 x float> @test_v4f32_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {
; CHECK-NEXT: ld1r.4s { v0 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld1r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1r.4s { v0 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%tmp1 = load float, ptr %bar
%tmp2 = insertelement <4 x float> <float undef, float undef, float undef, float undef>, float %tmp1, i32 0
%tmp3 = insertelement <4 x float> %tmp2, float %tmp1, i32 1
@@ -8568,6 +14193,13 @@ define <2 x float> @test_v2f32_post_imm_ld1r(ptr %bar, ptr %ptr) {
; CHECK-NEXT: ld1r.2s { v0 }, [x0], #4
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld1r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1r.2s { v0 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #4
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%tmp1 = load float, ptr %bar
%tmp2 = insertelement <2 x float> <float undef, float undef>, float %tmp1, i32 0
%tmp3 = insertelement <2 x float> %tmp2, float %tmp1, i32 1
@@ -8583,6 +14215,13 @@ define <2 x float> @test_v2f32_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {
; CHECK-NEXT: ld1r.2s { v0 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld1r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1r.2s { v0 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%tmp1 = load float, ptr %bar
%tmp2 = insertelement <2 x float> <float undef, float undef>, float %tmp1, i32 0
%tmp3 = insertelement <2 x float> %tmp2, float %tmp1, i32 1
@@ -8597,6 +14236,13 @@ define <2 x double> @test_v2f64_post_imm_ld1r(ptr %bar, ptr %ptr) {
; CHECK-NEXT: ld1r.2d { v0 }, [x0], #8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld1r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1r.2d { v0 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #8
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%tmp1 = load double, ptr %bar
%tmp2 = insertelement <2 x double> <double undef, double undef>, double %tmp1, i32 0
%tmp3 = insertelement <2 x double> %tmp2, double %tmp1, i32 1
@@ -8612,6 +14258,13 @@ define <2 x double> @test_v2f64_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {
; CHECK-NEXT: ld1r.2d { v0 }, [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld1r:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ld1r.2d { v0 }, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%tmp1 = load double, ptr %bar
%tmp2 = insertelement <2 x double> <double undef, double undef>, double %tmp1, i32 0
%tmp3 = insertelement <2 x double> %tmp2, double %tmp1, i32 1
@@ -8626,6 +14279,14 @@ define <16 x i8> @test_v16i8_post_imm_ld1lane(ptr %bar, ptr %ptr, <16 x i8> %A)
; CHECK-NEXT: ld1.b { v0 }[1], [x0], #1
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld1lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr b1, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #1
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: mov.b v0[1], v1[0]
+; CHECK-GISEL-NEXT: ret
%tmp1 = load i8, ptr %bar
%tmp2 = insertelement <16 x i8> %A, i8 %tmp1, i32 1
%tmp3 = getelementptr i8, ptr %bar, i64 1
@@ -8639,6 +14300,14 @@ define <16 x i8> @test_v16i8_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <16
; CHECK-NEXT: ld1.b { v0 }[1], [x0], x2
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld1lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr b1, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: mov.b v0[1], v1[0]
+; CHECK-GISEL-NEXT: ret
%tmp1 = load i8, ptr %bar
%tmp2 = insertelement <16 x i8> %A, i8 %tmp1, i32 1
%tmp3 = getelementptr i8, ptr %bar, i64 %inc
@@ -8654,6 +14323,16 @@ define <8 x i8> @test_v8i8_post_imm_ld1lane(ptr %bar, ptr %ptr, <8 x i8> %A) {
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld1lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr b1, [x0]
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 def $q0
+; CHECK-GISEL-NEXT: add x8, x0, #1
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: mov.b v0[1], v1[0]
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0
+; CHECK-GISEL-NEXT: ret
%tmp1 = load i8, ptr %bar
%tmp2 = insertelement <8 x i8> %A, i8 %tmp1, i32 1
%tmp3 = getelementptr i8, ptr %bar, i64 1
@@ -8669,6 +14348,16 @@ define <8 x i8> @test_v8i8_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <8 x i
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld1lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr b1, [x0]
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 def $q0
+; CHECK-GISEL-NEXT: add x8, x0, x2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: mov.b v0[1], v1[0]
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0
+; CHECK-GISEL-NEXT: ret
%tmp1 = load i8, ptr %bar
%tmp2 = insertelement <8 x i8> %A, i8 %tmp1, i32 1
%tmp3 = getelementptr i8, ptr %bar, i64 %inc
@@ -8682,6 +14371,14 @@ define <8 x i16> @test_v8i16_post_imm_ld1lane(ptr %bar, ptr %ptr, <8 x i16> %A)
; CHECK-NEXT: ld1.h { v0 }[1], [x0], #2
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld1lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr h1, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: mov.h v0[1], v1[0]
+; CHECK-GISEL-NEXT: ret
%tmp1 = load i16, ptr %bar
%tmp2 = insertelement <8 x i16> %A, i16 %tmp1, i32 1
%tmp3 = getelementptr i16, ptr %bar, i64 1
@@ -8696,6 +14393,14 @@ define <8 x i16> @test_v8i16_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <8 x
; CHECK-NEXT: ld1.h { v0 }[1], [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld1lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr h1, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: mov.h v0[1], v1[0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%tmp1 = load i16, ptr %bar
%tmp2 = insertelement <8 x i16> %A, i16 %tmp1, i32 1
%tmp3 = getelementptr i16, ptr %bar, i64 %inc
@@ -8711,6 +14416,16 @@ define <4 x i16> @test_v4i16_post_imm_ld1lane(ptr %bar, ptr %ptr, <4 x i16> %A)
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld1lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr h1, [x0]
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 def $q0
+; CHECK-GISEL-NEXT: add x8, x0, #2
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: mov.h v0[1], v1[0]
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0
+; CHECK-GISEL-NEXT: ret
%tmp1 = load i16, ptr %bar
%tmp2 = insertelement <4 x i16> %A, i16 %tmp1, i32 1
%tmp3 = getelementptr i16, ptr %bar, i64 1
@@ -8727,6 +14442,16 @@ define <4 x i16> @test_v4i16_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <4 x
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld1lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr h1, [x0]
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 def $q0
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: mov.h v0[1], v1[0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0
+; CHECK-GISEL-NEXT: ret
%tmp1 = load i16, ptr %bar
%tmp2 = insertelement <4 x i16> %A, i16 %tmp1, i32 1
%tmp3 = getelementptr i16, ptr %bar, i64 %inc
@@ -8740,6 +14465,14 @@ define <4 x i32> @test_v4i32_post_imm_ld1lane(ptr %bar, ptr %ptr, <4 x i32> %A)
; CHECK-NEXT: ld1.s { v0 }[1], [x0], #4
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld1lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr s1, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #4
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: mov.s v0[1], v1[0]
+; CHECK-GISEL-NEXT: ret
%tmp1 = load i32, ptr %bar
%tmp2 = insertelement <4 x i32> %A, i32 %tmp1, i32 1
%tmp3 = getelementptr i32, ptr %bar, i64 1
@@ -8754,6 +14487,14 @@ define <4 x i32> @test_v4i32_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <4 x
; CHECK-NEXT: ld1.s { v0 }[1], [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld1lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr s1, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: mov.s v0[1], v1[0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%tmp1 = load i32, ptr %bar
%tmp2 = insertelement <4 x i32> %A, i32 %tmp1, i32 1
%tmp3 = getelementptr i32, ptr %bar, i64 %inc
@@ -8769,6 +14510,16 @@ define <2 x i32> @test_v2i32_post_imm_ld1lane(ptr %bar, ptr %ptr, <2 x i32> %A)
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld1lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr s1, [x0]
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 def $q0
+; CHECK-GISEL-NEXT: add x8, x0, #4
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: mov.s v0[1], v1[0]
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0
+; CHECK-GISEL-NEXT: ret
%tmp1 = load i32, ptr %bar
%tmp2 = insertelement <2 x i32> %A, i32 %tmp1, i32 1
%tmp3 = getelementptr i32, ptr %bar, i64 1
@@ -8785,6 +14536,16 @@ define <2 x i32> @test_v2i32_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <2 x
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld1lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr s1, [x0]
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 def $q0
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: mov.s v0[1], v1[0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0
+; CHECK-GISEL-NEXT: ret
%tmp1 = load i32, ptr %bar
%tmp2 = insertelement <2 x i32> %A, i32 %tmp1, i32 1
%tmp3 = getelementptr i32, ptr %bar, i64 %inc
@@ -8798,6 +14559,14 @@ define <2 x i64> @test_v2i64_post_imm_ld1lane(ptr %bar, ptr %ptr, <2 x i64> %A)
; CHECK-NEXT: ld1.d { v0 }[1], [x0], #8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld1lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr d1, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #8
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: mov.d v0[1], v1[0]
+; CHECK-GISEL-NEXT: ret
%tmp1 = load i64, ptr %bar
%tmp2 = insertelement <2 x i64> %A, i64 %tmp1, i32 1
%tmp3 = getelementptr i64, ptr %bar, i64 1
@@ -8812,6 +14581,14 @@ define <2 x i64> @test_v2i64_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <2 x
; CHECK-NEXT: ld1.d { v0 }[1], [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld1lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr d1, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: mov.d v0[1], v1[0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%tmp1 = load i64, ptr %bar
%tmp2 = insertelement <2 x i64> %A, i64 %tmp1, i32 1
%tmp3 = getelementptr i64, ptr %bar, i64 %inc
@@ -8825,6 +14602,14 @@ define <4 x float> @test_v4f32_post_imm_ld1lane(ptr %bar, ptr %ptr, <4 x float>
; CHECK-NEXT: ld1.s { v0 }[1], [x0], #4
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld1lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr s1, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #4
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: mov.s v0[1], v1[0]
+; CHECK-GISEL-NEXT: ret
%tmp1 = load float, ptr %bar
%tmp2 = insertelement <4 x float> %A, float %tmp1, i32 1
%tmp3 = getelementptr float, ptr %bar, i64 1
@@ -8839,6 +14624,14 @@ define <4 x float> @test_v4f32_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <4
; CHECK-NEXT: ld1.s { v0 }[1], [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld1lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr s1, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: mov.s v0[1], v1[0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%tmp1 = load float, ptr %bar
%tmp2 = insertelement <4 x float> %A, float %tmp1, i32 1
%tmp3 = getelementptr float, ptr %bar, i64 %inc
@@ -8854,6 +14647,16 @@ define <2 x float> @test_v2f32_post_imm_ld1lane(ptr %bar, ptr %ptr, <2 x float>
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld1lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr s1, [x0]
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 def $q0
+; CHECK-GISEL-NEXT: add x8, x0, #4
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: mov.s v0[1], v1[0]
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0
+; CHECK-GISEL-NEXT: ret
%tmp1 = load float, ptr %bar
%tmp2 = insertelement <2 x float> %A, float %tmp1, i32 1
%tmp3 = getelementptr float, ptr %bar, i64 1
@@ -8870,6 +14673,16 @@ define <2 x float> @test_v2f32_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <2
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld1lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr s1, [x0]
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 def $q0
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: mov.s v0[1], v1[0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0
+; CHECK-GISEL-NEXT: ret
%tmp1 = load float, ptr %bar
%tmp2 = insertelement <2 x float> %A, float %tmp1, i32 1
%tmp3 = getelementptr float, ptr %bar, i64 %inc
@@ -8883,6 +14696,14 @@ define <2 x double> @test_v2f64_post_imm_ld1lane(ptr %bar, ptr %ptr, <2 x double
; CHECK-NEXT: ld1.d { v0 }[1], [x0], #8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld1lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr d1, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, #8
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: mov.d v0[1], v1[0]
+; CHECK-GISEL-NEXT: ret
%tmp1 = load double, ptr %bar
%tmp2 = insertelement <2 x double> %A, double %tmp1, i32 1
%tmp3 = getelementptr double, ptr %bar, i64 1
@@ -8897,6 +14718,14 @@ define <2 x double> @test_v2f64_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <
; CHECK-NEXT: ld1.d { v0 }[1], [x0], x8
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld1lane:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr d1, [x0]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3
+; CHECK-GISEL-NEXT: mov.d v0[1], v1[0]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: ret
%tmp1 = load double, ptr %bar
%tmp2 = insertelement <2 x double> %A, double %tmp1, i32 1
%tmp3 = getelementptr double, ptr %bar, i64 %inc
@@ -8915,6 +14744,16 @@ define <4 x float> @test_v4f32_post_reg_ld1lane_dep_vec_on_load(ptr %bar, ptr %p
; CHECK-NEXT: str x8, [x1]
; CHECK-NEXT: mov.s v0[1], v1[0]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld1lane_dep_vec_on_load:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr s1, [x0]
+; CHECK-GISEL-NEXT: str q0, [x3]
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
+; CHECK-GISEL-NEXT: ldr q0, [x4]
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: mov.s v0[1], v1[0]
+; CHECK-GISEL-NEXT: ret
%tmp1 = load float, ptr %bar
store <4 x float> %vec, ptr %dep_ptr_1, align 16
%A = load <4 x float>, ptr %dep_ptr_2, align 16
@@ -8945,6 +14784,21 @@ define <4 x i16> @test_v4i16_post_reg_ld1lane_forced_narrow(ptr %bar, ptr %ptr,
; CHECK-NEXT: uaddlp.2s v1, v1
; CHECK-NEXT: str d1, [x3]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld1lane_forced_narrow:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1
+; CHECK-GISEL-NEXT: ldr h1, [x0]
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 def $q0
+; CHECK-GISEL-NEXT: str x8, [x1]
+; CHECK-GISEL-NEXT: mov.h v0[1], v1[0]
+; CHECK-GISEL-NEXT: ldr d2, [x3]
+; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0
+; CHECK-GISEL-NEXT: cnt.8b v2, v2
+; CHECK-GISEL-NEXT: uaddlp.4h v2, v2
+; CHECK-GISEL-NEXT: uaddlp.2s v1, v2
+; CHECK-GISEL-NEXT: str d1, [x3]
+; CHECK-GISEL-NEXT: ret
%tmp1 = load i16, ptr %bar
%tmp2 = insertelement <4 x i16> %A, i16 %tmp1, i32 1
%tmp3 = getelementptr i16, ptr %bar, i64 %inc
@@ -8967,6 +14821,18 @@ define void @test_ld1lane_build(ptr %ptr0, ptr %ptr1, ptr %ptr2, ptr %ptr3, ptr
; CHECK-NEXT: sub.2s v0, v1, v0
; CHECK-NEXT: str d0, [x4]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_ld1lane_build:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr s0, [x0]
+; CHECK-GISEL-NEXT: ldr s1, [x1]
+; CHECK-GISEL-NEXT: ldr s2, [x2]
+; CHECK-GISEL-NEXT: ldr s3, [x3]
+; CHECK-GISEL-NEXT: mov.s v0[1], v1[0]
+; CHECK-GISEL-NEXT: mov.s v2[1], v3[0]
+; CHECK-GISEL-NEXT: sub.2s v0, v0, v2
+; CHECK-GISEL-NEXT: str d0, [x4]
+; CHECK-GISEL-NEXT: ret
%load0 = load i32, ptr %ptr0, align 4
%load1 = load i32, ptr %ptr1, align 4
%vec0_0 = insertelement <2 x i32> undef, i32 %load0, i32 0
@@ -8992,6 +14858,19 @@ define void @test_ld1lane_build_i16(ptr %a, ptr %b, ptr %c, ptr %d, <4 x i16> %
; CHECK-NEXT: sub.4h v0, v1, v0
; CHECK-NEXT: str d0, [x4]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_ld1lane_build_i16:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr h1, [x0]
+; CHECK-GISEL-NEXT: ldr h2, [x1]
+; CHECK-GISEL-NEXT: mov.h v1[1], v2[0]
+; CHECK-GISEL-NEXT: ldr h2, [x2]
+; CHECK-GISEL-NEXT: mov.h v1[2], v2[0]
+; CHECK-GISEL-NEXT: ldr h2, [x3]
+; CHECK-GISEL-NEXT: mov.h v1[3], v2[0]
+; CHECK-GISEL-NEXT: sub.4h v0, v1, v0
+; CHECK-GISEL-NEXT: str d0, [x4]
+; CHECK-GISEL-NEXT: ret
%ld.a = load i16, ptr %a
%ld.b = load i16, ptr %b
%ld.c = load i16, ptr %c
@@ -9018,6 +14897,22 @@ define void @test_ld1lane_build_half(ptr %a, ptr %b, ptr %c, ptr %d, <4 x half>
; CHECK-NEXT: fcvtn v0.4h, v0.4s
; CHECK-NEXT: str d0, [x4]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_ld1lane_build_half:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr h1, [x0]
+; CHECK-GISEL-NEXT: ldr h2, [x1]
+; CHECK-GISEL-NEXT: fcvtl v0.4s, v0.4h
+; CHECK-GISEL-NEXT: mov.h v1[1], v2[0]
+; CHECK-GISEL-NEXT: ldr h2, [x2]
+; CHECK-GISEL-NEXT: mov.h v1[2], v2[0]
+; CHECK-GISEL-NEXT: ldr h2, [x3]
+; CHECK-GISEL-NEXT: mov.h v1[3], v2[0]
+; CHECK-GISEL-NEXT: fcvtl v1.4s, v1.4h
+; CHECK-GISEL-NEXT: fsub.4s v0, v1, v0
+; CHECK-GISEL-NEXT: fcvtn v0.4h, v0.4s
+; CHECK-GISEL-NEXT: str d0, [x4]
+; CHECK-GISEL-NEXT: ret
%ld.a = load half, ptr %a
%ld.b = load half, ptr %b
%ld.c = load half, ptr %c
@@ -9046,6 +14941,28 @@ define void @test_ld1lane_build_i8(ptr %a, ptr %b, ptr %c, ptr %d, ptr %e, ptr
; CHECK-NEXT: sub.8b v0, v1, v0
; CHECK-NEXT: str d0, [x8]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_ld1lane_build_i8:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr b1, [x0]
+; CHECK-GISEL-NEXT: ldr b2, [x1]
+; CHECK-GISEL-NEXT: ldr x8, [sp]
+; CHECK-GISEL-NEXT: mov.b v1[1], v2[0]
+; CHECK-GISEL-NEXT: ldr b2, [x2]
+; CHECK-GISEL-NEXT: mov.b v1[2], v2[0]
+; CHECK-GISEL-NEXT: ldr b2, [x3]
+; CHECK-GISEL-NEXT: mov.b v1[3], v2[0]
+; CHECK-GISEL-NEXT: ldr b2, [x4]
+; CHECK-GISEL-NEXT: mov.b v1[4], v2[0]
+; CHECK-GISEL-NEXT: ldr b2, [x5]
+; CHECK-GISEL-NEXT: mov.b v1[5], v2[0]
+; CHECK-GISEL-NEXT: ldr b2, [x6]
+; CHECK-GISEL-NEXT: mov.b v1[6], v2[0]
+; CHECK-GISEL-NEXT: ldr b2, [x7]
+; CHECK-GISEL-NEXT: mov.b v1[7], v2[0]
+; CHECK-GISEL-NEXT: sub.8b v0, v1, v0
+; CHECK-GISEL-NEXT: str d0, [x8]
+; CHECK-GISEL-NEXT: ret
%ld.a = load i8, ptr %a
%ld.b = load i8, ptr %b
%ld.c = load i8, ptr %c
@@ -9076,6 +14993,16 @@ define <4 x i32> @test_inc_cycle(<4 x i32> %vec, ptr %in) {
; CHECK-NEXT: add x8, x0, x8, lsl #2
; CHECK-NEXT: str x8, [x9, _var at PAGEOFF]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: test_inc_cycle:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr s1, [x0]
+; CHECK-GISEL-NEXT: adrp x9, _var at PAGE
+; CHECK-GISEL-NEXT: mov.s v0[0], v1[0]
+; CHECK-GISEL-NEXT: fmov x8, d0
+; CHECK-GISEL-NEXT: add x8, x0, x8, lsl #2
+; CHECK-GISEL-NEXT: str x8, [x9, _var at PAGEOFF]
+; CHECK-GISEL-NEXT: ret
%elt = load i32, ptr %in
%newvec = insertelement <4 x i32> %vec, i32 %elt, i32 0
@@ -9104,6 +15031,21 @@ define i8 @load_single_extract_variable_index_i8(ptr %A, i32 %idx) {
; CHECK-NEXT: ldrb w0, [x8]
; CHECK-NEXT: add sp, sp, #16
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: load_single_extract_variable_index_i8:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: sub sp, sp, #16
+; CHECK-GISEL-NEXT: .cfi_def_cfa_offset 16
+; CHECK-GISEL-NEXT: mov w9, w1
+; CHECK-GISEL-NEXT: ldr q0, [x0]
+; CHECK-GISEL-NEXT: mov x8, sp
+; CHECK-GISEL-NEXT: and x9, x9, #0xf
+; CHECK-GISEL-NEXT: lsl x10, x9, #1
+; CHECK-GISEL-NEXT: str q0, [sp]
+; CHECK-GISEL-NEXT: sub x9, x10, x9
+; CHECK-GISEL-NEXT: ldrb w0, [x8, x9]
+; CHECK-GISEL-NEXT: add sp, sp, #16
+; CHECK-GISEL-NEXT: ret
%lv = load <16 x i8>, ptr %A
%e = extractelement <16 x i8> %lv, i32 %idx
ret i8 %e
@@ -9122,6 +15064,19 @@ define i16 @load_single_extract_variable_index_i16(ptr %A, i32 %idx) {
; CHECK-NEXT: ldrh w0, [x8]
; CHECK-NEXT: add sp, sp, #16
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: load_single_extract_variable_index_i16:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: sub sp, sp, #16
+; CHECK-GISEL-NEXT: .cfi_def_cfa_offset 16
+; CHECK-GISEL-NEXT: ldr q0, [x0]
+; CHECK-GISEL-NEXT: mov w9, w1
+; CHECK-GISEL-NEXT: mov x8, sp
+; CHECK-GISEL-NEXT: and x9, x9, #0x7
+; CHECK-GISEL-NEXT: str q0, [sp]
+; CHECK-GISEL-NEXT: ldrh w0, [x8, x9, lsl #1]
+; CHECK-GISEL-NEXT: add sp, sp, #16
+; CHECK-GISEL-NEXT: ret
%lv = load <8 x i16>, ptr %A
%e = extractelement <8 x i16> %lv, i32 %idx
ret i16 %e
@@ -9134,6 +15089,19 @@ define i32 @load_single_extract_variable_index_i32(ptr %A, i32 %idx) {
; CHECK-NEXT: and x8, x1, #0x3
; CHECK-NEXT: ldr w0, [x0, x8, lsl #2]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: load_single_extract_variable_index_i32:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: sub sp, sp, #16
+; CHECK-GISEL-NEXT: .cfi_def_cfa_offset 16
+; CHECK-GISEL-NEXT: ldr q0, [x0]
+; CHECK-GISEL-NEXT: mov w9, w1
+; CHECK-GISEL-NEXT: mov x8, sp
+; CHECK-GISEL-NEXT: and x9, x9, #0x3
+; CHECK-GISEL-NEXT: str q0, [sp]
+; CHECK-GISEL-NEXT: ldr w0, [x8, x9, lsl #2]
+; CHECK-GISEL-NEXT: add sp, sp, #16
+; CHECK-GISEL-NEXT: ret
%lv = load <4 x i32>, ptr %A
%e = extractelement <4 x i32> %lv, i32 %idx
ret i32 %e
@@ -9148,6 +15116,15 @@ define i32 @load_single_extract_variable_index_v3i32_small_align(ptr %A, i32 %id
; CHECK-NEXT: csel x8, x9, x8, lo
; CHECK-NEXT: ldr w0, [x0, x8, lsl #2]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: load_single_extract_variable_index_v3i32_small_align:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov w9, w1
+; CHECK-GISEL-NEXT: mov w8, #2 ; =0x2
+; CHECK-GISEL-NEXT: cmp x9, #2
+; CHECK-GISEL-NEXT: csel x8, x9, x8, lo
+; CHECK-GISEL-NEXT: ldr w0, [x0, x8, lsl #2]
+; CHECK-GISEL-NEXT: ret
%lv = load <3 x i32>, ptr %A, align 2
%e = extractelement <3 x i32> %lv, i32 %idx
ret i32 %e
@@ -9162,6 +15139,15 @@ define i32 @load_single_extract_variable_index_v3i32_default_align(ptr %A, i32 %
; CHECK-NEXT: csel x8, x9, x8, lo
; CHECK-NEXT: ldr w0, [x0, x8, lsl #2]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: load_single_extract_variable_index_v3i32_default_align:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: mov w9, w1
+; CHECK-GISEL-NEXT: mov w8, #2 ; =0x2
+; CHECK-GISEL-NEXT: cmp x9, #2
+; CHECK-GISEL-NEXT: csel x8, x9, x8, lo
+; CHECK-GISEL-NEXT: ldr w0, [x0, x8, lsl #2]
+; CHECK-GISEL-NEXT: ret
%lv = load <3 x i32>, ptr %A
%e = extractelement <3 x i32> %lv, i32 %idx
ret i32 %e
@@ -9172,6 +15158,11 @@ define i32 @load_single_extract_valid_const_index_v3i32(ptr %A, i32 %idx) {
; CHECK: ; %bb.0:
; CHECK-NEXT: ldr w0, [x0, #8]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: load_single_extract_valid_const_index_v3i32:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: ldr w0, [x0, #8]
+; CHECK-GISEL-NEXT: ret
%lv = load <3 x i32>, ptr %A
%e = extractelement <3 x i32> %lv, i32 2
ret i32 %e
@@ -9183,6 +15174,18 @@ define i32 @load_single_extract_variable_index_masked_i32(ptr %A, i32 %idx) {
; CHECK-NEXT: and w8, w1, #0x3
; CHECK-NEXT: ldr w0, [x0, w8, uxtw #2]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: load_single_extract_variable_index_masked_i32:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: sub sp, sp, #16
+; CHECK-GISEL-NEXT: .cfi_def_cfa_offset 16
+; CHECK-GISEL-NEXT: ldr q0, [x0]
+; CHECK-GISEL-NEXT: mov x8, sp
+; CHECK-GISEL-NEXT: and w9, w1, #0x3
+; CHECK-GISEL-NEXT: str q0, [sp]
+; CHECK-GISEL-NEXT: ldr w0, [x8, w9, uxtw #2]
+; CHECK-GISEL-NEXT: add sp, sp, #16
+; CHECK-GISEL-NEXT: ret
%idx.x = and i32 %idx, 3
%lv = load <4 x i32>, ptr %A
%e = extractelement <4 x i32> %lv, i32 %idx.x
@@ -9195,6 +15198,18 @@ define i32 @load_single_extract_variable_index_masked2_i32(ptr %A, i32 %idx) {
; CHECK-NEXT: and w8, w1, #0x1
; CHECK-NEXT: ldr w0, [x0, w8, uxtw #2]
; CHECK-NEXT: ret
+;
+; CHECK-GISEL-LABEL: load_single_extract_variable_index_masked2_i32:
+; CHECK-GISEL: ; %bb.0:
+; CHECK-GISEL-NEXT: sub sp, sp, #16
+; CHECK-GISEL-NEXT: .cfi_def_cfa_offset 16
+; CHECK-GISEL-NEXT: ldr q0, [x0]
+; CHECK-GISEL-NEXT: mov x8, sp
+; CHECK-GISEL-NEXT: and w9, w1, #0x1
+; CHECK-GISEL-NEXT: str q0, [sp]
+; CHECK-GISEL-NEXT: ldr w0, [x8, w9, uxtw #2]
+; CHECK-GISEL-NEXT: add sp, sp, #16
+; CHECK-GISEL-NEXT: ret
%idx.x = and i32 %idx, 1
%lv = load <4 x i32>, ptr %A
%e = extractelement <4 x i32> %lv, i32 %idx.x
diff --git a/llvm/test/CodeGen/AArch64/arm64-st1.ll b/llvm/test/CodeGen/AArch64/arm64-st1.ll
index 16b3f47be24a061..121ca69bee21dd6 100644
--- a/llvm/test/CodeGen/AArch64/arm64-st1.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-st1.ll
@@ -1,4 +1,5 @@
; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -global-isel -mtriple=arm64-eabi -aarch64-neon-syntax=apple -verify-machineinstrs | FileCheck %s
; The instruction latencies of Exynos-M3 trigger the transform we see under the Exynos check.
; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple -verify-machineinstrs -mcpu=exynos-m3 | FileCheck --check-prefix=EXYNOS %s
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