[llvm] [InstCombine] Optimize 'xor-and-select' sequence to 'or' for bool (PR #66394)

[via llvm-commits]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-llvm-transforms
            
<details>
<summary>Changes</summary>
Optimize `xor`-`and`-`select` sequence to `or` : https://alive2.llvm.org/ce/z/52ZT62
--
Full diff: https://github.com/llvm/llvm-project/pull/66394.diff

2 Files Affected:

- (modified) llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp (+8) 
- (added) llvm/test/Transforms/InstCombine/fold-xor-and-select-i1.ll (+14) 


<pre>
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
index e2965e7a5703976..8a0ba6f766b4ad1 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
@@ -3202,6 +3202,14 @@ Instruction *InstCombinerImpl::foldSelectOfBools(SelectInst &amp;SI) {
     }
   }
 
+  // select (~b &amp; a), a, b -&gt; or a, b
+  // only for scalar types
+  if (match(CondVal, m_And(m_Not(m_Specific(FalseVal)), m_Specific(TrueVal))) &amp;&amp;
+      TrueVal-&gt;getType()-&gt;isIntegerTy(1) &amp;&amp;
+      FalseVal-&gt;getType()-&gt;isIntegerTy(1)) {
+    return BinaryOperator::CreateOr(TrueVal, FalseVal);
+  }
+
   return nullptr;
 }
 
diff --git a/llvm/test/Transforms/InstCombine/fold-xor-and-select-i1.ll b/llvm/test/Transforms/InstCombine/fold-xor-and-select-i1.ll
new file mode 100644
index 000000000000000..a5870a3ce9d973f
--- /dev/null
+++ b/llvm/test/Transforms/InstCombine/fold-xor-and-select-i1.ll
@@ -0,0 +1,14 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt &lt; %s -passes=instcombine -S | FileCheck %s
+
+define i1 @max_if(i1 %a, i1 %b) {
+; CHECK-LABEL: define i1 @max_if
+; CHECK-SAME: (i1 [[A:%.*]], i1 [[B:%.*]]) {
+; CHECK-NEXT:    [[TMP1:%.*]] = or i1 [[A]], [[B]]
+; CHECK-NEXT:    ret i1 [[TMP1]]
+;
+  %1 = xor i1 %b, true
+  %cmp = and i1 %1, %a
+  %2 = select i1 %cmp, i1 %a, i1 %b
+  ret i1 %2
+}
</pre>
</details>


https://github.com/llvm/llvm-project/pull/66394