[llvm] [AArch64] Separate PNR into its own Register Class (PR #65306)
Matthew Devereau via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 13 08:55:21 PDT 2023
================
@@ -0,0 +1,35 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -o - %s -mtriple=aarch64 -verify-machineinstrs -run-pass=postrapseudos -mattr=+sme2 | FileCheck %s
+--- |
+ target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
+ target triple = "aarch64"
+
+ define target("aarch64.svcount") @ptrue_d() {
+ %res = call target("aarch64.svcount") @llvm.aarch64.sve.ptrue.c64()
+ ret target("aarch64.svcount") %res
+ }
+
+ declare target("aarch64.svcount") @llvm.aarch64.sve.ptrue.c64()
+
+...
+---
+name: ptrue_d
+alignment: 4
+tracksRegLiveness: true
+tracksDebugUserValues: true
+frameInfo:
+ maxAlignment: 1
+ maxCallFrameSize: 0
+machineFunctionInfo:
+ hasRedZone: false
+body: |
+ bb.0 (%ir-block.0):
+ ; CHECK-LABEL: name: ptrue_d
+ ; CHECK: renamable $pn8 = PTRUE_C_D
+ ; CHECK-NEXT: $p0 = ORR_PPzPP $p8, $p8, killed $p8, implicit-def $pn8
----------------
MDevereau wrote:
I've changed the implicit def to be the destination register instead of the source now.
https://github.com/llvm/llvm-project/pull/65306
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