[llvm] [AArch64] Separate PNR into its own Register Class (PR #65306)
Sander de Smalen via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 13 08:10:24 PDT 2023
================
@@ -4156,6 +4170,10 @@ void AArch64InstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
} else if (AArch64::PNRRegClass.hasSubClassEq(RC)) {
assert((Subtarget.hasSVE2p1() || Subtarget.hasSME2()) &&
"Unexpected register load without SVE2p1 or SME2");
+ if (DestReg != AArch64::SP) {
----------------
sdesmalen-arm wrote:
(same as previous comment: Why are you testing for `AArch64::SP` here?)
https://github.com/llvm/llvm-project/pull/65306
More information about the llvm-commits
mailing list