[PATCH] D86617: [GlobalISel][TableGen] Take first result for multi-output instructions

Quentin Colombet via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Sep 13 07:22:21 PDT 2023


qcolombet added a comment.

> Long term I assume we should just have MIR patterns working for ISel, but as long as we rely on DAG patterns I believe this is a good change (we inevitably need to make some tradeoffs in this case anyway), can we land it or are there still some objections?

As far as I'm concerned, this is a reasonable default behavior, though we should probably emit a "warning" when the tablegen debug output is ON.

That said, @arsenm had objections, let's check with him.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D86617/new/

https://reviews.llvm.org/D86617



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