[llvm] [RISCV] Reduce LMUL when index is known when lowering insert_vector_elt (PR #66087)

[Philip Reames via llvm-commits]

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@@ -550,9 +550,9 @@ define void @insertelt_c6_v8i64_0_add(ptr %x, ptr %y) {
 ; CHECK-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
 ; CHECK-NEXT:    vle64.v v8, (a0)
 ; CHECK-NEXT:    li a2, 6
-; CHECK-NEXT:    vsetvli zero, zero, e64, m4, tu, ma
+; CHECK-NEXT:    vsetivli zero, 8, e64, m1, tu, ma
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preames wrote:

This looks wrong.  8 probably doesn't fit in LMUL1.  This example happens to work out correctly, but this looks like a hint that maybe you got a VL value wrong somewhere?  (i.e. a VL larger than SmallestVT?)

https://github.com/llvm/llvm-project/pull/66087