[llvm] [AArch64][SME] Various tests should work with +sme, just as they do for +sve (PR #65260)

[via llvm-commits]

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@@ -6202,7 +6202,7 @@ bool AArch64TargetLowering::useSVEForFixedLengthVectorVT(
 
   // All SVE implementations support NEON sized vectors.
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sdesmalen-arm wrote:

I have tried to clarify the comment without making it sound like SME is distinct from SVE.

https://github.com/llvm/llvm-project/pull/65260