[llvm] [LiveRegUnits] Enhanced the register liveness check (PR #66061)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 12 06:21:39 PDT 2023
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@@ -41,6 +41,11 @@ void LiveRegUnits::addRegsInMask(const uint32_t *RegMask) {
}
}
+bool LiveRegUnits::available(const MachineRegisterInfo &MRI,
+ MCPhysReg Reg) const {
+ return !MRI.isReserved(Reg) && !contains(Reg);
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arsenm wrote:
swap the order of the checks
https://github.com/llvm/llvm-project/pull/66061
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