[llvm] ea42c4a - [SVE] Precommit test to show missing initialisation of call operand.

[Paul Walker via llvm-commits]

Author: Paul Walker
Date: 2023-09-12T10:46:41Z
New Revision: ea42c4ac6a24c28fc12d5373a851ff376ea452cf

URL: https://github.com/llvm/llvm-project/commit/ea42c4ac6a24c28fc12d5373a851ff376ea452cf
DIFF: https://github.com/llvm/llvm-project/commit/ea42c4ac6a24c28fc12d5373a851ff376ea452cf.diff

LOG: [SVE] Precommit test to show missing initialisation of call operand.

When calling func_f8_and_v0_passed_via_memory the memory used to
hold the first vector operand is allocated but not initialised.

Added: 
    

Modified: 
    llvm/test/CodeGen/AArch64/sve-calling-convention-mixed.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/AArch64/sve-calling-convention-mixed.ll b/llvm/test/CodeGen/AArch64/sve-calling-convention-mixed.ll
index 53d7509c79dce9a..c8748052a9f263e 100644
--- a/llvm/test/CodeGen/AArch64/sve-calling-convention-mixed.ll
+++ b/llvm/test/CodeGen/AArch64/sve-calling-convention-mixed.ll
@@ -694,6 +694,36 @@ define <vscale x 4 x float> @sve_ret_caller_non_sve_callee_high_range()  {
   ret <vscale x 4 x float> undef
 }
 
+declare void @func_f8_and_v0_passed_via_memory(float %f0, float %f1, float %f2, float %f3, float %f4, float %f5, float %f6, float %f7, float %f8, <vscale x 4 x float> %v0)
+define void @verify_all_operands_are_initialised() {
+; CHECK-LABEL: verify_all_operands_are_initialised:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
+; CHECK-NEXT:    addvl sp, sp, #-1
+; CHECK-NEXT:    sub sp, sp, #16
+; CHECK-NEXT:    .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x20, 0x22, 0x11, 0x08, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 32 + 8 * VG
+; CHECK-NEXT:    .cfi_offset w30, -8
+; CHECK-NEXT:    .cfi_offset w29, -16
+; CHECK-NEXT:    movi d0, #0000000000000000
+; CHECK-NEXT:    fmov s1, #1.00000000
+; CHECK-NEXT:    mov w8, #1090519040 // =0x41000000
+; CHECK-NEXT:    fmov s2, #2.00000000
+; CHECK-NEXT:    fmov s3, #3.00000000
+; CHECK-NEXT:    add x0, sp, #16
+; CHECK-NEXT:    fmov s4, #4.00000000
+; CHECK-NEXT:    fmov s5, #5.00000000
+; CHECK-NEXT:    str w8, [sp]
+; CHECK-NEXT:    fmov s6, #6.00000000
+; CHECK-NEXT:    fmov s7, #7.00000000
+; CHECK-NEXT:    bl func_f8_and_v0_passed_via_memory
+; CHECK-NEXT:    addvl sp, sp, #1
+; CHECK-NEXT:    add sp, sp, #16
+; CHECK-NEXT:    ldp x29, x30, [sp], #16 // 16-byte Folded Reload
+; CHECK-NEXT:    ret
+  call void @func_f8_and_v0_passed_via_memory(float 0.0, float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0, float 8.0, <vscale x 4 x float> shufflevector (<vscale x 4 x float> insertelement (<vscale x 4 x float> poison, float 9.000000e+00, i64 0), <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer))
+  ret void
+}
+
 declare float @callee1(float, <vscale x 8 x double>, <vscale x 8 x double>, <vscale x 2 x double>)
 declare float @callee2(i32, i32, i32, i32, i32, i32, i32, i32, float, <vscale x 8 x double>, <vscale x 8 x double>)
 declare float @callee3(float, float, <vscale x 8 x double>, <vscale x 6 x double>, <vscale x 2 x double>)