[llvm] [AArch64] Separate PNR into its own Register Class (PR #65306)

[David Sherwood via llvm-commits]

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@@ -3658,6 +3658,32 @@ void AArch64InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
     return;
   }
 
+  if (AArch64::PNRRegClass.contains(DestReg) &&
+      AArch64::PPRRegClass.contains(SrcReg)) {
+    assert(Subtarget.hasSVEorSME() && "Unexpected SVE register.");
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david-arm wrote:

I noticed lower down you assert with

 assert((Subtarget.hasSVE2p1() || Subtarget.hasSME2()) &&
              "Unexpected register load without SVE2p1 or SME2");

and I think it makes sense to assert that here for the COPY instructions too, since predicate-as-counter registers were introduced in SVE2.1.

https://github.com/llvm/llvm-project/pull/65306