[llvm] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)

[Jonas Devlieghere via llvm-commits]

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@@ -268,8 +295,7 @@ void RISCVInstPrinter::printVMaskReg(const MCInst *MI, unsigned OpNo,
   if (MO.getReg() == RISCV::NoRegister)
     return;
   O << ", ";
-  printRegName(O, MO.getReg());
-  O << ".t";
+  markup(O, Markup::Register) << getRegisterName(MO.getReg()) << ".t";
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JDevlieghere wrote:

Is the `.t` part of the register name, or some kind of quantifier? For AArch64, we purposely didn't treat it as part of the operand (see David Spickett's comment in https://reviews.llvm.org/D159162). If so, then the original code would do the right thing. 

https://github.com/llvm/llvm-project/pull/65853