[llvm] 252c423 - [test] Change llvm-mc -arch= to -triple=
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 11 14:51:59 PDT 2023
Author: Fangrui Song
Date: 2023-09-11T14:51:50-07:00
New Revision: 252c42354eca54274ed7b10c32c73c6937478e8b
URL: https://github.com/llvm/llvm-project/commit/252c42354eca54274ed7b10c32c73c6937478e8b
DIFF: https://github.com/llvm/llvm-project/commit/252c42354eca54274ed7b10c32c73c6937478e8b.diff
LOG: [test] Change llvm-mc -arch= to -triple=
The issue is uncovered by #47698: for assembly files, -triple= specifies the
full target triple while -arch= merely sets the architecture part of the default
target triple, leaving a target triple which may not make sense, e.g.
riscv64-apple-darwin.
Therefore, -arch= is error-prone and not recommended for tests. The issue has
been benign as we recognize $unknown-apple-darwin as ELF instead of rejecting it
outrightly.
Due to the nature of the issue, we don't see the issue in tests using
architectures that any of Mach-O/COFF/XCOFF supports.
Added:
Modified:
llvm/test/MC/AMDGPU/accvgpr-altnames.s
llvm/test/MC/AMDGPU/add-sub-no-carry.s
llvm/test/MC/AMDGPU/atomic-fadd-insts.s
llvm/test/MC/AMDGPU/branch-comment.s
llvm/test/MC/AMDGPU/buf-fmt-d16-packed.s
llvm/test/MC/AMDGPU/buf-fmt-d16-unpacked.s
llvm/test/MC/AMDGPU/buffer_wbinv1l_vol_vi.s
llvm/test/MC/AMDGPU/cpol-err.s
llvm/test/MC/AMDGPU/dl-insts-err.s
llvm/test/MC/AMDGPU/dl-insts.s
llvm/test/MC/AMDGPU/dpp-err.s
llvm/test/MC/AMDGPU/dpp64.s
llvm/test/MC/AMDGPU/ds-err.s
llvm/test/MC/AMDGPU/ds-gfx9.s
llvm/test/MC/AMDGPU/ds.s
llvm/test/MC/AMDGPU/elf-notes-verify-amdgcn.s
llvm/test/MC/AMDGPU/elf-notes-verify-r600.s
llvm/test/MC/AMDGPU/exp-err.s
llvm/test/MC/AMDGPU/exp-gfx10.s
llvm/test/MC/AMDGPU/exp-pregfx11.s
llvm/test/MC/AMDGPU/exp.s
llvm/test/MC/AMDGPU/expressions-gfx10.s
llvm/test/MC/AMDGPU/expressions-gfx9.s
llvm/test/MC/AMDGPU/expressions.s
llvm/test/MC/AMDGPU/flat-gfx10.s
llvm/test/MC/AMDGPU/flat-gfx9.s
llvm/test/MC/AMDGPU/flat-global.s
llvm/test/MC/AMDGPU/flat-scratch-gfx940.s
llvm/test/MC/AMDGPU/flat-scratch-instructions.s
llvm/test/MC/AMDGPU/flat-scratch-st-mode.s
llvm/test/MC/AMDGPU/flat-scratch.s
llvm/test/MC/AMDGPU/flat.s
llvm/test/MC/AMDGPU/fma-mix.s
llvm/test/MC/AMDGPU/gfx10-constant-bus.s
llvm/test/MC/AMDGPU/gfx10-vop2be-literal.s
llvm/test/MC/AMDGPU/gfx1011_dlops.s
llvm/test/MC/AMDGPU/gfx1011_err.s
llvm/test/MC/AMDGPU/gfx1013.s
llvm/test/MC/AMDGPU/gfx1030_err.s
llvm/test/MC/AMDGPU/gfx1030_new.s
llvm/test/MC/AMDGPU/gfx1030_unsupported.s
llvm/test/MC/AMDGPU/gfx10_asm_dpp16.s
llvm/test/MC/AMDGPU/gfx10_asm_dpp8.s
llvm/test/MC/AMDGPU/gfx10_asm_ds.s
llvm/test/MC/AMDGPU/gfx10_asm_err.s
llvm/test/MC/AMDGPU/gfx10_asm_flat.s
llvm/test/MC/AMDGPU/gfx10_asm_mimg.s
llvm/test/MC/AMDGPU/gfx10_asm_mimg_err.s
llvm/test/MC/AMDGPU/gfx10_asm_mubuf.s
llvm/test/MC/AMDGPU/gfx10_asm_smem.s
llvm/test/MC/AMDGPU/gfx10_asm_sop.s
llvm/test/MC/AMDGPU/gfx10_asm_vop1.s
llvm/test/MC/AMDGPU/gfx10_asm_vop2.s
llvm/test/MC/AMDGPU/gfx10_asm_vop3.s
llvm/test/MC/AMDGPU/gfx10_asm_vopc.s
llvm/test/MC/AMDGPU/gfx10_asm_vopc_e64.s
llvm/test/MC/AMDGPU/gfx10_asm_vopc_sdwa.s
llvm/test/MC/AMDGPU/gfx10_asm_vopcx.s
llvm/test/MC/AMDGPU/gfx10_err_pos.s
llvm/test/MC/AMDGPU/gfx10_unsupported.s
llvm/test/MC/AMDGPU/gfx10_unsupported_dpp.s
llvm/test/MC/AMDGPU/gfx10_unsupported_e32.s
llvm/test/MC/AMDGPU/gfx10_unsupported_e64.s
llvm/test/MC/AMDGPU/gfx10_unsupported_e64_dpp.s
llvm/test/MC/AMDGPU/gfx10_unsupported_sdwa.s
llvm/test/MC/AMDGPU/gfx11-promotions.s
llvm/test/MC/AMDGPU/gfx11_asm_ds.s
llvm/test/MC/AMDGPU/gfx11_asm_err.s
llvm/test/MC/AMDGPU/gfx11_asm_exp.s
llvm/test/MC/AMDGPU/gfx11_asm_flat.s
llvm/test/MC/AMDGPU/gfx11_asm_flat_errs.s
llvm/test/MC/AMDGPU/gfx11_asm_ldsdir.s
llvm/test/MC/AMDGPU/gfx11_asm_ldsdir_err.s
llvm/test/MC/AMDGPU/gfx11_asm_mimg.s
llvm/test/MC/AMDGPU/gfx11_asm_mimg_err.s
llvm/test/MC/AMDGPU/gfx11_asm_mimg_features.s
llvm/test/MC/AMDGPU/gfx11_asm_mtbuf.s
llvm/test/MC/AMDGPU/gfx11_asm_mtbuf_alias.s
llvm/test/MC/AMDGPU/gfx11_asm_mubuf.s
llvm/test/MC/AMDGPU/gfx11_asm_mubuf_alias.s
llvm/test/MC/AMDGPU/gfx11_asm_operands.s
llvm/test/MC/AMDGPU/gfx11_asm_smem.s
llvm/test/MC/AMDGPU/gfx11_asm_smem_alias.s
llvm/test/MC/AMDGPU/gfx11_asm_sop1.s
llvm/test/MC/AMDGPU/gfx11_asm_sop2.s
llvm/test/MC/AMDGPU/gfx11_asm_sopc.s
llvm/test/MC/AMDGPU/gfx11_asm_sopk.s
llvm/test/MC/AMDGPU/gfx11_asm_sopk_err.s
llvm/test/MC/AMDGPU/gfx11_asm_sopp.s
llvm/test/MC/AMDGPU/gfx11_asm_vinterp.s
llvm/test/MC/AMDGPU/gfx11_asm_vinterp_err.s
llvm/test/MC/AMDGPU/gfx11_asm_vop1.s
llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16.s
llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8.s
llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err.s
llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_promote.s
llvm/test/MC/AMDGPU/gfx11_asm_vop2.s
llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp16.s
llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp8.s
llvm/test/MC/AMDGPU/gfx11_asm_vop2_err.s
llvm/test/MC/AMDGPU/gfx11_asm_vop2_t16_err.s
llvm/test/MC/AMDGPU/gfx11_asm_vop2_t16_promote.s
llvm/test/MC/AMDGPU/gfx11_asm_vop3.s
llvm/test/MC/AMDGPU/gfx11_asm_vop3_alias.s
llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop1.s
llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop2.s
llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopc.s
llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopcx.s
llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8.s
llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop1.s
llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop2.s
llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopc.s
llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopcx.s
llvm/test/MC/AMDGPU/gfx11_asm_vop3_err.s
llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop1.s
llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop2.s
llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopc.s
llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopcx.s
llvm/test/MC/AMDGPU/gfx11_asm_vop3p.s
llvm/test/MC/AMDGPU/gfx11_asm_vop3p_dpp16.s
llvm/test/MC/AMDGPU/gfx11_asm_vop3p_dpp8.s
llvm/test/MC/AMDGPU/gfx11_asm_vop3p_features.s
llvm/test/MC/AMDGPU/gfx11_asm_vopc.s
llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp16.s
llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp8.s
llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_err.s
llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_promote.s
llvm/test/MC/AMDGPU/gfx11_asm_vopcx.s
llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp16.s
llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp8.s
llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_err.s
llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_promote.s
llvm/test/MC/AMDGPU/gfx11_asm_vopd.s
llvm/test/MC/AMDGPU/gfx11_asm_vopd_err.s
llvm/test/MC/AMDGPU/gfx11_asm_vopd_features.s
llvm/test/MC/AMDGPU/gfx11_asm_wmma.s
llvm/test/MC/AMDGPU/gfx11_unsupported.s
llvm/test/MC/AMDGPU/gfx11_unsupported_dpp.s
llvm/test/MC/AMDGPU/gfx11_unsupported_e32.s
llvm/test/MC/AMDGPU/gfx11_unsupported_e64.s
llvm/test/MC/AMDGPU/gfx11_unsupported_sdwa.s
llvm/test/MC/AMDGPU/gfx7_asm_ds.s
llvm/test/MC/AMDGPU/gfx7_asm_exp.s
llvm/test/MC/AMDGPU/gfx7_asm_flat.s
llvm/test/MC/AMDGPU/gfx7_asm_mimg.s
llvm/test/MC/AMDGPU/gfx7_asm_mtbuf.s
llvm/test/MC/AMDGPU/gfx7_asm_mubuf.s
llvm/test/MC/AMDGPU/gfx7_asm_smrd.s
llvm/test/MC/AMDGPU/gfx7_asm_sop1.s
llvm/test/MC/AMDGPU/gfx7_asm_sop2.s
llvm/test/MC/AMDGPU/gfx7_asm_sopc.s
llvm/test/MC/AMDGPU/gfx7_asm_sopk.s
llvm/test/MC/AMDGPU/gfx7_asm_sopp.s
llvm/test/MC/AMDGPU/gfx7_asm_vintrp.s
llvm/test/MC/AMDGPU/gfx7_asm_vop1.s
llvm/test/MC/AMDGPU/gfx7_asm_vop2.s
llvm/test/MC/AMDGPU/gfx7_asm_vop3.s
llvm/test/MC/AMDGPU/gfx7_asm_vop3_e64.s
llvm/test/MC/AMDGPU/gfx7_asm_vopc.s
llvm/test/MC/AMDGPU/gfx7_err_pos.s
llvm/test/MC/AMDGPU/gfx7_unsupported.s
llvm/test/MC/AMDGPU/gfx8_asm_ds.s
llvm/test/MC/AMDGPU/gfx8_asm_exp.s
llvm/test/MC/AMDGPU/gfx8_asm_flat.s
llvm/test/MC/AMDGPU/gfx8_asm_mimg.s
llvm/test/MC/AMDGPU/gfx8_asm_mtbuf.s
llvm/test/MC/AMDGPU/gfx8_asm_mubuf.s
llvm/test/MC/AMDGPU/gfx8_asm_smem.s
llvm/test/MC/AMDGPU/gfx8_asm_sop1.s
llvm/test/MC/AMDGPU/gfx8_asm_sop2.s
llvm/test/MC/AMDGPU/gfx8_asm_sopc.s
llvm/test/MC/AMDGPU/gfx8_asm_sopk.s
llvm/test/MC/AMDGPU/gfx8_asm_sopp.s
llvm/test/MC/AMDGPU/gfx8_asm_vintrp.s
llvm/test/MC/AMDGPU/gfx8_asm_vop1.s
llvm/test/MC/AMDGPU/gfx8_asm_vop2.s
llvm/test/MC/AMDGPU/gfx8_asm_vop3.s
llvm/test/MC/AMDGPU/gfx8_asm_vop3_e64.s
llvm/test/MC/AMDGPU/gfx8_asm_vopc.s
llvm/test/MC/AMDGPU/gfx8_err_pos.s
llvm/test/MC/AMDGPU/gfx8_unsupported.s
llvm/test/MC/AMDGPU/gfx9-asm-err.s
llvm/test/MC/AMDGPU/gfx9-vop2be-literal.s
llvm/test/MC/AMDGPU/gfx908_err_pos.s
llvm/test/MC/AMDGPU/gfx90a_asm_features.s
llvm/test/MC/AMDGPU/gfx90a_err.s
llvm/test/MC/AMDGPU/gfx90a_err_pos.s
llvm/test/MC/AMDGPU/gfx90a_ldst_acc.s
llvm/test/MC/AMDGPU/gfx940_asm_features.s
llvm/test/MC/AMDGPU/gfx940_err.s
llvm/test/MC/AMDGPU/gfx940_err_pos.s
llvm/test/MC/AMDGPU/gfx9_asm_ds.s
llvm/test/MC/AMDGPU/gfx9_asm_exp.s
llvm/test/MC/AMDGPU/gfx9_asm_flat.s
llvm/test/MC/AMDGPU/gfx9_asm_mimg.s
llvm/test/MC/AMDGPU/gfx9_asm_mtbuf.s
llvm/test/MC/AMDGPU/gfx9_asm_mubuf.s
llvm/test/MC/AMDGPU/gfx9_asm_smem.s
llvm/test/MC/AMDGPU/gfx9_asm_sop1.s
llvm/test/MC/AMDGPU/gfx9_asm_sop2.s
llvm/test/MC/AMDGPU/gfx9_asm_sopc.s
llvm/test/MC/AMDGPU/gfx9_asm_sopk.s
llvm/test/MC/AMDGPU/gfx9_asm_sopp.s
llvm/test/MC/AMDGPU/gfx9_asm_vintrp.s
llvm/test/MC/AMDGPU/gfx9_asm_vop1.s
llvm/test/MC/AMDGPU/gfx9_asm_vop2.s
llvm/test/MC/AMDGPU/gfx9_asm_vop3.s
llvm/test/MC/AMDGPU/gfx9_asm_vop3_e64.s
llvm/test/MC/AMDGPU/gfx9_asm_vop3p.s
llvm/test/MC/AMDGPU/gfx9_asm_vopc.s
llvm/test/MC/AMDGPU/gfx9_err_pos.s
llvm/test/MC/AMDGPU/gfx9_unsupported.s
llvm/test/MC/AMDGPU/hsa_isa_version_attrs.s
llvm/test/MC/AMDGPU/inline-imm-inv2pi.s
llvm/test/MC/AMDGPU/labels-branch-err.s
llvm/test/MC/AMDGPU/labels-branch-gfx9.s
llvm/test/MC/AMDGPU/labels-branch.s
llvm/test/MC/AMDGPU/lds_direct-ci.s
llvm/test/MC/AMDGPU/lds_direct-err.s
llvm/test/MC/AMDGPU/lds_direct-gfx10.s
llvm/test/MC/AMDGPU/lds_direct.s
llvm/test/MC/AMDGPU/literal16-err.s
llvm/test/MC/AMDGPU/literal16.s
llvm/test/MC/AMDGPU/literals.s
llvm/test/MC/AMDGPU/literalv216-err.s
llvm/test/MC/AMDGPU/literalv216.s
llvm/test/MC/AMDGPU/macro-examples.s
llvm/test/MC/AMDGPU/mad-mix.s
llvm/test/MC/AMDGPU/mai-err-gfx940.s
llvm/test/MC/AMDGPU/mai-err.s
llvm/test/MC/AMDGPU/mai-gfx90a.s
llvm/test/MC/AMDGPU/mai-gfx940.s
llvm/test/MC/AMDGPU/mai.s
llvm/test/MC/AMDGPU/max-branch-distance.s
llvm/test/MC/AMDGPU/mimg-err-gfx940.s
llvm/test/MC/AMDGPU/mimg-err.s
llvm/test/MC/AMDGPU/mimg-gfx90a.s
llvm/test/MC/AMDGPU/mimg.s
llvm/test/MC/AMDGPU/misaligned-vgpr-tuples-err.s
llvm/test/MC/AMDGPU/mtbuf-gfx10.s
llvm/test/MC/AMDGPU/mtbuf.s
llvm/test/MC/AMDGPU/mubuf-gfx10.s
llvm/test/MC/AMDGPU/mubuf-gfx9.s
llvm/test/MC/AMDGPU/mubuf.s
llvm/test/MC/AMDGPU/offset-expr.s
llvm/test/MC/AMDGPU/offsetbug_once.s
llvm/test/MC/AMDGPU/offsetbug_one_and_one.s
llvm/test/MC/AMDGPU/offsetbug_twice.s
llvm/test/MC/AMDGPU/out-of-range-registers.s
llvm/test/MC/AMDGPU/reg-syntax-err.s
llvm/test/MC/AMDGPU/reg-syntax-extra.s
llvm/test/MC/AMDGPU/regression/bug28165.s
llvm/test/MC/AMDGPU/regression/bug28168.s
llvm/test/MC/AMDGPU/regression/bug28413.s
llvm/test/MC/AMDGPU/regression/bug28538.s
llvm/test/MC/AMDGPU/s_endpgm.s
llvm/test/MC/AMDGPU/smem-err.s
llvm/test/MC/AMDGPU/smem.s
llvm/test/MC/AMDGPU/smrd-err.s
llvm/test/MC/AMDGPU/smrd.s
llvm/test/MC/AMDGPU/sop1-err.s
llvm/test/MC/AMDGPU/sop1.s
llvm/test/MC/AMDGPU/sop2-err.s
llvm/test/MC/AMDGPU/sop2.s
llvm/test/MC/AMDGPU/sopc-err.s
llvm/test/MC/AMDGPU/sopc.s
llvm/test/MC/AMDGPU/sopk-err.s
llvm/test/MC/AMDGPU/sopk.s
llvm/test/MC/AMDGPU/sopp-err.s
llvm/test/MC/AMDGPU/sopp-gfx10.s
llvm/test/MC/AMDGPU/sopp-gfx9.s
llvm/test/MC/AMDGPU/sopp.s
llvm/test/MC/AMDGPU/sym_kernel_scope.s
llvm/test/MC/AMDGPU/sym_kernel_scope_agpr.s
llvm/test/MC/AMDGPU/sym_option.s
llvm/test/MC/AMDGPU/trap.s
llvm/test/MC/AMDGPU/v_illegal-atomics.s
llvm/test/MC/AMDGPU/vcmpx-gfx10.s
llvm/test/MC/AMDGPU/vintrp-e64-err.s
llvm/test/MC/AMDGPU/vintrp-err.s
llvm/test/MC/AMDGPU/vintrp.s
llvm/test/MC/AMDGPU/vop-err.s
llvm/test/MC/AMDGPU/vop1-gfx9-err.s
llvm/test/MC/AMDGPU/vop1-gfx9.s
llvm/test/MC/AMDGPU/vop1.s
llvm/test/MC/AMDGPU/vop2-err.s
llvm/test/MC/AMDGPU/vop2.s
llvm/test/MC/AMDGPU/vop3-convert.s
llvm/test/MC/AMDGPU/vop3-errs.s
llvm/test/MC/AMDGPU/vop3-gfx10.s
llvm/test/MC/AMDGPU/vop3-gfx9.s
llvm/test/MC/AMDGPU/vop3-literal.s
llvm/test/MC/AMDGPU/vop3-modifiers-err.s
llvm/test/MC/AMDGPU/vop3-modifiers.s
llvm/test/MC/AMDGPU/vop3-vop1-nosrc.s
llvm/test/MC/AMDGPU/vop3.s
llvm/test/MC/AMDGPU/vop3p-err.s
llvm/test/MC/AMDGPU/vop3p.s
llvm/test/MC/AMDGPU/vop_dpp.s
llvm/test/MC/AMDGPU/vop_dpp_expr.s
llvm/test/MC/AMDGPU/vop_sdwa.s
llvm/test/MC/AMDGPU/vopc-errs.s
llvm/test/MC/AMDGPU/vopc-vi.s
llvm/test/MC/AMDGPU/vopc.s
llvm/test/MC/AMDGPU/wave32.s
llvm/test/MC/AMDGPU/wave_any.s
llvm/test/MC/AMDGPU/xdl-insts-err.s
llvm/test/MC/AMDGPU/xdl-insts-gfx1011-gfx1012.s
llvm/test/MC/AMDGPU/xdl-insts-gfx908.s
llvm/test/MC/AMDGPU/xnack-mask.s
llvm/test/MC/Disassembler/AMDGPU/buf_fmt_packed_d16.txt
llvm/test/MC/Disassembler/AMDGPU/buf_fmt_unpacked_d16.txt
llvm/test/MC/Disassembler/AMDGPU/decode-err.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10-null-reg.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10-sgpr-max.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10-vop2be-literal.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10-vop3-literal.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10-wave32.txt
llvm/test/MC/Disassembler/AMDGPU/gfx1011-xdl-insts.txt
llvm/test/MC/Disassembler/AMDGPU/gfx1011_dlops.txt
llvm/test/MC/Disassembler/AMDGPU/gfx1030_new.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_ds.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_exp.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_flat.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_mimg.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_mtbuf.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_mubuf.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_smem.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_sop1.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_sop2.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_sopc.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_sopk.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_sopp.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1_dpp16.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1_dpp8.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1_sdwa.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_vop2.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_vop2_dpp16.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_vop2_dpp8.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_vop2_sdwa.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3c.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3cx.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3p_literalv216.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_vopc.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_vopc_sdwa.txt
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llvm/test/MC/Sparc/sparcv9-instructions.s
llvm/test/MC/Sparc/sparcv9-synthetic-instructions.s
llvm/test/Object/AMDGPU/objdump.s
Removed:
################################################################################
diff --git a/llvm/test/MC/AMDGPU/accvgpr-altnames.s b/llvm/test/MC/AMDGPU/accvgpr-altnames.s
index b0445f0192860b3..0a2dd642e50dfb9 100644
--- a/llvm/test/MC/AMDGPU/accvgpr-altnames.s
+++ b/llvm/test/MC/AMDGPU/accvgpr-altnames.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx908 -show-encoding %s | FileCheck -check-prefix=GFX908 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx908 -show-encoding %s | FileCheck -check-prefix=GFX908 %s
v_accvgpr_read_b32 v2, acc0
// GFX908: v_accvgpr_read_b32 v2, a0 ; encoding: [0x02,0x40,0xd8,0xd3,0x00,0x01,0x00,0x18]
diff --git a/llvm/test/MC/AMDGPU/add-sub-no-carry.s b/llvm/test/MC/AMDGPU/add-sub-no-carry.s
index 674efc44b8869b3..741749b85530ee8 100644
--- a/llvm/test/MC/AMDGPU/add-sub-no-carry.s
+++ b/llvm/test/MC/AMDGPU/add-sub-no-carry.s
@@ -1,7 +1,7 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck --check-prefix=GFX9 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck --check-prefix=GFX9 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji %s 2>&1 | FileCheck --check-prefix=ERR-VI --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck --check-prefix=ERR-SICI --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=fiji %s 2>&1 | FileCheck --check-prefix=ERR-VI --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck --check-prefix=ERR-SICI --implicit-check-not=error: %s
// FIXME: pre-gfx9 errors should be more useful
diff --git a/llvm/test/MC/AMDGPU/atomic-fadd-insts.s b/llvm/test/MC/AMDGPU/atomic-fadd-insts.s
index 4b892a64d4916f1..e112cce30cffe1b 100644
--- a/llvm/test/MC/AMDGPU/atomic-fadd-insts.s
+++ b/llvm/test/MC/AMDGPU/atomic-fadd-insts.s
@@ -1,5 +1,5 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx908 -show-encoding %s | FileCheck --check-prefix=GFX908 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx908 %s 2>&1 | FileCheck --check-prefix=GFX908-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx908 -show-encoding %s | FileCheck --check-prefix=GFX908 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx908 %s 2>&1 | FileCheck --check-prefix=GFX908-ERR --implicit-check-not=error: %s
buffer_atomic_add_f32 v5, off, s[8:11], s3 offset:4095
// GFX908: encoding: [0xff,0x0f,0x34,0xe1,0x00,0x05,0x02,0x03]
diff --git a/llvm/test/MC/AMDGPU/branch-comment.s b/llvm/test/MC/AMDGPU/branch-comment.s
index 443f0b308580901..bb5547bce1fee7b 100644
--- a/llvm/test/MC/AMDGPU/branch-comment.s
+++ b/llvm/test/MC/AMDGPU/branch-comment.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=fiji -filetype=obj %s | llvm-objcopy -S -K keep_symbol - | llvm-objdump -d --mcpu=fiji - | FileCheck %s --check-prefix=BIN
+// RUN: llvm-mc -triple=amdgcn -mcpu=fiji -filetype=obj %s | llvm-objcopy -S -K keep_symbol - | llvm-objdump -d --mcpu=fiji - | FileCheck %s --check-prefix=BIN
// FIXME: Immediate operands to sopp_br instructions are currently scaled by a
// factor of 4, are unsigned, are always PC relative, don't accept most
diff --git a/llvm/test/MC/AMDGPU/buf-fmt-d16-packed.s b/llvm/test/MC/AMDGPU/buf-fmt-d16-packed.s
index 6821547c5cbb092..3c236d67927c514 100644
--- a/llvm/test/MC/AMDGPU/buf-fmt-d16-packed.s
+++ b/llvm/test/MC/AMDGPU/buf-fmt-d16-packed.s
@@ -1,7 +1,7 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx810 -show-encoding %s | FileCheck -check-prefix=PACKED %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=PACKED %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx810 -show-encoding %s | FileCheck -check-prefix=PACKED %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=PACKED %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji 2>&1 %s | FileCheck -check-prefix=UNPACKED-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=fiji 2>&1 %s | FileCheck -check-prefix=UNPACKED-ERR --implicit-check-not=error: %s
//===----------------------------------------------------------------------===//
diff --git a/llvm/test/MC/AMDGPU/buf-fmt-d16-unpacked.s b/llvm/test/MC/AMDGPU/buf-fmt-d16-unpacked.s
index a6baee79c132333..779152d5c69b921 100644
--- a/llvm/test/MC/AMDGPU/buf-fmt-d16-unpacked.s
+++ b/llvm/test/MC/AMDGPU/buf-fmt-d16-unpacked.s
@@ -1,6 +1,6 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s | FileCheck -check-prefix=UNPACKED %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx810 2>&1 %s | FileCheck -check-prefix=PACKED-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 2>&1 %s | FileCheck -check-prefix=PACKED-ERR --implicit-check-not=error: %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=fiji -show-encoding %s | FileCheck -check-prefix=UNPACKED %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx810 2>&1 %s | FileCheck -check-prefix=PACKED-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 2>&1 %s | FileCheck -check-prefix=PACKED-ERR --implicit-check-not=error: %s
//===----------------------------------------------------------------------===//
diff --git a/llvm/test/MC/AMDGPU/buffer_wbinv1l_vol_vi.s b/llvm/test/MC/AMDGPU/buffer_wbinv1l_vol_vi.s
index 144818481b03fe5..c0e929898655cf2 100644
--- a/llvm/test/MC/AMDGPU/buffer_wbinv1l_vol_vi.s
+++ b/llvm/test/MC/AMDGPU/buffer_wbinv1l_vol_vi.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefix=VI %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefix=VI %s
buffer_wbinvl1_vol
// VI: buffer_wbinvl1_vol ; encoding: [0x00,0x00,0xfc,0xe0,0x00,0x00,0x00,0x00]
diff --git a/llvm/test/MC/AMDGPU/cpol-err.s b/llvm/test/MC/AMDGPU/cpol-err.s
index 2de359b8c461d03..a5fffeb5a6e4de3 100644
--- a/llvm/test/MC/AMDGPU/cpol-err.s
+++ b/llvm/test/MC/AMDGPU/cpol-err.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck %s --implicit-check-not=error: --strict-whitespace
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck %s --implicit-check-not=error: --strict-whitespace
scratch_load_ubyte v1, v2, off cpol:2
// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand.
diff --git a/llvm/test/MC/AMDGPU/dl-insts-err.s b/llvm/test/MC/AMDGPU/dl-insts-err.s
index a57ea66a9b5fbb2..56a3cca199785cf 100644
--- a/llvm/test/MC/AMDGPU/dl-insts-err.s
+++ b/llvm/test/MC/AMDGPU/dl-insts-err.s
@@ -1,8 +1,8 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx800 %s 2>&1 | FileCheck %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx906 %s 2>&1 | FileCheck %s --check-prefix=GFX906-GFX908
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx908 %s 2>&1 | FileCheck %s --check-prefix=GFX906-GFX908
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1013 %s 2>&1 | FileCheck %s --check-prefix=GFX1013
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx800 %s 2>&1 | FileCheck %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx906 %s 2>&1 | FileCheck %s --check-prefix=GFX906-GFX908
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx908 %s 2>&1 | FileCheck %s --check-prefix=GFX906-GFX908
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1013 %s 2>&1 | FileCheck %s --check-prefix=GFX1013
//
// Test unsupported GPUs.
diff --git a/llvm/test/MC/AMDGPU/dl-insts.s b/llvm/test/MC/AMDGPU/dl-insts.s
index fee1566a351f5d2..00e9bec7eb0a239 100644
--- a/llvm/test/MC/AMDGPU/dl-insts.s
+++ b/llvm/test/MC/AMDGPU/dl-insts.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx906 -show-encoding %s | FileCheck %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx908 -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx906 -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx908 -show-encoding %s | FileCheck %s
//
// VOP2 Instructions.
diff --git a/llvm/test/MC/AMDGPU/dpp-err.s b/llvm/test/MC/AMDGPU/dpp-err.s
index 5e22993d7be7c4b..65279fb82ba5b8d 100644
--- a/llvm/test/MC/AMDGPU/dpp-err.s
+++ b/llvm/test/MC/AMDGPU/dpp-err.s
@@ -1,9 +1,9 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefix=GFX89 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=GFX89 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck -check-prefix=GFX10 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=GFX89-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck -check-prefix=GFX89-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck -check-prefix=GFX10-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefix=GFX89 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=GFX89 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck -check-prefix=GFX10 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=GFX89-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck -check-prefix=GFX89-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck -check-prefix=GFX10-ERR --implicit-check-not=error: %s
v_mov_b32_dpp v0, v1 row_share:1 row_mask:0x1 bank_mask:0x1
// GFX89-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand.
diff --git a/llvm/test/MC/AMDGPU/dpp64.s b/llvm/test/MC/AMDGPU/dpp64.s
index 6fb781d7e535ab5..b915dff06f06b64 100644
--- a/llvm/test/MC/AMDGPU/dpp64.s
+++ b/llvm/test/MC/AMDGPU/dpp64.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx90a -show-encoding %s | FileCheck %s --check-prefix=GFX90A
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck %s --check-prefix=GFX900 --implicit-check-not=error:
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx90a -show-encoding %s | FileCheck %s --check-prefix=GFX90A
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck %s --check-prefix=GFX900 --implicit-check-not=error:
// GFX90A: v_ceil_f64_dpp v[0:1], v[2:3] row_newbcast:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x30,0x00,0x7e,0x02,0x51,0x01,0xff]
// GFX900: :[[@LINE+1]]:{{[0-9]+}}: error: not a valid operand.
diff --git a/llvm/test/MC/AMDGPU/ds-err.s b/llvm/test/MC/AMDGPU/ds-err.s
index e8541bc9a575840..bc2a2fff354ffe0 100644
--- a/llvm/test/MC/AMDGPU/ds-err.s
+++ b/llvm/test/MC/AMDGPU/ds-err.s
@@ -1,5 +1,5 @@
-// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck --implicit-check-not=error: %s
// offset too big
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: invalid operand for instruction
diff --git a/llvm/test/MC/AMDGPU/ds-gfx9.s b/llvm/test/MC/AMDGPU/ds-gfx9.s
index 4f0caef4e8f96bf..54e619cd5e01529 100644
--- a/llvm/test/MC/AMDGPU/ds-gfx9.s
+++ b/llvm/test/MC/AMDGPU/ds-gfx9.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=GFX9 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga 2>&1 %s | FileCheck -check-prefix=VI-ERR --implicit-check-not=error: %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=GFX9 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga 2>&1 %s | FileCheck -check-prefix=VI-ERR --implicit-check-not=error: %s
ds_read_u8_d16 v8, v2
// GFX9: ds_read_u8_d16 v8, v2 ; encoding: [0x00,0x00,0xac,0xd8,0x02,0x00,0x00,0x08]
diff --git a/llvm/test/MC/AMDGPU/ds.s b/llvm/test/MC/AMDGPU/ds.s
index ec5b063a7e26f57..fd436fe9fe0ddbc 100644
--- a/llvm/test/MC/AMDGPU/ds.s
+++ b/llvm/test/MC/AMDGPU/ds.s
@@ -1,11 +1,11 @@
-// RUN: not llvm-mc -arch=amdgcn -show-encoding %s | FileCheck %s --check-prefix=SICI
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck %s --check-prefix=SICI
-// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s --check-prefixes=CI,SICI
-// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefix=VI
-
-// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s --check-prefixes=NOSI,NOSICI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s --check-prefixes=NOSI,NOSICI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -show-encoding %s | FileCheck %s --check-prefix=SICI
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck %s --check-prefix=SICI
+// RUN: not llvm-mc -triple=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s --check-prefixes=CI,SICI
+// RUN: llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefix=VI
+
+// RUN: not llvm-mc -triple=amdgcn %s 2>&1 | FileCheck %s --check-prefixes=NOSI,NOSICI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s --check-prefixes=NOSI,NOSICI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
//===----------------------------------------------------------------------===//
// Checks for 16-bit Offsets
diff --git a/llvm/test/MC/AMDGPU/elf-notes-verify-amdgcn.s b/llvm/test/MC/AMDGPU/elf-notes-verify-amdgcn.s
index dc72bbb2a2313dd..8eb1ac6d46124a7 100644
--- a/llvm/test/MC/AMDGPU/elf-notes-verify-amdgcn.s
+++ b/llvm/test/MC/AMDGPU/elf-notes-verify-amdgcn.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch amdgcn %s 2>&1 | FileCheck --check-prefix=GCN %s
+// RUN: not llvm-mc -triple=amdgcn %s 2>&1 | FileCheck --check-prefix=GCN %s
// GCN: :[[@LINE+1]]:{{[0-9]+}}: error: .amd_amdgpu_hsa_metadata directive is not available on non-amdhsa OSes
.amd_amdgpu_hsa_metadata
diff --git a/llvm/test/MC/AMDGPU/elf-notes-verify-r600.s b/llvm/test/MC/AMDGPU/elf-notes-verify-r600.s
index 47ab1607580c052..f6f936260b53b67 100644
--- a/llvm/test/MC/AMDGPU/elf-notes-verify-r600.s
+++ b/llvm/test/MC/AMDGPU/elf-notes-verify-r600.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch r600 %s 2>&1 | FileCheck --check-prefix=R600 %s
+// RUN: not llvm-mc -triple=r600 %s 2>&1 | FileCheck --check-prefix=R600 %s
// R600: :[[@LINE+1]]:{{[0-9]+}}: error: .amd_amdgpu_isa directive is not available on non-amdgcn architectures
.amd_amdgpu_isa "r600"
diff --git a/llvm/test/MC/AMDGPU/exp-err.s b/llvm/test/MC/AMDGPU/exp-err.s
index c7df7b424f2cdf4..5d84f22a5714edb 100644
--- a/llvm/test/MC/AMDGPU/exp-err.s
+++ b/llvm/test/MC/AMDGPU/exp-err.s
@@ -1,6 +1,6 @@
-// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck -check-prefixes=GCN,GFX68 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefixes=GCN,GFX68 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 %s 2>&1 | FileCheck -check-prefixes=GCN,GFX11 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn %s 2>&1 | FileCheck -check-prefixes=GCN,GFX68 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefixes=GCN,GFX68 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 %s 2>&1 | FileCheck -check-prefixes=GCN,GFX11 --implicit-check-not=error: %s
exp mrt8 v3, v2, v1, v0
// GCN: :[[@LINE-1]]:5: error: invalid exp target
diff --git a/llvm/test/MC/AMDGPU/exp-gfx10.s b/llvm/test/MC/AMDGPU/exp-gfx10.s
index 5e503efff1a236b..295d85f218034b4 100644
--- a/llvm/test/MC/AMDGPU/exp-gfx10.s
+++ b/llvm/test/MC/AMDGPU/exp-gfx10.s
@@ -1,7 +1,7 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=verde %s 2>&1 | FileCheck -check-prefix=SIVI --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=SIVI --implicit-check-not=error: %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck -check-prefix=GFX10 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck -check-prefix=GFX11 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=verde %s 2>&1 | FileCheck -check-prefix=SIVI --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=SIVI --implicit-check-not=error: %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck -check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck -check-prefix=GFX11 %s
exp prim v1, off, off, off
// SIVI: :[[@LINE-1]]:5: error: exp target is not supported on this GPU
diff --git a/llvm/test/MC/AMDGPU/exp-pregfx11.s b/llvm/test/MC/AMDGPU/exp-pregfx11.s
index 8a8d0bfc42ef445..5cd491646637bde 100644
--- a/llvm/test/MC/AMDGPU/exp-pregfx11.s
+++ b/llvm/test/MC/AMDGPU/exp-pregfx11.s
@@ -1,7 +1,7 @@
-// RUN: llvm-mc -arch=amdgcn -show-encoding %s | FileCheck -check-prefix=SI %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefix=GFX89 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=GFX89 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck -check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -show-encoding %s | FileCheck -check-prefix=SI %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefix=GFX89 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=GFX89 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck -check-prefix=GFX10 %s
exp null v4, v3, v2, v1
// SI: exp null v4, v3, v2, v1 ; encoding: [0x9f,0x00,0x00,0xf8,0x04,0x03,0x02,0x01]
diff --git a/llvm/test/MC/AMDGPU/exp.s b/llvm/test/MC/AMDGPU/exp.s
index 321075057a21ad1..a2fa09b71496c67 100644
--- a/llvm/test/MC/AMDGPU/exp.s
+++ b/llvm/test/MC/AMDGPU/exp.s
@@ -1,8 +1,8 @@
-// RUN: llvm-mc -arch=amdgcn -show-encoding %s | FileCheck -check-prefix=SI %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefix=GFX89 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=GFX89 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck -check-prefix=GFX10 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck -check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -show-encoding %s | FileCheck -check-prefix=SI %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefix=GFX89 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=GFX89 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck -check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck -check-prefix=GFX10 %s
exp mrt0 off, off, off, off
// SI: exp mrt0 off, off, off, off ; encoding: [0x00,0x00,0x00,0xf8,0x00,0x00,0x00,0x00]
diff --git a/llvm/test/MC/AMDGPU/expressions-gfx10.s b/llvm/test/MC/AMDGPU/expressions-gfx10.s
index e4e91b16359f6b4..fc029a3d8e51916 100644
--- a/llvm/test/MC/AMDGPU/expressions-gfx10.s
+++ b/llvm/test/MC/AMDGPU/expressions-gfx10.s
@@ -1,5 +1,5 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck %s --check-prefix=GFX10
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck -check-prefix=NOGFX10 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck %s --check-prefix=GFX10
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck -check-prefix=NOGFX10 --implicit-check-not=error: %s
i1=1
diff --git a/llvm/test/MC/AMDGPU/expressions-gfx9.s b/llvm/test/MC/AMDGPU/expressions-gfx9.s
index b1ba10429c1a39b..903053b2ddab57a 100644
--- a/llvm/test/MC/AMDGPU/expressions-gfx9.s
+++ b/llvm/test/MC/AMDGPU/expressions-gfx9.s
@@ -1,5 +1,5 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s --check-prefix=GFX9
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck %s --check-prefix=NOGFX9 --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s --check-prefix=GFX9
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck %s --check-prefix=NOGFX9 --implicit-check-not=error:
//===----------------------------------------------------------------------===//
// Relocatable expressions cannot be used with SDWA modifiers.
diff --git a/llvm/test/MC/AMDGPU/expressions.s b/llvm/test/MC/AMDGPU/expressions.s
index bd04c71f49508f0..5df128a122af07a 100644
--- a/llvm/test/MC/AMDGPU/expressions.s
+++ b/llvm/test/MC/AMDGPU/expressions.s
@@ -1,5 +1,5 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s | FileCheck %s --check-prefix=VI
-// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji %s 2>&1 | FileCheck %s --check-prefix=NOVI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=fiji -show-encoding %s | FileCheck %s --check-prefix=VI
+// RUN: not llvm-mc -triple=amdgcn -mcpu=fiji %s 2>&1 | FileCheck %s --check-prefix=NOVI --implicit-check-not=error:
//===----------------------------------------------------------------------===//
// Floating-point expressions are not supported
diff --git a/llvm/test/MC/AMDGPU/flat-gfx10.s b/llvm/test/MC/AMDGPU/flat-gfx10.s
index b5e0febcf910ae5..80aedced88f4008 100644
--- a/llvm/test/MC/AMDGPU/flat-gfx10.s
+++ b/llvm/test/MC/AMDGPU/flat-gfx10.s
@@ -1,5 +1,5 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck --check-prefix=GFX10-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck --check-prefix=GFX10-ERR --implicit-check-not=error: %s
flat_load_dword v1, v[3:4]
// GFX10: encoding: [0x00,0x00,0x30,0xdc,0x03,0x00,0x7d,0x01]
diff --git a/llvm/test/MC/AMDGPU/flat-gfx9.s b/llvm/test/MC/AMDGPU/flat-gfx9.s
index 779e6c8e54f24ad..23f508669bc0e84 100644
--- a/llvm/test/MC/AMDGPU/flat-gfx9.s
+++ b/llvm/test/MC/AMDGPU/flat-gfx9.s
@@ -1,8 +1,8 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=GFX9 -check-prefix=GCN %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefix=VI -check-prefix=GCN %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=GFX9 -check-prefix=GCN %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefix=VI -check-prefix=GCN %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 2>&1 %s | FileCheck -check-prefix=GFX9-ERR -check-prefix=GCNERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga 2>&1 %s | FileCheck -check-prefix=VI-ERR -check-prefix=GCNERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 2>&1 %s | FileCheck -check-prefix=GFX9-ERR -check-prefix=GCNERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga 2>&1 %s | FileCheck -check-prefix=VI-ERR -check-prefix=GCNERR --implicit-check-not=error: %s
flat_load_dword v1, v[3:4] offset:0
diff --git a/llvm/test/MC/AMDGPU/flat-global.s b/llvm/test/MC/AMDGPU/flat-global.s
index 284ebd46a347954..e81fae86b055833 100644
--- a/llvm/test/MC/AMDGPU/flat-global.s
+++ b/llvm/test/MC/AMDGPU/flat-global.s
@@ -1,9 +1,9 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck --check-prefixes=GFX9,GCN %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 2>&1 %s | FileCheck -check-prefix=GFX9-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga 2>&1 %s | FileCheck -check-prefix=VI-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck --check-prefixes=GFX9,GCN %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 2>&1 %s | FileCheck -check-prefix=GFX9-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga 2>&1 %s | FileCheck -check-prefix=VI-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck --check-prefix=GFX10-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck --check-prefix=GFX10-ERR --implicit-check-not=error: %s
global_load_ubyte v1, v[3:4], off
// GFX10: encoding: [0x00,0x80,0x20,0xdc,0x03,0x00,0x7d,0x01]
diff --git a/llvm/test/MC/AMDGPU/flat-scratch-gfx940.s b/llvm/test/MC/AMDGPU/flat-scratch-gfx940.s
index 3af48bcd8ea189a..fde3d2057b2ad13 100644
--- a/llvm/test/MC/AMDGPU/flat-scratch-gfx940.s
+++ b/llvm/test/MC/AMDGPU/flat-scratch-gfx940.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx940 -show-encoding %s | FileCheck -check-prefix=GFX940 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx940 -show-encoding %s | FileCheck -check-prefix=GFX940 %s
scratch_load_dword a2, v4, s6
// GFX940: scratch_load_dword a2, v4, s6 ; encoding: [0x00,0x60,0x50,0xdc,0x04,0x00,0x86,0x02]
diff --git a/llvm/test/MC/AMDGPU/flat-scratch-instructions.s b/llvm/test/MC/AMDGPU/flat-scratch-instructions.s
index 512cf69aee0b1de..607d0d1abdade87 100644
--- a/llvm/test/MC/AMDGPU/flat-scratch-instructions.s
+++ b/llvm/test/MC/AMDGPU/flat-scratch-instructions.s
@@ -1,9 +1,9 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=GFX9 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 2>&1 %s | FileCheck -check-prefix=GFX9-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga 2>&1 %s | FileCheck -check-prefix=VI-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=GFX9 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 2>&1 %s | FileCheck -check-prefix=GFX9-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga 2>&1 %s | FileCheck -check-prefix=VI-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck --check-prefix=GFX10-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck --check-prefix=GFX10-ERR --implicit-check-not=error: %s
scratch_load_ubyte v1, v2, off
// GFX10: encoding: [0x00,0x40,0x20,0xdc,0x02,0x00,0x7d,0x01]
diff --git a/llvm/test/MC/AMDGPU/flat-scratch-st-mode.s b/llvm/test/MC/AMDGPU/flat-scratch-st-mode.s
index 6455acc1bffd415..a1d64efa8f11b13 100644
--- a/llvm/test/MC/AMDGPU/flat-scratch-st-mode.s
+++ b/llvm/test/MC/AMDGPU/flat-scratch-st-mode.s
@@ -1,7 +1,7 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga 2>&1 %s | FileCheck -check-prefix=VI-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 2>&1 %s | FileCheck -check-prefix=GFX9_10-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 2>&1 %s | FileCheck --check-prefixes=GFX9_10-ERR --implicit-check-not=error: %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1030 -show-encoding %s | FileCheck --check-prefixes=GFX1030 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga 2>&1 %s | FileCheck -check-prefix=VI-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 2>&1 %s | FileCheck -check-prefix=GFX9_10-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 2>&1 %s | FileCheck --check-prefixes=GFX9_10-ERR --implicit-check-not=error: %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1030 -show-encoding %s | FileCheck --check-prefixes=GFX1030 %s
scratch_load_ubyte v1, off, off
// GFX1030: encoding: [0x00,0x40,0x20,0xdc,0x00,0x00,0x7f,0x01]
diff --git a/llvm/test/MC/AMDGPU/flat-scratch.s b/llvm/test/MC/AMDGPU/flat-scratch.s
index 19059a6e8e0dbb2..c4e8e6ef6a2cf7a 100644
--- a/llvm/test/MC/AMDGPU/flat-scratch.s
+++ b/llvm/test/MC/AMDGPU/flat-scratch.s
@@ -1,8 +1,8 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefix=NOSI --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=hawaii %s 2>&1 | FileCheck -check-prefix=NOCI --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=NOVI --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=hawaii -show-encoding %s | FileCheck -check-prefix=CI %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefix=VI %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefix=NOSI --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=hawaii %s 2>&1 | FileCheck -check-prefix=NOCI --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=NOVI --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=hawaii -show-encoding %s | FileCheck -check-prefix=CI %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefix=VI %s
s_mov_b64 flat_scratch, -1
// NOSI: :[[@LINE-1]]:{{[0-9]+}}: error: register not available on this GPU
diff --git a/llvm/test/MC/AMDGPU/flat.s b/llvm/test/MC/AMDGPU/flat.s
index 32c6e59976772ee..42be909bbbbbd33 100644
--- a/llvm/test/MC/AMDGPU/flat.s
+++ b/llvm/test/MC/AMDGPU/flat.s
@@ -1,9 +1,9 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s --check-prefix=CIVI --check-prefix=CI
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefix=CIVI --check-prefix=VI
+// RUN: llvm-mc -triple=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s --check-prefix=CIVI --check-prefix=CI
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefix=CIVI --check-prefix=VI
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck %s --check-prefix=NOVI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s --check-prefix=NOSI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s --check-prefix=NOSI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s 2>&1 | FileCheck %s --check-prefix=NOVI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn %s 2>&1 | FileCheck %s --check-prefix=NOSI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s --check-prefix=NOSI --implicit-check-not=error:
//===----------------------------------------------------------------------===//
// Operands
diff --git a/llvm/test/MC/AMDGPU/fma-mix.s b/llvm/test/MC/AMDGPU/fma-mix.s
index d70c76045d5e201..a6bb6a4cc3e00b7 100644
--- a/llvm/test/MC/AMDGPU/fma-mix.s
+++ b/llvm/test/MC/AMDGPU/fma-mix.s
@@ -1,6 +1,6 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx904 -show-encoding %s | FileCheck -check-prefix=GFX9-FMAMIX %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx906 -show-encoding %s | FileCheck -check-prefix=GFX9-FMAMIX %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck -check-prefix=GFX9-MADMIX-ERR --implicit-check-not=error: %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx904 -show-encoding %s | FileCheck -check-prefix=GFX9-FMAMIX %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx906 -show-encoding %s | FileCheck -check-prefix=GFX9-FMAMIX %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck -check-prefix=GFX9-MADMIX-ERR --implicit-check-not=error: %s
v_fma_mix_f32 v0, v1, v2, v3
// GFX9-FMAMIX: v_fma_mix_f32 v0, v1, v2, v3 ; encoding: [0x00,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x04]
diff --git a/llvm/test/MC/AMDGPU/gfx10-constant-bus.s b/llvm/test/MC/AMDGPU/gfx10-constant-bus.s
index 7478415440d3a57..793d9fdb53dd5a0 100644
--- a/llvm/test/MC/AMDGPU/gfx10-constant-bus.s
+++ b/llvm/test/MC/AMDGPU/gfx10-constant-bus.s
@@ -1,7 +1,7 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck -check-prefixes=GCN,GFX10 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck -check-prefixes=GCN-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck -check-prefixes=GCN,GFX11 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 %s 2>&1 | FileCheck -check-prefixes=GCN-ERR,GFX11-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck -check-prefixes=GCN,GFX10 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck -check-prefixes=GCN-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck -check-prefixes=GCN,GFX11 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 %s 2>&1 | FileCheck -check-prefixes=GCN-ERR,GFX11-ERR --implicit-check-not=error: %s
//-----------------------------------------------------------------------------------------
// On GFX10 we can use two scalar operands (except for 64-bit shift instructions)
diff --git a/llvm/test/MC/AMDGPU/gfx10-vop2be-literal.s b/llvm/test/MC/AMDGPU/gfx10-vop2be-literal.s
index 827496244843881..01b11b1098a118f 100644
--- a/llvm/test/MC/AMDGPU/gfx10-vop2be-literal.s
+++ b/llvm/test/MC/AMDGPU/gfx10-vop2be-literal.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
v_add_co_ci_u32_e32 v3, vcc_lo, 12345, v3, vcc_lo
// GFX10: v_add_co_ci_u32_e32 v3, vcc_lo, 0x3039, v3, vcc_lo ; encoding: [0xff,0x06,0x06,0x50,0x39,0x30,0x00,0x00]
diff --git a/llvm/test/MC/AMDGPU/gfx1011_dlops.s b/llvm/test/MC/AMDGPU/gfx1011_dlops.s
index 18e831eb58beb80..5780c182af843ca 100644
--- a/llvm/test/MC/AMDGPU/gfx1011_dlops.s
+++ b/llvm/test/MC/AMDGPU/gfx1011_dlops.s
@@ -1,12 +1,12 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1011 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1012 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1030 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1031 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1032 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1033 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1034 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1035 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1036 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1011 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1012 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1030 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1031 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1032 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1033 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1034 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1035 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1036 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
v_dot2_f32_f16 v0, v1, v2, v3
// GFX10: encoding: [0x00,0x40,0x13,0xcc,0x01,0x05,0x0e,0x1c]
diff --git a/llvm/test/MC/AMDGPU/gfx1011_err.s b/llvm/test/MC/AMDGPU/gfx1011_err.s
index bedff0ec49e8403..4b37aaf221e395f 100644
--- a/llvm/test/MC/AMDGPU/gfx1011_err.s
+++ b/llvm/test/MC/AMDGPU/gfx1011_err.s
@@ -1,5 +1,5 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1011 %s 2>&1 | FileCheck --check-prefix=GFX10 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1012 %s 2>&1 | FileCheck --check-prefix=GFX10 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1011 %s 2>&1 | FileCheck --check-prefix=GFX10 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1012 %s 2>&1 | FileCheck --check-prefix=GFX10 --implicit-check-not=error: %s
v_dot8c_i32_i4 v5, v1, v2
// GFX10: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
diff --git a/llvm/test/MC/AMDGPU/gfx1013.s b/llvm/test/MC/AMDGPU/gfx1013.s
index b99265feaad9d09..a4180c3d93a23e4 100644
--- a/llvm/test/MC/AMDGPU/gfx1013.s
+++ b/llvm/test/MC/AMDGPU/gfx1013.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1013 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1013 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck %s
image_bvh64_intersect_ray v[5:8], v[1:12], s[8:11]
// CHECK: [0x01,0x9f,0x9c,0xf1,0x01,0x05,0x02,0x00]
diff --git a/llvm/test/MC/AMDGPU/gfx1030_err.s b/llvm/test/MC/AMDGPU/gfx1030_err.s
index 1bab041909ab4ab..10ffa9b73a04f5f 100644
--- a/llvm/test/MC/AMDGPU/gfx1030_err.s
+++ b/llvm/test/MC/AMDGPU/gfx1030_err.s
@@ -1,10 +1,10 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1030 %s 2>&1 | FileCheck --check-prefix=GFX10 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1031 %s 2>&1 | FileCheck --check-prefix=GFX10 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1032 %s 2>&1 | FileCheck --check-prefix=GFX10 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1033 %s 2>&1 | FileCheck --check-prefix=GFX10 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1034 %s 2>&1 | FileCheck --check-prefix=GFX10 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1035 %s 2>&1 | FileCheck --check-prefix=GFX10 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1036 %s 2>&1 | FileCheck --check-prefix=GFX10 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1030 %s 2>&1 | FileCheck --check-prefix=GFX10 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1031 %s 2>&1 | FileCheck --check-prefix=GFX10 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1032 %s 2>&1 | FileCheck --check-prefix=GFX10 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1033 %s 2>&1 | FileCheck --check-prefix=GFX10 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1034 %s 2>&1 | FileCheck --check-prefix=GFX10 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1035 %s 2>&1 | FileCheck --check-prefix=GFX10 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1036 %s 2>&1 | FileCheck --check-prefix=GFX10 --implicit-check-not=error: %s
v_dot8c_i32_i4 v5, v1, v2
// GFX10: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
diff --git a/llvm/test/MC/AMDGPU/gfx1030_new.s b/llvm/test/MC/AMDGPU/gfx1030_new.s
index 19907d690b55679..e03bc9b0df773fd 100644
--- a/llvm/test/MC/AMDGPU/gfx1030_new.s
+++ b/llvm/test/MC/AMDGPU/gfx1030_new.s
@@ -1,10 +1,10 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1030 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1031 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1032 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1033 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1034 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1035 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1036 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1030 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1031 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1032 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1033 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1034 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1035 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1036 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
global_load_dword_addtid v1, s[2:3] offset:16
// GFX10: encoding: [0x10,0x80,0x58,0xdc,0x00,0x00,0x02,0x01]
diff --git a/llvm/test/MC/AMDGPU/gfx1030_unsupported.s b/llvm/test/MC/AMDGPU/gfx1030_unsupported.s
index 57cfb2f2514cd93..9112a30b0b7bd06 100644
--- a/llvm/test/MC/AMDGPU/gfx1030_unsupported.s
+++ b/llvm/test/MC/AMDGPU/gfx1030_unsupported.s
@@ -1,5 +1,5 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1030 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1030 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1030 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1030 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
v_mul_lo_i32 v0, v1, v2
// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
diff --git a/llvm/test/MC/AMDGPU/gfx10_asm_dpp16.s b/llvm/test/MC/AMDGPU/gfx10_asm_dpp16.s
index ca5a3abd39e574e..77df1f62b224327 100644
--- a/llvm/test/MC/AMDGPU/gfx10_asm_dpp16.s
+++ b/llvm/test/MC/AMDGPU/gfx10_asm_dpp16.s
@@ -1,7 +1,7 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX10,W32 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX10,W64 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX10,W32 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX10,W64 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
v_mov_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
// GFX10: [0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x00]
diff --git a/llvm/test/MC/AMDGPU/gfx10_asm_dpp8.s b/llvm/test/MC/AMDGPU/gfx10_asm_dpp8.s
index 2a291e7de0db674..260d06d2e4cb58d 100644
--- a/llvm/test/MC/AMDGPU/gfx10_asm_dpp8.s
+++ b/llvm/test/MC/AMDGPU/gfx10_asm_dpp8.s
@@ -1,7 +1,7 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX10,W32 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX10,W64 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX10,W32 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX10,W64 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
v_mov_b32_dpp v5, v1 dpp8:[0,1,2,3,4,5,6,7]
// GFX10: encoding: [0xe9,0x02,0x0a,0x7e,0x01,0x88,0xc6,0xfa]
diff --git a/llvm/test/MC/AMDGPU/gfx10_asm_ds.s b/llvm/test/MC/AMDGPU/gfx10_asm_ds.s
index 14670eb6a8ad603..abe3586e3d0ea7d 100644
--- a/llvm/test/MC/AMDGPU/gfx10_asm_ds.s
+++ b/llvm/test/MC/AMDGPU/gfx10_asm_ds.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
//===----------------------------------------------------------------------===//
// ENC_DS.
diff --git a/llvm/test/MC/AMDGPU/gfx10_asm_err.s b/llvm/test/MC/AMDGPU/gfx10_asm_err.s
index 590504b73114e6e..ef12ba2a66b1940 100644
--- a/llvm/test/MC/AMDGPU/gfx10_asm_err.s
+++ b/llvm/test/MC/AMDGPU/gfx10_asm_err.s
@@ -1,9 +1,9 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx601 %s 2>&1 | FileCheck --check-prefixes=GFX6-7,GFX6-8,GFX6-9 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx701 %s 2>&1 | FileCheck --check-prefixes=GFX6-7,GFX6-8,GFX6-9 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx801 %s 2>&1 | FileCheck --check-prefixes=GFX6-8,GFX6-9,GFX8-9 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck --check-prefixes=GFX6-9,GFX8-9 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefixes=GFX10 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefixes=GFX10 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx601 %s 2>&1 | FileCheck --check-prefixes=GFX6-7,GFX6-8,GFX6-9 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx701 %s 2>&1 | FileCheck --check-prefixes=GFX6-7,GFX6-8,GFX6-9 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx801 %s 2>&1 | FileCheck --check-prefixes=GFX6-8,GFX6-9,GFX8-9 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck --check-prefixes=GFX6-9,GFX8-9 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefixes=GFX10 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefixes=GFX10 --implicit-check-not=error: %s
//===----------------------------------------------------------------------===//
// ENC_DS.
diff --git a/llvm/test/MC/AMDGPU/gfx10_asm_flat.s b/llvm/test/MC/AMDGPU/gfx10_asm_flat.s
index daf06082daab6f4..7340e48db3e84b6 100644
--- a/llvm/test/MC/AMDGPU/gfx10_asm_flat.s
+++ b/llvm/test/MC/AMDGPU/gfx10_asm_flat.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
//===----------------------------------------------------------------------===//
// ENC_FLAT.
diff --git a/llvm/test/MC/AMDGPU/gfx10_asm_mimg.s b/llvm/test/MC/AMDGPU/gfx10_asm_mimg.s
index 45ecf93a1d306db..7b137289aa81767 100644
--- a/llvm/test/MC/AMDGPU/gfx10_asm_mimg.s
+++ b/llvm/test/MC/AMDGPU/gfx10_asm_mimg.s
@@ -1,4 +1,4 @@
-; RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck --check-prefixes=GFX10 %s
+; RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck --check-prefixes=GFX10 %s
image_load v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm
; GFX10: image_load v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm ; encoding: [0x00,0x1f,0x00,0xf0,0x00,0x00,0x00,0x00]
diff --git a/llvm/test/MC/AMDGPU/gfx10_asm_mimg_err.s b/llvm/test/MC/AMDGPU/gfx10_asm_mimg_err.s
index 8fc33ae9acadac4..8deb16ebeb2043e 100644
--- a/llvm/test/MC/AMDGPU/gfx10_asm_mimg_err.s
+++ b/llvm/test/MC/AMDGPU/gfx10_asm_mimg_err.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck --check-prefixes=NOGFX10 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck --check-prefixes=NOGFX10 --implicit-check-not=error: %s
// TODO: more helpful error message for missing dim operand
image_load v[0:3], v0, s[0:7] dmask:0xf unorm
diff --git a/llvm/test/MC/AMDGPU/gfx10_asm_mubuf.s b/llvm/test/MC/AMDGPU/gfx10_asm_mubuf.s
index 73951bd6c298e73..99c9c4aee4a761c 100644
--- a/llvm/test/MC/AMDGPU/gfx10_asm_mubuf.s
+++ b/llvm/test/MC/AMDGPU/gfx10_asm_mubuf.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
//===----------------------------------------------------------------------===//
// ENC_MUBUF.
diff --git a/llvm/test/MC/AMDGPU/gfx10_asm_smem.s b/llvm/test/MC/AMDGPU/gfx10_asm_smem.s
index ef4b460f67ab630..25c9e8f35093e26 100644
--- a/llvm/test/MC/AMDGPU/gfx10_asm_smem.s
+++ b/llvm/test/MC/AMDGPU/gfx10_asm_smem.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
//===----------------------------------------------------------------------===//
// ENC_SMEM.
diff --git a/llvm/test/MC/AMDGPU/gfx10_asm_sop.s b/llvm/test/MC/AMDGPU/gfx10_asm_sop.s
index 80c5d1dd24d0147..8f1cde76c6aa3cf 100644
--- a/llvm/test/MC/AMDGPU/gfx10_asm_sop.s
+++ b/llvm/test/MC/AMDGPU/gfx10_asm_sop.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
//===----------------------------------------------------------------------===//
// ENC_SOP1.
diff --git a/llvm/test/MC/AMDGPU/gfx10_asm_vop1.s b/llvm/test/MC/AMDGPU/gfx10_asm_vop1.s
index 799eff52dae5b2b..1cfafebe2c3cd4c 100644
--- a/llvm/test/MC/AMDGPU/gfx10_asm_vop1.s
+++ b/llvm/test/MC/AMDGPU/gfx10_asm_vop1.s
@@ -1,7 +1,7 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=GFX10-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=GFX10-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=GFX10-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=GFX10-ERR --implicit-check-not=error: %s
//===----------------------------------------------------------------------===//
// ENC_VOP1.
diff --git a/llvm/test/MC/AMDGPU/gfx10_asm_vop2.s b/llvm/test/MC/AMDGPU/gfx10_asm_vop2.s
index b1b54005bee285c..bf8e18ec1451235 100644
--- a/llvm/test/MC/AMDGPU/gfx10_asm_vop2.s
+++ b/llvm/test/MC/AMDGPU/gfx10_asm_vop2.s
@@ -1,7 +1,7 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX10,W32 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX10,W64 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX10,W32 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX10,W64 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
//===----------------------------------------------------------------------===//
// ENC_VOP2.
diff --git a/llvm/test/MC/AMDGPU/gfx10_asm_vop3.s b/llvm/test/MC/AMDGPU/gfx10_asm_vop3.s
index b05bab15e20086a..09d833d0ce4b821 100644
--- a/llvm/test/MC/AMDGPU/gfx10_asm_vop3.s
+++ b/llvm/test/MC/AMDGPU/gfx10_asm_vop3.s
@@ -1,7 +1,7 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX10,W32 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX10,W64 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefixes=GFX10-ERR,W32-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefixes=GFX10-ERR,W64-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX10,W32 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX10,W64 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefixes=GFX10-ERR,W32-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefixes=GFX10-ERR,W64-ERR --implicit-check-not=error: %s
//===----------------------------------------------------------------------===//
// ENC_VOP3.
diff --git a/llvm/test/MC/AMDGPU/gfx10_asm_vopc.s b/llvm/test/MC/AMDGPU/gfx10_asm_vopc.s
index f850741e379f9d9..521394829069320 100644
--- a/llvm/test/MC/AMDGPU/gfx10_asm_vopc.s
+++ b/llvm/test/MC/AMDGPU/gfx10_asm_vopc.s
@@ -1,7 +1,7 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=W32 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=W64 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=W32 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=W64 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
//===----------------------------------------------------------------------===//
// ENC_VOPC - v_cmp_* opcodes.
diff --git a/llvm/test/MC/AMDGPU/gfx10_asm_vopc_e64.s b/llvm/test/MC/AMDGPU/gfx10_asm_vopc_e64.s
index 3a036f32bf5e1f5..fc8fe95a9cf2d1c 100644
--- a/llvm/test/MC/AMDGPU/gfx10_asm_vopc_e64.s
+++ b/llvm/test/MC/AMDGPU/gfx10_asm_vopc_e64.s
@@ -1,7 +1,7 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=W32 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=W64 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=W32 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=W64 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
//===----------------------------------------------------------------------===//
// ENC_VOPC, VOP3 variant.
diff --git a/llvm/test/MC/AMDGPU/gfx10_asm_vopc_sdwa.s b/llvm/test/MC/AMDGPU/gfx10_asm_vopc_sdwa.s
index 3cb859da3946590..8808ab9ff2f9c88 100644
--- a/llvm/test/MC/AMDGPU/gfx10_asm_vopc_sdwa.s
+++ b/llvm/test/MC/AMDGPU/gfx10_asm_vopc_sdwa.s
@@ -1,7 +1,7 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=W32 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=W64 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=W32 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=W64 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
//===----------------------------------------------------------------------===//
// ENC_VOPC, SDWA variant.
diff --git a/llvm/test/MC/AMDGPU/gfx10_asm_vopcx.s b/llvm/test/MC/AMDGPU/gfx10_asm_vopcx.s
index 618fb30b8c09ff3..f441feb88db4364 100644
--- a/llvm/test/MC/AMDGPU/gfx10_asm_vopcx.s
+++ b/llvm/test/MC/AMDGPU/gfx10_asm_vopcx.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
//===----------------------------------------------------------------------===//
// ENC_VOPC - v_cmpx_* opcodes.
diff --git a/llvm/test/MC/AMDGPU/gfx10_err_pos.s b/llvm/test/MC/AMDGPU/gfx10_err_pos.s
index 5b907e9f0509151..1d34f00ee0f9213 100644
--- a/llvm/test/MC/AMDGPU/gfx10_err_pos.s
+++ b/llvm/test/MC/AMDGPU/gfx10_err_pos.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+WavefrontSize32,-WavefrontSize64 %s 2>&1 | FileCheck %s --implicit-check-not=error: --strict-whitespace
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+WavefrontSize32,-WavefrontSize64 %s 2>&1 | FileCheck %s --implicit-check-not=error: --strict-whitespace
//==============================================================================
// operands are not valid for this GPU or mode
diff --git a/llvm/test/MC/AMDGPU/gfx10_unsupported.s b/llvm/test/MC/AMDGPU/gfx10_unsupported.s
index b36722e0f8e43c8..341ae5726c0efa2 100644
--- a/llvm/test/MC/AMDGPU/gfx10_unsupported.s
+++ b/llvm/test/MC/AMDGPU/gfx10_unsupported.s
@@ -1,6 +1,6 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefixes=CHECK,GFX1010 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefixes=CHECK,GFX1010 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1013 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefixes=CHECK,GFX1010 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefixes=CHECK,GFX1010 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1013 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
buffer_atomic_add_f32 v0, v2, s[4:7], 0 idxen glc
// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
diff --git a/llvm/test/MC/AMDGPU/gfx10_unsupported_dpp.s b/llvm/test/MC/AMDGPU/gfx10_unsupported_dpp.s
index 852dd2cd9c1bb24..35c70fedb4661f3 100644
--- a/llvm/test/MC/AMDGPU/gfx10_unsupported_dpp.s
+++ b/llvm/test/MC/AMDGPU/gfx10_unsupported_dpp.s
@@ -1,6 +1,6 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1013 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1013 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
v_add_co_u32_dpp v255, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported
diff --git a/llvm/test/MC/AMDGPU/gfx10_unsupported_e32.s b/llvm/test/MC/AMDGPU/gfx10_unsupported_e32.s
index a371fdbd8d53e18..cdcc6644824322b 100644
--- a/llvm/test/MC/AMDGPU/gfx10_unsupported_e32.s
+++ b/llvm/test/MC/AMDGPU/gfx10_unsupported_e32.s
@@ -1,6 +1,6 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1013 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1013 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
v_add_co_u32_e32 v2, vcc, s0, v2
// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: e32 variant of this instruction is not supported
diff --git a/llvm/test/MC/AMDGPU/gfx10_unsupported_e64.s b/llvm/test/MC/AMDGPU/gfx10_unsupported_e64.s
index b07c603bcf4cb32..994a4c1b5f04ea0 100644
--- a/llvm/test/MC/AMDGPU/gfx10_unsupported_e64.s
+++ b/llvm/test/MC/AMDGPU/gfx10_unsupported_e64.s
@@ -1,6 +1,6 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1013 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1013 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
v_swap_b32_e64 v1, v2
// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: e64 variant of this instruction is not supported
diff --git a/llvm/test/MC/AMDGPU/gfx10_unsupported_e64_dpp.s b/llvm/test/MC/AMDGPU/gfx10_unsupported_e64_dpp.s
index 941c812b5ea43cb..bfc8b9a64845c2d 100644
--- a/llvm/test/MC/AMDGPU/gfx10_unsupported_e64_dpp.s
+++ b/llvm/test/MC/AMDGPU/gfx10_unsupported_e64_dpp.s
@@ -1,6 +1,6 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1013 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1013 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
v_add3_u32_e64_dpp v5, v1, s1, v0 dpp8:[7,6,5,4,3,2,1,0]
// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: e64_dpp variant of this instruction is not supported
diff --git a/llvm/test/MC/AMDGPU/gfx10_unsupported_sdwa.s b/llvm/test/MC/AMDGPU/gfx10_unsupported_sdwa.s
index 098597c2f9d29a9..b28c652335218ea 100644
--- a/llvm/test/MC/AMDGPU/gfx10_unsupported_sdwa.s
+++ b/llvm/test/MC/AMDGPU/gfx10_unsupported_sdwa.s
@@ -1,6 +1,6 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1013 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1013 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
v_add_co_u32_sdwa v0, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported
diff --git a/llvm/test/MC/AMDGPU/gfx11-promotions.s b/llvm/test/MC/AMDGPU/gfx11-promotions.s
index 042e1c4a405a333..6be33afb5671b97 100644
--- a/llvm/test/MC/AMDGPU/gfx11-promotions.s
+++ b/llvm/test/MC/AMDGPU/gfx11-promotions.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -show-encoding -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s | FileCheck --check-prefix=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -show-encoding -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s | FileCheck --check-prefix=GFX11 %s
// Check opcode promotions and forced suffices.
// 1. When a suffix is optional, check that it may be omitted.
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_ds.s b/llvm/test/MC/AMDGPU/gfx11_asm_ds.s
index 4e95aba5d65154c..34442add86f211c 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_ds.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_ds.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
ds_nop
// GFX11: [0x00,0x00,0x50,0xd8,0x00,0x00,0x00,0x00]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_err.s b/llvm/test/MC/AMDGPU/gfx11_asm_err.s
index f668b2458aef5ac..e475a1d5190777e 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_err.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_err.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 %s 2>&1 | FileCheck --check-prefix=GFX11 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 %s 2>&1 | FileCheck --check-prefix=GFX11 --implicit-check-not=error: %s
s_delay_alu
// GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: too few operands for instruction
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_exp.s b/llvm/test/MC/AMDGPU/gfx11_asm_exp.s
index 6613f4836a800af..ede3710bcbb3826 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_exp.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_exp.s
@@ -1,6 +1,6 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck -check-prefix=PREGFX11 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck -check-prefix=PREGFX11 --implicit-check-not=error: %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck -check-prefix=GFX11 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck -check-prefix=PREGFX11 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck -check-prefix=PREGFX11 --implicit-check-not=error: %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck -check-prefix=GFX11 --implicit-check-not=error: %s
exp dual_src_blend0 v4, v3, v2, v1
// PREGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: exp target is not supported on this GPU
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_flat.s b/llvm/test/MC/AMDGPU/gfx11_asm_flat.s
index b0c212d4dadac37..300988646d8bab4 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_flat.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_flat.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
//===----------------------------------------------------------------------===//
// FLAT.
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_flat_errs.s b/llvm/test/MC/AMDGPU/gfx11_asm_flat_errs.s
index f085f2dd2d828f9..83e4d8f0b9fca7b 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_flat_errs.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_flat_errs.s
@@ -1,8 +1,8 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga 2>&1 %s | FileCheck -check-prefix=VI-GFX9_10-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 2>&1 %s | FileCheck -check-prefix=VI-GFX9_10-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 2>&1 %s | FileCheck --check-prefix=VI-GFX9_10-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1030 2>&1 %s | FileCheck --check-prefix=VI-GFX9_10-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 2>&1 %s | FileCheck --check-prefix=GFX11-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga 2>&1 %s | FileCheck -check-prefix=VI-GFX9_10-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 2>&1 %s | FileCheck -check-prefix=VI-GFX9_10-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 2>&1 %s | FileCheck --check-prefix=VI-GFX9_10-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1030 2>&1 %s | FileCheck --check-prefix=VI-GFX9_10-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 2>&1 %s | FileCheck --check-prefix=GFX11-ERR --implicit-check-not=error: %s
// FLAT
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_ldsdir.s b/llvm/test/MC/AMDGPU/gfx11_asm_ldsdir.s
index d01557865ad4db5..8a8daab9a3a7e03 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_ldsdir.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_ldsdir.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck -check-prefix=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck -check-prefix=GFX11 %s
lds_direct_load v1 wait_vdst:15
// GFX11: lds_direct_load v1 wait_vdst:15 ; encoding: [0x01,0x00,0x1f,0xce]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_ldsdir_err.s b/llvm/test/MC/AMDGPU/gfx11_asm_ldsdir_err.s
index b4318a05767bb17..75795d90c3234ed 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_ldsdir_err.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_ldsdir_err.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -show-encoding %s 2>&1 | FileCheck -check-prefix=GFX11 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -show-encoding %s 2>&1 | FileCheck -check-prefix=GFX11 %s
lds_param_load v17, attr33.x
// GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: out of bounds interpolation attribute number
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_mimg.s b/llvm/test/MC/AMDGPU/gfx11_asm_mimg.s
index 1f1cdd70e2dfce9..6d467dfa1d8e187 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_mimg.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_mimg.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck %s --check-prefix=GFX11
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck %s --check-prefix=GFX11
image_atomic_add v[1:2], v2, s[12:19] dmask:0x3 dim:SQ_RSRC_IMG_1D unorm
// GFX11: [0x80,0x03,0x30,0xf0,0x02,0x01,0x03,0x00]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_mimg_err.s b/llvm/test/MC/AMDGPU/gfx11_asm_mimg_err.s
index cc24d39bb45dbde..9dc88690d95628a 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_mimg_err.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_mimg_err.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 %s 2>&1 | FileCheck --check-prefixes=NOGFX11 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 %s 2>&1 | FileCheck --check-prefixes=NOGFX11 --implicit-check-not=error: %s
image_sample_d v[64:66], [v32, v16, v8, v4, v2, v1], s[4:11], s[100:103] dmask:0x7 dim:SQ_RSRC_IMG_2D
// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand.
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_mimg_features.s b/llvm/test/MC/AMDGPU/gfx11_asm_mimg_features.s
index 6736009685cb384..1c8c7cf6823f229 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_mimg_features.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_mimg_features.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
image_load v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm
// GFX11: image_load v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm ; encoding: [0x80,0x0f,0x00,0xf0,0x00,0x00,0x00,0x00]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_mtbuf.s b/llvm/test/MC/AMDGPU/gfx11_asm_mtbuf.s
index f34b8d684ff6534..eea5f3a7c65cc8b 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_mtbuf.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_mtbuf.s
@@ -1,5 +1,5 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -show-encoding %s 2>&1 | FileCheck --check-prefixes=GFX11-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -show-encoding %s 2>&1 | FileCheck --check-prefixes=GFX11-ERR --implicit-check-not=error: %s
tbuffer_load_d16_format_x v4, off, s[8:11], s3, format:[BUF_FMT_8_UNORM] offset:4095
// GFX11: encoding: [0xff,0x0f,0x0c,0xe8,0x00,0x04,0x02,0x03]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_mtbuf_alias.s b/llvm/test/MC/AMDGPU/gfx11_asm_mtbuf_alias.s
index 226fccc9bf89740..187d18e9045a8bb 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_mtbuf_alias.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_mtbuf_alias.s
@@ -1,5 +1,5 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -show-encoding %s 2>&1 | FileCheck --check-prefixes=GFX11-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -show-encoding %s 2>&1 | FileCheck --check-prefixes=GFX11-ERR --implicit-check-not=error: %s
tbuffer_load_format_d16_x v4, off, s[8:11], s3, format:[BUF_FMT_8_UNORM] offset:4095
// GFX11: encoding: [0xff,0x0f,0x0c,0xe8,0x00,0x04,0x02,0x03]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_mubuf.s b/llvm/test/MC/AMDGPU/gfx11_asm_mubuf.s
index db8d72f3124bae6..a5efde4219c4a02 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_mubuf.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_mubuf.s
@@ -1,5 +1,5 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -show-encoding %s 2>&1 | FileCheck --check-prefixes=GFX11-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -show-encoding %s 2>&1 | FileCheck --check-prefixes=GFX11-ERR --implicit-check-not=error: %s
buffer_gl0_inv
// GFX11: encoding: [0x00,0x00,0xac,0xe0,0x00,0x00,0x00,0x00]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_mubuf_alias.s b/llvm/test/MC/AMDGPU/gfx11_asm_mubuf_alias.s
index 02bcf6791a881d0..5456d68f4c06842 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_mubuf_alias.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_mubuf_alias.s
@@ -1,5 +1,5 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -show-encoding %s 2>&1 | FileCheck --check-prefixes=GFX11-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -show-encoding %s 2>&1 | FileCheck --check-prefixes=GFX11-ERR --implicit-check-not=error: %s
buffer_load_dword v5, off, s[8:11], s3 offset:4095
// GFX11: encoding: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x02,0x03]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_operands.s b/llvm/test/MC/AMDGPU/gfx11_asm_operands.s
index abf70235d4f499a..d3efcf1987318c0 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_operands.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_operands.s
@@ -1,6 +1,6 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1030 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -show-encoding %s 2>&1 | FileCheck --check-prefixes=GFX11-ERR %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1030 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -show-encoding %s 2>&1 | FileCheck --check-prefixes=GFX11-ERR %s
// On GFX11+, EXECZ and VCCZ are no longer allowed to be used as sources to SALU and VALU instructions.
// The inline constants are removed. VCCZ and EXECZ still exist and can be use for conditional branches.
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_smem.s b/llvm/test/MC/AMDGPU/gfx11_asm_smem.s
index 71538d6ad7e4008..1d6b94760907589 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_smem.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_smem.s
@@ -1,5 +1,5 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 %s 2>&1 | FileCheck --check-prefixes=GFX11-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 %s 2>&1 | FileCheck --check-prefixes=GFX11-ERR --implicit-check-not=error: %s
//===----------------------------------------------------------------------===//
// ENC_SMEM.
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_smem_alias.s b/llvm/test/MC/AMDGPU/gfx11_asm_smem_alias.s
index 9f177e24dadcf29..9331931940906ad 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_smem_alias.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_smem_alias.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
//===----------------------------------------------------------------------===//
// ENC_SMEM.
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_sop1.s b/llvm/test/MC/AMDGPU/gfx11_asm_sop1.s
index ec28c1547d4e40c..8a7f64331317edc 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_sop1.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_sop1.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -show-encoding -mcpu=gfx1100 %s | FileCheck --check-prefix=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -show-encoding -mcpu=gfx1100 %s | FileCheck --check-prefix=GFX11 %s
s_mov_b32 s0, s1
// GFX11: encoding: [0x01,0x00,0x80,0xbe]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_sop2.s b/llvm/test/MC/AMDGPU/gfx11_asm_sop2.s
index f80e557449c9c38..cd9b686d3f6c5b8 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_sop2.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_sop2.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -show-encoding -mcpu=gfx1100 %s | FileCheck --check-prefix=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -show-encoding -mcpu=gfx1100 %s | FileCheck --check-prefix=GFX11 %s
s_add_u32 s0, s1, s2
// GFX11: encoding: [0x01,0x02,0x00,0x80]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_sopc.s b/llvm/test/MC/AMDGPU/gfx11_asm_sopc.s
index 7fb3f2cc120b9f2..ae83782a24c5ce8 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_sopc.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_sopc.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -show-encoding -mcpu=gfx1100 %s | FileCheck --check-prefix=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -show-encoding -mcpu=gfx1100 %s | FileCheck --check-prefix=GFX11 %s
s_cmp_eq_i32 s0, s1
// GFX11: encoding: [0x00,0x01,0x00,0xbf]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_sopk.s b/llvm/test/MC/AMDGPU/gfx11_asm_sopk.s
index e8e4c201cf80320..5b19f8bca3becfd 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_sopk.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_sopk.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -show-encoding -mcpu=gfx1100 %s | FileCheck --check-prefix=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -show-encoding -mcpu=gfx1100 %s | FileCheck --check-prefix=GFX11 %s
s_movk_i32 s0, 0x1234
// GFX11: encoding: [0x34,0x12,0x00,0xb0]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_sopk_err.s b/llvm/test/MC/AMDGPU/gfx11_asm_sopk_err.s
index ad766ea75a0e9bc..e7a8db1fa7e325c 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_sopk_err.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_sopk_err.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 %s 2>&1 | FileCheck %s -check-prefix=GFX11 --implicit-check-not=error: --strict-whitespace
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 %s 2>&1 | FileCheck %s -check-prefix=GFX11 --implicit-check-not=error: --strict-whitespace
s_waitcnt_vscnt s0, 0x1234
// GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: src0 must be null
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_sopp.s b/llvm/test/MC/AMDGPU/gfx11_asm_sopp.s
index aac0c74887a4c88..8d7fed65a776366 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_sopp.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_sopp.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
//===----------------------------------------------------------------------===//
// s_waitcnt
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vinterp.s b/llvm/test/MC/AMDGPU/gfx11_asm_vinterp.s
index fa64243c156d43c..0a3396b454b9c0a 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vinterp.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vinterp.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck -check-prefix=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck -check-prefix=GFX11 %s
v_interp_p10_f32 v0, v1, v2, v3
// GFX11: v_interp_p10_f32 v0, v1, v2, v3 ; encoding: [0x00,0x00,0x00,0xcd,0x01,0x05,0x0e,0x04]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vinterp_err.s b/llvm/test/MC/AMDGPU/gfx11_asm_vinterp_err.s
index e13ff635a32ee6a..1d6769dbd4d6a08 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vinterp_err.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vinterp_err.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 %s 2>&1 | FileCheck %s -check-prefix=GFX11-ERR --implicit-check-not=error: --strict-whitespace
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 %s 2>&1 | FileCheck %s -check-prefix=GFX11-ERR --implicit-check-not=error: --strict-whitespace
//===----------------------------------------------------------------------===//
// VINTERP src operands must be VGPRs.
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop1.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop1.s
index 5c01a2a253eab9e..0aeb9b35ff378cb 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop1.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop1.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
v_bfrev_b32_e32 v5, v1
// GFX11: encoding: [0x01,0x71,0x0a,0x7e]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16.s
index 99b44c15ed42724..8c6873e2cbe3228 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
v_bfrev_b32_dpp v5, v1 quad_perm:[3,2,1,0]
// GFX11: encoding: [0xfa,0x70,0x0a,0x7e,0x01,0x1b,0x00,0xff]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8.s
index 2b14ca5dd52bed9..a765d333db2b74d 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
v_bfrev_b32_dpp v5, v1 dpp8:[7,6,5,4,3,2,1,0]
// GFX11: encoding: [0xe9,0x70,0x0a,0x7e,0x01,0x77,0x39,0x05]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err.s
index 2ebb06fb7f9071b..1f350ae6863849e 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err.s
@@ -1,5 +1,5 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX11 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX11 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX11 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX11 --implicit-check-not=error: %s
v_ceil_f16_e32 v128, 0xfe0b
// GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_promote.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_promote.s
index ed8b1d5b7237b39..601551efe00c2b9 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_promote.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_promote.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX11 --implicit-check-not=_e32 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX11 --implicit-check-not=_e32 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX11 --implicit-check-not=_e32 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX11 --implicit-check-not=_e32 %s
v_ceil_f16 v128, 0xfe0b
// GFX11: v_ceil_f16_e64
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop2.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop2.s
index 1f9cb7f06720ef2..2f71eaebb1e4f0b 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop2.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop2.s
@@ -1,7 +1,7 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W32 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W64 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W32 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W64 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
v_add_co_ci_u32_e32 v5, vcc_lo, v1, v2, vcc_lo
// W32: encoding: [0x01,0x05,0x0a,0x40]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp16.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp16.s
index 30a9ad0b66e9d23..af090a270fbeb83 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp16.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp16.s
@@ -1,7 +1,7 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W32 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W64 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W32 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W64 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
v_add_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo quad_perm:[3,2,1,0]
// W32: encoding: [0xfa,0x04,0x0a,0x40,0x01,0x1b,0x00,0xff]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp8.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp8.s
index 62b23e9568aa1c0..29dd341873f5528 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp8.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp8.s
@@ -1,7 +1,7 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W32 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W64 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W32 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W64 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
v_add_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo dpp8:[7,6,5,4,3,2,1,0]
// W32: encoding: [0xe9,0x04,0x0a,0x40,0x01,0x77,0x39,0x05]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop2_err.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop2_err.s
index fc08dff0c2f7693..164a49dcdd47b61 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop2_err.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop2_err.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 %s 2>&1 | FileCheck --check-prefix=GFX11 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 %s 2>&1 | FileCheck --check-prefix=GFX11 --implicit-check-not=error: %s
v_fmaak_f32 v0, 0xff32, v0, 0
// GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: only one unique literal operand is allowed
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop2_t16_err.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop2_t16_err.s
index d4bf86f64e60ffc..12697dfe259fde9 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop2_t16_err.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop2_t16_err.s
@@ -1,5 +1,5 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX11 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX11 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX11 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX11 --implicit-check-not=error: %s
v_add_f16_e32 v255, v1, v2
// GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop2_t16_promote.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop2_t16_promote.s
index 876b7b88f50b1db..9c67b6499dd58bb 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop2_t16_promote.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop2_t16_promote.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX11 --implicit-check-not=_e32 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX11 --implicit-check-not=_e32 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX11 --implicit-check-not=_e32 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX11 --implicit-check-not=_e32 %s
v_add_f16 v255, v1, v2
// GFX11: v_add_f16_e64
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop3.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop3.s
index a0beee1c7eb66db..9a94162005e1f78 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop3.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop3.s
@@ -1,7 +1,7 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W32 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W64 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W32 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W64 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
v_add3_u32 v5, v1, v2, s3
// GFX11: encoding: [0x05,0x00,0x55,0xd6,0x01,0x05,0x0e,0x00]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_alias.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_alias.s
index 2dcc977f98323a4..857f2fdfc41bf8a 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_alias.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_alias.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck -check-prefix=GFX11 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck -check-prefix=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck -check-prefix=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck -check-prefix=GFX11 %s
v_cvt_pknorm_i16_f16 v5, v1, v2
// GFX11: v_cvt_pk_norm_i16_f16 {{.*}} encoding: [0x05,0x00,0x12,0xd7,0x01,0x05,0x02,0x00]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
index d4853b0d7b65a0a..147d6c5d0789c90 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
@@ -1,7 +1,7 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W32 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W64 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefixes=GFX11-ERR,W32-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefixes=GFX11-ERR,W64-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W32 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W64 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefixes=GFX11-ERR,W32-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefixes=GFX11-ERR,W64-ERR --implicit-check-not=error: %s
v_add3_u32_e64_dpp v5, v1, v2, v3 quad_perm:[3,2,1,0]
// GFX11: [0x05,0x00,0x55,0xd6,0xfa,0x04,0x0e,0x04,0x01,0x1b,0x00,0xff]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop1.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop1.s
index bb52e60cd91e05a..9a65c6687f3f84d 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop1.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop1.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
v_bfrev_b32_e64_dpp v5, v1 quad_perm:[3,2,1,0]
// GFX11: [0x05,0x00,0xb8,0xd5,0xfa,0x00,0x00,0x00,0x01,0x1b,0x00,0xff]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop2.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop2.s
index a499a9244d54279..3592679831d43b8 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop2.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop2.s
@@ -1,7 +1,7 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W32 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W64 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefixes=W32-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefixes=W64-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W32 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W64 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefixes=W32-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefixes=W64-ERR --implicit-check-not=error: %s
v_add_co_ci_u32_e64_dpp v5, s6, v1, v2, s3 quad_perm:[3,2,1,0]
// W32: [0x05,0x06,0x20,0xd5,0xfa,0x04,0x0e,0x00,0x01,0x1b,0x00,0xff]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopc.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopc.s
index a78fa10226c68af..9a9a903085dd782 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopc.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopc.s
@@ -1,7 +1,7 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W32 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W64 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W32 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W64 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
v_cmp_class_f16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
// W32: [0x05,0x00,0x7d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopcx.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopcx.s
index 7adb698c0327332..81ec15bb48f863c 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopcx.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopcx.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
v_cmpx_class_f16_e64_dpp v1, v2 quad_perm:[3,2,1,0]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8.s
index 1fba5911276ef00..4c00148f7a89598 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8.s
@@ -1,7 +1,7 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W32 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W64 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefixes=GFX11-ERR,W32-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefixes=GFX11-ERR,W64-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W32 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W64 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefixes=GFX11-ERR,W32-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefixes=GFX11-ERR,W64-ERR --implicit-check-not=error: %s
v_add3_u32_e64_dpp v5, v1, v2, v3 dpp8:[7,6,5,4,3,2,1,0]
// GFX11: [0x05,0x00,0x55,0xd6,0xe9,0x04,0x0e,0x04,0x01,0x77,0x39,0x05]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop1.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop1.s
index f8478673e4fc21c..3897b82785f65b5 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop1.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop1.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
v_bfrev_b32_e64_dpp v5, v1 dpp8:[7,6,5,4,3,2,1,0]
// GFX11: [0x05,0x00,0xb8,0xd5,0xe9,0x00,0x00,0x00,0x01,0x77,0x39,0x05]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop2.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop2.s
index 6e1a65d7d3210f3..2ae47cf36b62df3 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop2.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop2.s
@@ -1,7 +1,7 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W32 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W64 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefixes=W32-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefixes=W64-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W32 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W64 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefixes=W32-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefixes=W64-ERR --implicit-check-not=error: %s
v_add_co_ci_u32_e64_dpp v5, s6, v1, v2, s3 dpp8:[7,6,5,4,3,2,1,0]
// W32: [0x05,0x06,0x20,0xd5,0xe9,0x04,0x0e,0x00,0x01,0x77,0x39,0x05]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopc.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopc.s
index 9df1b050b579b61..83ae41d81df6917 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopc.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopc.s
@@ -1,7 +1,7 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W32 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W64 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W32 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W64 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
v_cmp_class_f16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
// W32: [0x05,0x00,0x7d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopcx.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopcx.s
index dfd8d8809d4dd1f..8c26c769a1962e6 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopcx.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopcx.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
v_cmpx_class_f16_e64_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]
// GFX11: [0x7e,0x00,0xfd,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_err.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_err.s
index f1189d058085951..9fc17a6a27147ba 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_err.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_err.s
@@ -1,5 +1,5 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX11 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX11 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX11 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX11 --implicit-check-not=error: %s
v_permlane16_b32 v5, v1, s2, s3 op_sel:[0, 0, 0, 1]
// GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid op_sel operand
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop1.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop1.s
index a67cb0bf4cf851e..fb4e9108fe1d1a0 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop1.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop1.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
v_bfrev_b32_e64 v5, v1
// GFX11: encoding: [0x05,0x00,0xb8,0xd5,0x01,0x01,0x00,0x00]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop2.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop2.s
index 43c71617bb3851f..242c8a79fdd6f5a 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop2.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop2.s
@@ -1,7 +1,7 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W32 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W64 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W32 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W64 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
v_add_co_ci_u32_e64 v5, s6, v1, 0xaf123456, s3
// W32: encoding: [0x05,0x06,0x20,0xd5,0x01,0xff,0x0d,0x00,0x56,0x34,0x12,0xaf]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopc.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopc.s
index d333240d8a47106..3a6a61891d29326 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopc.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopc.s
@@ -1,7 +1,7 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W32 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W64 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W32 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11,W64 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
v_cmp_class_f16_e64 s5, v1, v2
// W32: encoding: [0x05,0x00,0x7d,0xd4,0x01,0x05,0x02,0x00]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopcx.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopcx.s
index bb3434a1bb15d9a..f50a47777f641d3 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopcx.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopcx.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
v_cmpx_class_f16_e64 v1, v2
// GFX11: encoding: [0x7e,0x00,0xfd,0xd4,0x01,0x05,0x02,0x00]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop3p.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop3p.s
index 4426ec4bbbeb5a0..45a320a3e358e63 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop3p.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop3p.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -show-encoding -mcpu=gfx1100 %s | FileCheck --check-prefix=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -show-encoding -mcpu=gfx1100 %s | FileCheck --check-prefix=GFX11 %s
v_dot2_f32_bf16 v5, v1, v2, v3
// GFX11: [0x05,0x40,0x1a,0xcc,0x01,0x05,0x0e,0x1c]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop3p_dpp16.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop3p_dpp16.s
index ac403909b502ee7..2cfb8abd4e97909 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop3p_dpp16.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop3p_dpp16.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
v_dot2_f32_f16 v0, v1, v2, v3 neg_lo:[0,0,0] neg_hi:[0,0,0] quad_perm:[2,2,3,1] bound_ctrl:0 fi:1
// GFX11: v_dot2_f32_f16_e64_dpp v0, v1, v2, v3 quad_perm:[2,2,3,1] row_mask:0xf bank_mask:0xf fi:1 ; encoding: [0x00,0x00,0x13,0xcc,0xfa,0x04,0x0e,0x04,0x01,0x7a,0x04,0xff]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop3p_dpp8.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop3p_dpp8.s
index aa23d7a7d4b4cc5..2656ba0cf1807ec 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop3p_dpp8.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop3p_dpp8.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
v_fma_mix_f32 v0, v1, v2, v3 dpp8:[2,2,2,2,4,4,4,4]
// GFX11: encoding: [0x00,0x00,0x20,0xcc,0xe9,0x04,0x0e,0x04,0x01,0x92,0x44,0x92]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop3p_features.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop3p_features.s
index 3c89a6468b3b2df..ecfb0d9aac68bb2 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop3p_features.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop3p_features.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -show-encoding -mcpu=gfx1100 %s | FileCheck --check-prefix=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -show-encoding -mcpu=gfx1100 %s | FileCheck --check-prefix=GFX11 %s
//
// Test op_sel/op_sel_hi
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vopc.s b/llvm/test/MC/AMDGPU/gfx11_asm_vopc.s
index 81c58e206f92da1..c9272f24e25a8c9 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vopc.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vopc.s
@@ -1,7 +1,7 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=W32 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=W64 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=W32 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=W64 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
v_cmp_class_f16_e32 vcc_lo, v1, v2
// W32: encoding: [0x01,0x05,0xfa,0x7c]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp16.s b/llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp16.s
index 0d14b664aba8fe4..802562f38f44fdd 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp16.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp16.s
@@ -1,7 +1,7 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=W32 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=W64 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=W32 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=W64 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
v_cmp_class_f16_dpp vcc_lo, v1, v2 quad_perm:[3,2,1,0]
// W32: encoding: [0xfa,0x04,0xfa,0x7c,0x01,0x1b,0x00,0xff]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp8.s b/llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp8.s
index 10f09b1225518ce..e6ff8faa3aebc24 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp8.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp8.s
@@ -1,7 +1,7 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=W32 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=W64 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=W32 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=W64 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
v_cmp_class_f16_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
// W32: encoding: [0xe9,0x04,0xfa,0x7c,0x01,0x77,0x39,0x05]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_err.s b/llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_err.s
index d3de2cbf12b83b5..889293b1a0f2343 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_err.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_err.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize64 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX11 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize64 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX11 --implicit-check-not=error: %s
v_cmp_class_f16_e32 vcc, v1, v255
// GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_promote.s b/llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_promote.s
index 1e6754b1927b39b..b16caed8b275f75 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_promote.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_promote.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize64 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize64 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX11 %s
v_cmp_class_f16 vcc, v1, v255
// GFX11: v_cmp_class_f16_e64
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vopcx.s b/llvm/test/MC/AMDGPU/gfx11_asm_vopcx.s
index 5e2f3bec9a24f80..2512f1a4b94b5e2 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vopcx.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vopcx.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
v_cmpx_class_f16_e32 v1, v2
// GFX11: encoding: [0x01,0x05,0xfa,0x7d]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp16.s b/llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp16.s
index 6b047a27db2daaa..b9903f51b332dcf 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp16.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp16.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
v_cmpx_class_f16_dpp v1, v2 quad_perm:[3,2,1,0]
// GFX11: encoding: [0xfa,0x04,0xfa,0x7d,0x01,0x1b,0x00,0xff]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp8.s b/llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp8.s
index 8aaa5f344713022..5f5d3c03038307d 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp8.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp8.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
v_cmpx_class_f16_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]
// GFX11: encoding: [0xe9,0x04,0xfa,0x7d,0x01,0x77,0x39,0x05]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_err.s b/llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_err.s
index 0cea363b42d974e..c37d15b7abc79bd 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_err.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_err.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize64 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX11 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize64 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX11 --implicit-check-not=error: %s
v_cmpx_class_f16_e32 v1, v255
// GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_promote.s b/llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_promote.s
index 074fd10952776c5..a279bd381848e82 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_promote.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_promote.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize64 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize64 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX11 %s
v_cmpx_class_f16 v1, v255
// GFX11: v_cmpx_class_f16_e64
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vopd.s b/llvm/test/MC/AMDGPU/gfx11_asm_vopd.s
index 3bae40ae0b40de9..0556861276b071f 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vopd.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vopd.s
@@ -1,6 +1,6 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s 2>&1 | FileCheck --check-prefixes=W64-ERR --implicit-check-not=error: %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s 2>&1 | FileCheck --check-prefixes=W64-ERR --implicit-check-not=error: %s
v_dual_add_f32 v255, v4, v2 :: v_dual_add_f32 v6, v1, v3
// GFX11: encoding: [0x04,0x05,0x08,0xc9,0x01,0x07,0x06,0xff]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vopd_err.s b/llvm/test/MC/AMDGPU/gfx11_asm_vopd_err.s
index 4fc954cb32e4ef4..3c5905b14e06cf1 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vopd_err.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vopd_err.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 %s 2>&1 | FileCheck %s -check-prefix=GFX11 --implicit-check-not=error: --strict-whitespace
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 %s 2>&1 | FileCheck %s -check-prefix=GFX11 --implicit-check-not=error: --strict-whitespace
//===----------------------------------------------------------------------===//
// A VOPD instruction can use only one literal.
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vopd_features.s b/llvm/test/MC/AMDGPU/gfx11_asm_vopd_features.s
index fd8569bc0a9b36e..c442800eb06dbf2 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vopd_features.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vopd_features.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck -check-prefix=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck -check-prefix=GFX11 %s
//===----------------------------------------------------------------------===//
// A VOPD instruction can use one or more literals,
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_wmma.s b/llvm/test/MC/AMDGPU/gfx11_asm_wmma.s
index e5b8ec97c3d8bca..74cdd02a8351191 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_wmma.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_wmma.s
@@ -1,7 +1,7 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=W32 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=W64 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=W32 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=W64 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
//
// Test v_wmma_f32_16x16x16_f16
diff --git a/llvm/test/MC/AMDGPU/gfx11_unsupported.s b/llvm/test/MC/AMDGPU/gfx11_unsupported.s
index 67fba5699dd6be5..4c2d4d3890cbb6a 100644
--- a/llvm/test/MC/AMDGPU/gfx11_unsupported.s
+++ b/llvm/test/MC/AMDGPU/gfx11_unsupported.s
@@ -1,5 +1,5 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
buffer_atomic_add_f64 v[2:3], off, s[12:15], s4 offset:4095
// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
diff --git a/llvm/test/MC/AMDGPU/gfx11_unsupported_dpp.s b/llvm/test/MC/AMDGPU/gfx11_unsupported_dpp.s
index fb895869e07d6ea..e9e0c5210238e22 100644
--- a/llvm/test/MC/AMDGPU/gfx11_unsupported_dpp.s
+++ b/llvm/test/MC/AMDGPU/gfx11_unsupported_dpp.s
@@ -1,5 +1,5 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
v_add_co_u32_dpp v255, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported
diff --git a/llvm/test/MC/AMDGPU/gfx11_unsupported_e32.s b/llvm/test/MC/AMDGPU/gfx11_unsupported_e32.s
index 5915b4848093bcb..21a3fbedb694daa 100644
--- a/llvm/test/MC/AMDGPU/gfx11_unsupported_e32.s
+++ b/llvm/test/MC/AMDGPU/gfx11_unsupported_e32.s
@@ -1,5 +1,5 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
v_add_co_u32_e32 v2, vcc, s0, v2
// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: e32 variant of this instruction is not supported
diff --git a/llvm/test/MC/AMDGPU/gfx11_unsupported_e64.s b/llvm/test/MC/AMDGPU/gfx11_unsupported_e64.s
index 6feccebe6360395..a4310f3b5378fe8 100644
--- a/llvm/test/MC/AMDGPU/gfx11_unsupported_e64.s
+++ b/llvm/test/MC/AMDGPU/gfx11_unsupported_e64.s
@@ -1,5 +1,5 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
v_dot2c_f32_f16_e64 v0, v1, v2
// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: e64 variant of this instruction is not supported
diff --git a/llvm/test/MC/AMDGPU/gfx11_unsupported_sdwa.s b/llvm/test/MC/AMDGPU/gfx11_unsupported_sdwa.s
index c16c3fe9be45896..9ca3861eb93600b 100644
--- a/llvm/test/MC/AMDGPU/gfx11_unsupported_sdwa.s
+++ b/llvm/test/MC/AMDGPU/gfx11_unsupported_sdwa.s
@@ -1,5 +1,5 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
v_add_co_ci_u32_sdwa v1, v1, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported
diff --git a/llvm/test/MC/AMDGPU/gfx7_asm_ds.s b/llvm/test/MC/AMDGPU/gfx7_asm_ds.s
index 6861970293c2770..eaa1b0510040ecf 100644
--- a/llvm/test/MC/AMDGPU/gfx7_asm_ds.s
+++ b/llvm/test/MC/AMDGPU/gfx7_asm_ds.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s
ds_add_u32 v1, v2 offset:65535
// CHECK: [0xff,0xff,0x00,0xd8,0x01,0x02,0x00,0x00]
diff --git a/llvm/test/MC/AMDGPU/gfx7_asm_exp.s b/llvm/test/MC/AMDGPU/gfx7_asm_exp.s
index 8c5fafa405642d2..df143726d847548 100644
--- a/llvm/test/MC/AMDGPU/gfx7_asm_exp.s
+++ b/llvm/test/MC/AMDGPU/gfx7_asm_exp.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s
exp mrt0 v0, v0, v0, v0
// CHECK: [0x0f,0x00,0x00,0xf8,0x00,0x00,0x00,0x00]
diff --git a/llvm/test/MC/AMDGPU/gfx7_asm_flat.s b/llvm/test/MC/AMDGPU/gfx7_asm_flat.s
index c240b263b967a32..46f93a6986e9969 100644
--- a/llvm/test/MC/AMDGPU/gfx7_asm_flat.s
+++ b/llvm/test/MC/AMDGPU/gfx7_asm_flat.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s
flat_load_ubyte v5, v[1:2]
// CHECK: [0x00,0x00,0x20,0xdc,0x01,0x00,0x00,0x05]
diff --git a/llvm/test/MC/AMDGPU/gfx7_asm_mimg.s b/llvm/test/MC/AMDGPU/gfx7_asm_mimg.s
index 250c00a6321b07b..9fab33c74a68df3 100644
--- a/llvm/test/MC/AMDGPU/gfx7_asm_mimg.s
+++ b/llvm/test/MC/AMDGPU/gfx7_asm_mimg.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s
image_load v5, v1, s[8:15] dmask:0x1
// CHECK: [0x00,0x01,0x00,0xf0,0x01,0x05,0x02,0x00]
diff --git a/llvm/test/MC/AMDGPU/gfx7_asm_mtbuf.s b/llvm/test/MC/AMDGPU/gfx7_asm_mtbuf.s
index 61d180b75319590..c93e4282232cb51 100644
--- a/llvm/test/MC/AMDGPU/gfx7_asm_mtbuf.s
+++ b/llvm/test/MC/AMDGPU/gfx7_asm_mtbuf.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s
tbuffer_load_format_x v5, off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x08,0xe8,0x00,0x05,0x02,0x03]
diff --git a/llvm/test/MC/AMDGPU/gfx7_asm_mubuf.s b/llvm/test/MC/AMDGPU/gfx7_asm_mubuf.s
index 18e4f8ba7fc419a..2fd450a65dce889 100644
--- a/llvm/test/MC/AMDGPU/gfx7_asm_mubuf.s
+++ b/llvm/test/MC/AMDGPU/gfx7_asm_mubuf.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s
buffer_load_format_x v5, off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0x03]
diff --git a/llvm/test/MC/AMDGPU/gfx7_asm_smrd.s b/llvm/test/MC/AMDGPU/gfx7_asm_smrd.s
index 2b44cdc851acb23..c12299e247f200d 100644
--- a/llvm/test/MC/AMDGPU/gfx7_asm_smrd.s
+++ b/llvm/test/MC/AMDGPU/gfx7_asm_smrd.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s
s_load_dword s5, s[2:3], s2
// CHECK: [0x02,0x82,0x02,0xc0]
diff --git a/llvm/test/MC/AMDGPU/gfx7_asm_sop1.s b/llvm/test/MC/AMDGPU/gfx7_asm_sop1.s
index ecff976fe54ee37..ead56ff2a9346bc 100644
--- a/llvm/test/MC/AMDGPU/gfx7_asm_sop1.s
+++ b/llvm/test/MC/AMDGPU/gfx7_asm_sop1.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s
s_mov_b32 s5, s1
// CHECK: [0x01,0x03,0x85,0xbe]
diff --git a/llvm/test/MC/AMDGPU/gfx7_asm_sop2.s b/llvm/test/MC/AMDGPU/gfx7_asm_sop2.s
index aa9caaf69f8e87b..3d828e796712574 100644
--- a/llvm/test/MC/AMDGPU/gfx7_asm_sop2.s
+++ b/llvm/test/MC/AMDGPU/gfx7_asm_sop2.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s
s_add_u32 s5, s1, s2
// CHECK: [0x01,0x02,0x05,0x80]
diff --git a/llvm/test/MC/AMDGPU/gfx7_asm_sopc.s b/llvm/test/MC/AMDGPU/gfx7_asm_sopc.s
index ec0f43b90ed07ff..ae238bd8bb312e0 100644
--- a/llvm/test/MC/AMDGPU/gfx7_asm_sopc.s
+++ b/llvm/test/MC/AMDGPU/gfx7_asm_sopc.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s
s_cmp_eq_i32 s1, s2
// CHECK: [0x01,0x02,0x00,0xbf]
diff --git a/llvm/test/MC/AMDGPU/gfx7_asm_sopk.s b/llvm/test/MC/AMDGPU/gfx7_asm_sopk.s
index c3283dec6ba6b92..caa1eddfd708e06 100644
--- a/llvm/test/MC/AMDGPU/gfx7_asm_sopk.s
+++ b/llvm/test/MC/AMDGPU/gfx7_asm_sopk.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s
s_movk_i32 s5, 0x3141
// CHECK: [0x41,0x31,0x05,0xb0]
diff --git a/llvm/test/MC/AMDGPU/gfx7_asm_sopp.s b/llvm/test/MC/AMDGPU/gfx7_asm_sopp.s
index 2cea9ec5695c2a9..01458f8ae0087f8 100644
--- a/llvm/test/MC/AMDGPU/gfx7_asm_sopp.s
+++ b/llvm/test/MC/AMDGPU/gfx7_asm_sopp.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s
s_nop 0x3141
// CHECK: [0x41,0x31,0x80,0xbf]
diff --git a/llvm/test/MC/AMDGPU/gfx7_asm_vintrp.s b/llvm/test/MC/AMDGPU/gfx7_asm_vintrp.s
index 4dfa9e05e6586d5..e3670110178b0aa 100644
--- a/llvm/test/MC/AMDGPU/gfx7_asm_vintrp.s
+++ b/llvm/test/MC/AMDGPU/gfx7_asm_vintrp.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s
v_interp_p1_f32 v5, v1, attr0.x
// CHECK: [0x01,0x00,0x14,0xc8]
diff --git a/llvm/test/MC/AMDGPU/gfx7_asm_vop1.s b/llvm/test/MC/AMDGPU/gfx7_asm_vop1.s
index d42bfb1c021ce34..b17e6aba56eb3f1 100644
--- a/llvm/test/MC/AMDGPU/gfx7_asm_vop1.s
+++ b/llvm/test/MC/AMDGPU/gfx7_asm_vop1.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s
v_nop
// CHECK: [0x00,0x00,0x00,0x7e]
diff --git a/llvm/test/MC/AMDGPU/gfx7_asm_vop2.s b/llvm/test/MC/AMDGPU/gfx7_asm_vop2.s
index fe71cba45d3ee17..3fb562fb4b2b6e1 100644
--- a/llvm/test/MC/AMDGPU/gfx7_asm_vop2.s
+++ b/llvm/test/MC/AMDGPU/gfx7_asm_vop2.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s
v_cndmask_b32 v5, v1, v2, vcc
// CHECK: [0x01,0x05,0x0a,0x00]
diff --git a/llvm/test/MC/AMDGPU/gfx7_asm_vop3.s b/llvm/test/MC/AMDGPU/gfx7_asm_vop3.s
index 804e1c2bf77bc53..48ff621ba9aa36a 100644
--- a/llvm/test/MC/AMDGPU/gfx7_asm_vop3.s
+++ b/llvm/test/MC/AMDGPU/gfx7_asm_vop3.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s
v_nop_e64
// CHECK: [0x00,0x00,0x00,0xd3,0x00,0x00,0x00,0x00]
diff --git a/llvm/test/MC/AMDGPU/gfx7_asm_vop3_e64.s b/llvm/test/MC/AMDGPU/gfx7_asm_vop3_e64.s
index 422412b4595e106..081fd7c09c5e3ac 100644
--- a/llvm/test/MC/AMDGPU/gfx7_asm_vop3_e64.s
+++ b/llvm/test/MC/AMDGPU/gfx7_asm_vop3_e64.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s
v_mad_legacy_f32 v5, v1, v2, v3
// CHECK: [0x05,0x00,0x80,0xd2,0x01,0x05,0x0e,0x04]
diff --git a/llvm/test/MC/AMDGPU/gfx7_asm_vopc.s b/llvm/test/MC/AMDGPU/gfx7_asm_vopc.s
index 1cb63dcd3f4b18c..f1a720e774ce826 100644
--- a/llvm/test/MC/AMDGPU/gfx7_asm_vopc.s
+++ b/llvm/test/MC/AMDGPU/gfx7_asm_vopc.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s
v_cmp_f_f32 vcc, v1, v2
// CHECK: [0x01,0x05,0x00,0x7c]
diff --git a/llvm/test/MC/AMDGPU/gfx7_err_pos.s b/llvm/test/MC/AMDGPU/gfx7_err_pos.s
index b9473a26e62a506..9dcbd4a4074af4f 100644
--- a/llvm/test/MC/AMDGPU/gfx7_err_pos.s
+++ b/llvm/test/MC/AMDGPU/gfx7_err_pos.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck %s --implicit-check-not=error: --strict-whitespace
+// RUN: not llvm-mc -triple=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck %s --implicit-check-not=error: --strict-whitespace
//==============================================================================
// cache policy is not supported for SMRD instructions
diff --git a/llvm/test/MC/AMDGPU/gfx7_unsupported.s b/llvm/test/MC/AMDGPU/gfx7_unsupported.s
index c6b7c9ec6b437bc..bd4bb7b23586705 100644
--- a/llvm/test/MC/AMDGPU/gfx7_unsupported.s
+++ b/llvm/test/MC/AMDGPU/gfx7_unsupported.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck --implicit-check-not=error: %s
//===----------------------------------------------------------------------===//
// Unsupported instructions.
diff --git a/llvm/test/MC/AMDGPU/gfx8_asm_ds.s b/llvm/test/MC/AMDGPU/gfx8_asm_ds.s
index da0297f7c3101c6..090d3b5ca11a47b 100644
--- a/llvm/test/MC/AMDGPU/gfx8_asm_ds.s
+++ b/llvm/test/MC/AMDGPU/gfx8_asm_ds.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
ds_add_u32 v1, v2 offset:65535
// CHECK: [0xff,0xff,0x00,0xd8,0x01,0x02,0x00,0x00]
diff --git a/llvm/test/MC/AMDGPU/gfx8_asm_exp.s b/llvm/test/MC/AMDGPU/gfx8_asm_exp.s
index 9e049d7f84d5248..a83afb9e6c0ba87 100644
--- a/llvm/test/MC/AMDGPU/gfx8_asm_exp.s
+++ b/llvm/test/MC/AMDGPU/gfx8_asm_exp.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
exp mrt0 v0, v0, v0, v0
// CHECK: [0x0f,0x00,0x00,0xc4,0x00,0x00,0x00,0x00]
diff --git a/llvm/test/MC/AMDGPU/gfx8_asm_flat.s b/llvm/test/MC/AMDGPU/gfx8_asm_flat.s
index 4a62f04f4183e59..4e622969623c83a 100644
--- a/llvm/test/MC/AMDGPU/gfx8_asm_flat.s
+++ b/llvm/test/MC/AMDGPU/gfx8_asm_flat.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
flat_load_ubyte v5, v[1:2]
// CHECK: [0x00,0x00,0x40,0xdc,0x01,0x00,0x00,0x05]
diff --git a/llvm/test/MC/AMDGPU/gfx8_asm_mimg.s b/llvm/test/MC/AMDGPU/gfx8_asm_mimg.s
index abcd4b700e583dd..d5dcf4f3a7e089e 100644
--- a/llvm/test/MC/AMDGPU/gfx8_asm_mimg.s
+++ b/llvm/test/MC/AMDGPU/gfx8_asm_mimg.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
image_load v5, v1, s[8:15] dmask:0x1
// CHECK: [0x00,0x01,0x00,0xf0,0x01,0x05,0x02,0x00]
diff --git a/llvm/test/MC/AMDGPU/gfx8_asm_mtbuf.s b/llvm/test/MC/AMDGPU/gfx8_asm_mtbuf.s
index d748885b6796784..655a3be4528a626 100644
--- a/llvm/test/MC/AMDGPU/gfx8_asm_mtbuf.s
+++ b/llvm/test/MC/AMDGPU/gfx8_asm_mtbuf.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
tbuffer_load_format_x v5, off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x08,0xe8,0x00,0x05,0x02,0x03]
diff --git a/llvm/test/MC/AMDGPU/gfx8_asm_mubuf.s b/llvm/test/MC/AMDGPU/gfx8_asm_mubuf.s
index 0099ed426aa69f4..e5f10c505a8d59b 100644
--- a/llvm/test/MC/AMDGPU/gfx8_asm_mubuf.s
+++ b/llvm/test/MC/AMDGPU/gfx8_asm_mubuf.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
buffer_load_format_x v5, off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0x03]
diff --git a/llvm/test/MC/AMDGPU/gfx8_asm_smem.s b/llvm/test/MC/AMDGPU/gfx8_asm_smem.s
index 5cdee0f8858c9f5..c75781918dcc6e4 100644
--- a/llvm/test/MC/AMDGPU/gfx8_asm_smem.s
+++ b/llvm/test/MC/AMDGPU/gfx8_asm_smem.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
s_load_dword s5, s[2:3], s2
// CHECK: [0x41,0x01,0x00,0xc0,0x02,0x00,0x00,0x00]
diff --git a/llvm/test/MC/AMDGPU/gfx8_asm_sop1.s b/llvm/test/MC/AMDGPU/gfx8_asm_sop1.s
index f70a851239a4397..f185df85b2bf5b9 100644
--- a/llvm/test/MC/AMDGPU/gfx8_asm_sop1.s
+++ b/llvm/test/MC/AMDGPU/gfx8_asm_sop1.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
s_mov_b32 s5, s1
// CHECK: [0x01,0x00,0x85,0xbe]
diff --git a/llvm/test/MC/AMDGPU/gfx8_asm_sop2.s b/llvm/test/MC/AMDGPU/gfx8_asm_sop2.s
index 121d0ad08fb9cc9..5ffcc081a13255c 100644
--- a/llvm/test/MC/AMDGPU/gfx8_asm_sop2.s
+++ b/llvm/test/MC/AMDGPU/gfx8_asm_sop2.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
s_add_u32 s5, s1, s2
// CHECK: [0x01,0x02,0x05,0x80]
diff --git a/llvm/test/MC/AMDGPU/gfx8_asm_sopc.s b/llvm/test/MC/AMDGPU/gfx8_asm_sopc.s
index c6a6a9bc8b9ed8f..c8596fa246983f6 100644
--- a/llvm/test/MC/AMDGPU/gfx8_asm_sopc.s
+++ b/llvm/test/MC/AMDGPU/gfx8_asm_sopc.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
s_cmp_eq_i32 s1, s2
// CHECK: [0x01,0x02,0x00,0xbf]
diff --git a/llvm/test/MC/AMDGPU/gfx8_asm_sopk.s b/llvm/test/MC/AMDGPU/gfx8_asm_sopk.s
index 56a66243b96b496..581d0cc4e58f8b3 100644
--- a/llvm/test/MC/AMDGPU/gfx8_asm_sopk.s
+++ b/llvm/test/MC/AMDGPU/gfx8_asm_sopk.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
s_movk_i32 s5, 0x3141
// CHECK: [0x41,0x31,0x05,0xb0]
diff --git a/llvm/test/MC/AMDGPU/gfx8_asm_sopp.s b/llvm/test/MC/AMDGPU/gfx8_asm_sopp.s
index faa3c8595a235bc..7449c9638c153e9 100644
--- a/llvm/test/MC/AMDGPU/gfx8_asm_sopp.s
+++ b/llvm/test/MC/AMDGPU/gfx8_asm_sopp.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
s_nop 0x3141
// CHECK: [0x41,0x31,0x80,0xbf]
diff --git a/llvm/test/MC/AMDGPU/gfx8_asm_vintrp.s b/llvm/test/MC/AMDGPU/gfx8_asm_vintrp.s
index 890cd728db9a427..918cd5b26116e85 100644
--- a/llvm/test/MC/AMDGPU/gfx8_asm_vintrp.s
+++ b/llvm/test/MC/AMDGPU/gfx8_asm_vintrp.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
v_interp_p1_f32 v5, v1, attr0.x
// CHECK: [0x01,0x00,0x14,0xd4]
diff --git a/llvm/test/MC/AMDGPU/gfx8_asm_vop1.s b/llvm/test/MC/AMDGPU/gfx8_asm_vop1.s
index 52f249b6f423b1d..32ebbd9e1028a5a 100644
--- a/llvm/test/MC/AMDGPU/gfx8_asm_vop1.s
+++ b/llvm/test/MC/AMDGPU/gfx8_asm_vop1.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
v_nop
// CHECK: [0x00,0x00,0x00,0x7e]
diff --git a/llvm/test/MC/AMDGPU/gfx8_asm_vop2.s b/llvm/test/MC/AMDGPU/gfx8_asm_vop2.s
index d3540bab1c89f82..1c355af950280ff 100644
--- a/llvm/test/MC/AMDGPU/gfx8_asm_vop2.s
+++ b/llvm/test/MC/AMDGPU/gfx8_asm_vop2.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
v_cndmask_b32 v5, v1, v2, vcc
// CHECK: [0x01,0x05,0x0a,0x00]
diff --git a/llvm/test/MC/AMDGPU/gfx8_asm_vop3.s b/llvm/test/MC/AMDGPU/gfx8_asm_vop3.s
index d4c31f14d3bfcab..36da95c448f28a7 100644
--- a/llvm/test/MC/AMDGPU/gfx8_asm_vop3.s
+++ b/llvm/test/MC/AMDGPU/gfx8_asm_vop3.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
v_interp_p1_f32_e64 v5, v2, attr0.x
// CHECK: [0x05,0x00,0x70,0xd2,0x00,0x04,0x02,0x00]
diff --git a/llvm/test/MC/AMDGPU/gfx8_asm_vop3_e64.s b/llvm/test/MC/AMDGPU/gfx8_asm_vop3_e64.s
index 8cee668043dbf39..cd92832528931a2 100644
--- a/llvm/test/MC/AMDGPU/gfx8_asm_vop3_e64.s
+++ b/llvm/test/MC/AMDGPU/gfx8_asm_vop3_e64.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
v_mad_legacy_f32 v5, v1, v2, v3
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0x05,0x0e,0x04]
diff --git a/llvm/test/MC/AMDGPU/gfx8_asm_vopc.s b/llvm/test/MC/AMDGPU/gfx8_asm_vopc.s
index 31e9ad58b7d780f..adbe3f6a2683973 100644
--- a/llvm/test/MC/AMDGPU/gfx8_asm_vopc.s
+++ b/llvm/test/MC/AMDGPU/gfx8_asm_vopc.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
v_cmp_class_f32 vcc, v1, v2
// CHECK: [0x01,0x05,0x20,0x7c]
diff --git a/llvm/test/MC/AMDGPU/gfx8_err_pos.s b/llvm/test/MC/AMDGPU/gfx8_err_pos.s
index 9a17ba167bcbef5..1e8457d54049a64 100644
--- a/llvm/test/MC/AMDGPU/gfx8_err_pos.s
+++ b/llvm/test/MC/AMDGPU/gfx8_err_pos.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck %s --implicit-check-not=error: --strict-whitespace
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s 2>&1 | FileCheck %s --implicit-check-not=error: --strict-whitespace
//==============================================================================
// a16 modifier is not supported on this GPU
diff --git a/llvm/test/MC/AMDGPU/gfx8_unsupported.s b/llvm/test/MC/AMDGPU/gfx8_unsupported.s
index 96bbf07998f86a4..aeed3d21ec5609f 100644
--- a/llvm/test/MC/AMDGPU/gfx8_unsupported.s
+++ b/llvm/test/MC/AMDGPU/gfx8_unsupported.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s 2>&1 | FileCheck --implicit-check-not=error: %s
//===----------------------------------------------------------------------===//
// Unsupported instructions.
diff --git a/llvm/test/MC/AMDGPU/gfx9-asm-err.s b/llvm/test/MC/AMDGPU/gfx9-asm-err.s
index 6c7e0586b2ca61b..451fab99e12ade1 100644
--- a/llvm/test/MC/AMDGPU/gfx9-asm-err.s
+++ b/llvm/test/MC/AMDGPU/gfx9-asm-err.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck -check-prefix=GFX9ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck -check-prefix=GFX9ERR --implicit-check-not=error: %s
v_cvt_f16_u16_e64 v5, 0.5
// GFX9ERR: :[[@LINE-1]]:{{[0-9]+}}: error: literal operands are not supported
diff --git a/llvm/test/MC/AMDGPU/gfx9-vop2be-literal.s b/llvm/test/MC/AMDGPU/gfx9-vop2be-literal.s
index 1782db6625c49e2..0a3aca0254693b3 100644
--- a/llvm/test/MC/AMDGPU/gfx9-vop2be-literal.s
+++ b/llvm/test/MC/AMDGPU/gfx9-vop2be-literal.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck -check-prefix=GFX9-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck -check-prefix=GFX9-ERR --implicit-check-not=error: %s
v_addc_co_u32_e32 v3, vcc, 12345, v3, vcc
// GFX9-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand (violates constant bus restrictions)
diff --git a/llvm/test/MC/AMDGPU/gfx908_err_pos.s b/llvm/test/MC/AMDGPU/gfx908_err_pos.s
index a6f0b8a61708efa..84e640308c98994 100644
--- a/llvm/test/MC/AMDGPU/gfx908_err_pos.s
+++ b/llvm/test/MC/AMDGPU/gfx908_err_pos.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx908 %s 2>&1 | FileCheck %s --implicit-check-not=error: --strict-whitespace
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx908 %s 2>&1 | FileCheck %s --implicit-check-not=error: --strict-whitespace
//==============================================================================
// inline constants are not allowed for this operand
diff --git a/llvm/test/MC/AMDGPU/gfx90a_asm_features.s b/llvm/test/MC/AMDGPU/gfx90a_asm_features.s
index 5e12d885ee73675..d5f2755582d25d8 100644
--- a/llvm/test/MC/AMDGPU/gfx90a_asm_features.s
+++ b/llvm/test/MC/AMDGPU/gfx90a_asm_features.s
@@ -1,6 +1,6 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx908 %s 2>&1 | FileCheck --check-prefixes=GFX908,NOT-GFX90A --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck --check-prefixes=GFX1010,NOT-GFX90A --implicit-check-not=error: %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx90a -show-encoding %s | FileCheck --check-prefix=GFX90A %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx908 %s 2>&1 | FileCheck --check-prefixes=GFX908,NOT-GFX90A --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck --check-prefixes=GFX1010,NOT-GFX90A --implicit-check-not=error: %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx90a -show-encoding %s | FileCheck --check-prefix=GFX90A %s
// NOT-GFX90A: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU
// GFX90A: v_pk_fma_f32 v[8:9], v[0:1], s[0:1], v[4:5] ; encoding: [0x08,0x40,0xb0,0xd3,0x00,0x01,0x10,0x1c]
diff --git a/llvm/test/MC/AMDGPU/gfx90a_err.s b/llvm/test/MC/AMDGPU/gfx90a_err.s
index 47e231161fc9e1a..7b2acc61cfa6f1d 100644
--- a/llvm/test/MC/AMDGPU/gfx90a_err.s
+++ b/llvm/test/MC/AMDGPU/gfx90a_err.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx90a %s 2>&1 | FileCheck --check-prefix=GFX90A --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx90a %s 2>&1 | FileCheck --check-prefix=GFX90A --implicit-check-not=error: %s
ds_add_src2_u32 v1
// GFX90A: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
diff --git a/llvm/test/MC/AMDGPU/gfx90a_err_pos.s b/llvm/test/MC/AMDGPU/gfx90a_err_pos.s
index f60178a6112cc01..791241ce109e753 100644
--- a/llvm/test/MC/AMDGPU/gfx90a_err_pos.s
+++ b/llvm/test/MC/AMDGPU/gfx90a_err_pos.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx90a %s 2>&1 | FileCheck %s --implicit-check-not=error: --strict-whitespace
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx90a %s 2>&1 | FileCheck %s --implicit-check-not=error: --strict-whitespace
//==============================================================================
// vgpr must be even aligned
diff --git a/llvm/test/MC/AMDGPU/gfx90a_ldst_acc.s b/llvm/test/MC/AMDGPU/gfx90a_ldst_acc.s
index 8b2f144815889e0..ee8218613a6dc64 100644
--- a/llvm/test/MC/AMDGPU/gfx90a_ldst_acc.s
+++ b/llvm/test/MC/AMDGPU/gfx90a_ldst_acc.s
@@ -1,5 +1,5 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx908 %s 2>&1 | FileCheck --check-prefix=NOT-GFX90A --implicit-check-not=error: %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx90a -show-encoding %s | FileCheck --check-prefix=GFX90A %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx908 %s 2>&1 | FileCheck --check-prefix=NOT-GFX90A --implicit-check-not=error: %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx90a -show-encoding %s | FileCheck --check-prefix=GFX90A %s
// GFX90A: flat_load_ubyte a5, v[2:3] offset:4095 ; encoding: [0xff,0x0f,0x40,0xdc,0x02,0x00,0x80,0x05]
// NOT-GFX90A: :[[@LINE+1]]:{{[0-9]+}}: error: invalid register class: agpr loads and stores not supported on this GPU
diff --git a/llvm/test/MC/AMDGPU/gfx940_asm_features.s b/llvm/test/MC/AMDGPU/gfx940_asm_features.s
index a8f7b06a1fe3236..5ee9480677be92f 100644
--- a/llvm/test/MC/AMDGPU/gfx940_asm_features.s
+++ b/llvm/test/MC/AMDGPU/gfx940_asm_features.s
@@ -1,6 +1,6 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx940 -show-encoding %s | FileCheck --check-prefix=GFX940 --strict-whitespace %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx90a %s 2>&1 | FileCheck --check-prefixes=NOT-GFX940,GFX90A --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck --check-prefixes=NOT-GFX940,GFX10 --implicit-check-not=error: %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx940 -show-encoding %s | FileCheck --check-prefix=GFX940 --strict-whitespace %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx90a %s 2>&1 | FileCheck --check-prefixes=NOT-GFX940,GFX90A --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck --check-prefixes=NOT-GFX940,GFX10 --implicit-check-not=error: %s
// NOT-GFX940: :[[@LINE+2]]:{{[0-9]+}}: error: invalid operand for instruction
// GFX940: global_load_dword v2, v[2:3], off sc0 ; encoding: [0x00,0x80,0x51,0xdc,0x02,0x00,0x7f,0x02]
diff --git a/llvm/test/MC/AMDGPU/gfx940_err.s b/llvm/test/MC/AMDGPU/gfx940_err.s
index ad52d8bd643a5a5..515b89513a8048f 100644
--- a/llvm/test/MC/AMDGPU/gfx940_err.s
+++ b/llvm/test/MC/AMDGPU/gfx940_err.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx940 %s 2>&1 | FileCheck --check-prefix=GFX940 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx940 %s 2>&1 | FileCheck --check-prefix=GFX940 --implicit-check-not=error: %s
v_mac_f32 v0, v1, v2
// GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
diff --git a/llvm/test/MC/AMDGPU/gfx940_err_pos.s b/llvm/test/MC/AMDGPU/gfx940_err_pos.s
index b13545a7f1b68c9..3823c0eb80277ea 100644
--- a/llvm/test/MC/AMDGPU/gfx940_err_pos.s
+++ b/llvm/test/MC/AMDGPU/gfx940_err_pos.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx940 %s 2>&1 | FileCheck %s --implicit-check-not=error: --strict-whitespace
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx940 %s 2>&1 | FileCheck %s --implicit-check-not=error: --strict-whitespace
//==============================================================================
// instruction must not use sc0
diff --git a/llvm/test/MC/AMDGPU/gfx9_asm_ds.s b/llvm/test/MC/AMDGPU/gfx9_asm_ds.s
index bc33579b1038904..032a9f5cb668fac 100644
--- a/llvm/test/MC/AMDGPU/gfx9_asm_ds.s
+++ b/llvm/test/MC/AMDGPU/gfx9_asm_ds.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
ds_add_u32 v1, v2 offset:65535
// CHECK: [0xff,0xff,0x00,0xd8,0x01,0x02,0x00,0x00]
diff --git a/llvm/test/MC/AMDGPU/gfx9_asm_exp.s b/llvm/test/MC/AMDGPU/gfx9_asm_exp.s
index 689a19ff4629287..23c37b15abbc46f 100644
--- a/llvm/test/MC/AMDGPU/gfx9_asm_exp.s
+++ b/llvm/test/MC/AMDGPU/gfx9_asm_exp.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
exp mrt0 v0, v0, v0, v0
// CHECK: [0x0f,0x00,0x00,0xc4,0x00,0x00,0x00,0x00]
diff --git a/llvm/test/MC/AMDGPU/gfx9_asm_flat.s b/llvm/test/MC/AMDGPU/gfx9_asm_flat.s
index d0380675316745c..5cc3d2533a149e9 100644
--- a/llvm/test/MC/AMDGPU/gfx9_asm_flat.s
+++ b/llvm/test/MC/AMDGPU/gfx9_asm_flat.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
flat_load_ubyte v5, v[1:2] offset:4095
// CHECK: [0xff,0x0f,0x40,0xdc,0x01,0x00,0x00,0x05]
diff --git a/llvm/test/MC/AMDGPU/gfx9_asm_mimg.s b/llvm/test/MC/AMDGPU/gfx9_asm_mimg.s
index ed65976380a536b..4a39f1e3874a82a 100644
--- a/llvm/test/MC/AMDGPU/gfx9_asm_mimg.s
+++ b/llvm/test/MC/AMDGPU/gfx9_asm_mimg.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
image_load v5, v1, s[8:15] dmask:0x1
// CHECK: [0x00,0x01,0x00,0xf0,0x01,0x05,0x02,0x00]
diff --git a/llvm/test/MC/AMDGPU/gfx9_asm_mtbuf.s b/llvm/test/MC/AMDGPU/gfx9_asm_mtbuf.s
index 59d18196fa61b27..57a9f618c0ca219 100644
--- a/llvm/test/MC/AMDGPU/gfx9_asm_mtbuf.s
+++ b/llvm/test/MC/AMDGPU/gfx9_asm_mtbuf.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
tbuffer_load_format_x v5, off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x08,0xe8,0x00,0x05,0x02,0x03]
diff --git a/llvm/test/MC/AMDGPU/gfx9_asm_mubuf.s b/llvm/test/MC/AMDGPU/gfx9_asm_mubuf.s
index 40c051b71a7dbf8..3d4eb635f0f62cc 100644
--- a/llvm/test/MC/AMDGPU/gfx9_asm_mubuf.s
+++ b/llvm/test/MC/AMDGPU/gfx9_asm_mubuf.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
buffer_load_format_x v5, off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0x03]
diff --git a/llvm/test/MC/AMDGPU/gfx9_asm_smem.s b/llvm/test/MC/AMDGPU/gfx9_asm_smem.s
index 1fe4ec3f4cc6f87..71a7b009e2c427b 100644
--- a/llvm/test/MC/AMDGPU/gfx9_asm_smem.s
+++ b/llvm/test/MC/AMDGPU/gfx9_asm_smem.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
s_load_dword s5, s[2:3], s0
// CHECK: [0x41,0x01,0x00,0xc0,0x00,0x00,0x00,0x00]
diff --git a/llvm/test/MC/AMDGPU/gfx9_asm_sop1.s b/llvm/test/MC/AMDGPU/gfx9_asm_sop1.s
index d787c88f6168920..b25d2794f685d3b 100644
--- a/llvm/test/MC/AMDGPU/gfx9_asm_sop1.s
+++ b/llvm/test/MC/AMDGPU/gfx9_asm_sop1.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
s_mov_b32 s5, s1
// CHECK: [0x01,0x00,0x85,0xbe]
diff --git a/llvm/test/MC/AMDGPU/gfx9_asm_sop2.s b/llvm/test/MC/AMDGPU/gfx9_asm_sop2.s
index 554e766760afe67..f9480e083820837 100644
--- a/llvm/test/MC/AMDGPU/gfx9_asm_sop2.s
+++ b/llvm/test/MC/AMDGPU/gfx9_asm_sop2.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
s_add_u32 s5, s1, s2
// CHECK: [0x01,0x02,0x05,0x80]
diff --git a/llvm/test/MC/AMDGPU/gfx9_asm_sopc.s b/llvm/test/MC/AMDGPU/gfx9_asm_sopc.s
index 2001d9ab4f3b9cb..e47d50e4fe5ccd3 100644
--- a/llvm/test/MC/AMDGPU/gfx9_asm_sopc.s
+++ b/llvm/test/MC/AMDGPU/gfx9_asm_sopc.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
s_cmp_eq_i32 s1, s2
// CHECK: [0x01,0x02,0x00,0xbf]
diff --git a/llvm/test/MC/AMDGPU/gfx9_asm_sopk.s b/llvm/test/MC/AMDGPU/gfx9_asm_sopk.s
index 23e2cd294f0a202..e15ea857271ec64 100644
--- a/llvm/test/MC/AMDGPU/gfx9_asm_sopk.s
+++ b/llvm/test/MC/AMDGPU/gfx9_asm_sopk.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
s_movk_i32 s5, 0x3141
// CHECK: [0x41,0x31,0x05,0xb0]
diff --git a/llvm/test/MC/AMDGPU/gfx9_asm_sopp.s b/llvm/test/MC/AMDGPU/gfx9_asm_sopp.s
index 0a92d8c4b2392d2..b137285aa17e25c 100644
--- a/llvm/test/MC/AMDGPU/gfx9_asm_sopp.s
+++ b/llvm/test/MC/AMDGPU/gfx9_asm_sopp.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
s_nop 0x3141
// CHECK: [0x41,0x31,0x80,0xbf]
diff --git a/llvm/test/MC/AMDGPU/gfx9_asm_vintrp.s b/llvm/test/MC/AMDGPU/gfx9_asm_vintrp.s
index 06893eae141c3de..8653fe9d5746820 100644
--- a/llvm/test/MC/AMDGPU/gfx9_asm_vintrp.s
+++ b/llvm/test/MC/AMDGPU/gfx9_asm_vintrp.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
v_interp_p1_f32 v5, v1, attr0.x
// CHECK: [0x01,0x00,0x14,0xd4]
diff --git a/llvm/test/MC/AMDGPU/gfx9_asm_vop1.s b/llvm/test/MC/AMDGPU/gfx9_asm_vop1.s
index 1e48240162a5182..038b4d2185a427d 100644
--- a/llvm/test/MC/AMDGPU/gfx9_asm_vop1.s
+++ b/llvm/test/MC/AMDGPU/gfx9_asm_vop1.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
v_nop
// CHECK: [0x00,0x00,0x00,0x7e]
diff --git a/llvm/test/MC/AMDGPU/gfx9_asm_vop2.s b/llvm/test/MC/AMDGPU/gfx9_asm_vop2.s
index f5c6066f569c653..7b53da641b761e5 100644
--- a/llvm/test/MC/AMDGPU/gfx9_asm_vop2.s
+++ b/llvm/test/MC/AMDGPU/gfx9_asm_vop2.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
v_cndmask_b32 v5, v1, v2, vcc
// CHECK: [0x01,0x05,0x0a,0x00]
diff --git a/llvm/test/MC/AMDGPU/gfx9_asm_vop3.s b/llvm/test/MC/AMDGPU/gfx9_asm_vop3.s
index 8781a01f1eb8efb..f76c49d2bb9e611 100644
--- a/llvm/test/MC/AMDGPU/gfx9_asm_vop3.s
+++ b/llvm/test/MC/AMDGPU/gfx9_asm_vop3.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
v_interp_p1_f32_e64 v5, v2, attr0.x
// CHECK: [0x05,0x00,0x70,0xd2,0x00,0x04,0x02,0x00]
diff --git a/llvm/test/MC/AMDGPU/gfx9_asm_vop3_e64.s b/llvm/test/MC/AMDGPU/gfx9_asm_vop3_e64.s
index fab4042e70cdf75..f3f4cae22538a2a 100644
--- a/llvm/test/MC/AMDGPU/gfx9_asm_vop3_e64.s
+++ b/llvm/test/MC/AMDGPU/gfx9_asm_vop3_e64.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
v_mad_legacy_f32 v5, v1, v2, v3
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0x05,0x0e,0x04]
diff --git a/llvm/test/MC/AMDGPU/gfx9_asm_vop3p.s b/llvm/test/MC/AMDGPU/gfx9_asm_vop3p.s
index 8cb69ad77d81445..ecffa14de913481 100644
--- a/llvm/test/MC/AMDGPU/gfx9_asm_vop3p.s
+++ b/llvm/test/MC/AMDGPU/gfx9_asm_vop3p.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
v_pk_mad_i16 v5, v1, v2, v3
// CHECK: [0x05,0x40,0x80,0xd3,0x01,0x05,0x0e,0x1c]
diff --git a/llvm/test/MC/AMDGPU/gfx9_asm_vopc.s b/llvm/test/MC/AMDGPU/gfx9_asm_vopc.s
index 9d97f20cf016121..345afa2149dc778 100644
--- a/llvm/test/MC/AMDGPU/gfx9_asm_vopc.s
+++ b/llvm/test/MC/AMDGPU/gfx9_asm_vopc.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
v_cmp_class_f32 vcc, v1, v2
// CHECK: [0x01,0x05,0x20,0x7c]
diff --git a/llvm/test/MC/AMDGPU/gfx9_err_pos.s b/llvm/test/MC/AMDGPU/gfx9_err_pos.s
index 088f240e566f914..350a699fe0d71c2 100644
--- a/llvm/test/MC/AMDGPU/gfx9_err_pos.s
+++ b/llvm/test/MC/AMDGPU/gfx9_err_pos.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck %s --implicit-check-not=error: --strict-whitespace
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck %s --implicit-check-not=error: --strict-whitespace
//==============================================================================
// 'null' operand is not supported on this GPU
diff --git a/llvm/test/MC/AMDGPU/gfx9_unsupported.s b/llvm/test/MC/AMDGPU/gfx9_unsupported.s
index 717d10186cff0b9..e6cece5d67f6bd6 100644
--- a/llvm/test/MC/AMDGPU/gfx9_unsupported.s
+++ b/llvm/test/MC/AMDGPU/gfx9_unsupported.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck --implicit-check-not=error: %s
//===----------------------------------------------------------------------===//
// Unsupported instructions.
diff --git a/llvm/test/MC/AMDGPU/hsa_isa_version_attrs.s b/llvm/test/MC/AMDGPU/hsa_isa_version_attrs.s
index ed5b1f27396a02f..aafad9bbaf4c400 100644
--- a/llvm/test/MC/AMDGPU/hsa_isa_version_attrs.s
+++ b/llvm/test/MC/AMDGPU/hsa_isa_version_attrs.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx801 -mattr=-fast-fmaf -show-encoding %s | FileCheck --check-prefix=GFX8 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -mattr=-mad-mix-insts,-xnack -show-encoding %s | FileCheck --check-prefix=GFX9 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx801 -mattr=-fast-fmaf -show-encoding %s | FileCheck --check-prefix=GFX8 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -mattr=-mad-mix-insts,-xnack -show-encoding %s | FileCheck --check-prefix=GFX9 %s
.hsa_code_object_isa
// GFX8: .hsa_code_object_isa 8,0,1,"AMD","AMDGPU"
diff --git a/llvm/test/MC/AMDGPU/inline-imm-inv2pi.s b/llvm/test/MC/AMDGPU/inline-imm-inv2pi.s
index e5ecfa293ba4d70..d730bb32c9f13b8 100644
--- a/llvm/test/MC/AMDGPU/inline-imm-inv2pi.s
+++ b/llvm/test/MC/AMDGPU/inline-imm-inv2pi.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck -check-prefix=SI %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefix=VI %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck -check-prefix=SI %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefix=VI %s
// The value inv2pi should not assert on any targets, but is
// printed
diff erently depending on whether it's a legal inline
diff --git a/llvm/test/MC/AMDGPU/labels-branch-err.s b/llvm/test/MC/AMDGPU/labels-branch-err.s
index e7e8bd114a93563..c0bde3008df42f8 100644
--- a/llvm/test/MC/AMDGPU/labels-branch-err.s
+++ b/llvm/test/MC/AMDGPU/labels-branch-err.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -filetype=obj -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s
+// RUN: not llvm-mc -triple=amdgcn -filetype=obj -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s
// ERROR: error: undefined label 'undef_label'
s_branch undef_label
diff --git a/llvm/test/MC/AMDGPU/labels-branch-gfx9.s b/llvm/test/MC/AMDGPU/labels-branch-gfx9.s
index 8bf6b968a709122..6f6719ca7eb4e12 100644
--- a/llvm/test/MC/AMDGPU/labels-branch-gfx9.s
+++ b/llvm/test/MC/AMDGPU/labels-branch-gfx9.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s --check-prefix=GFX9
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -filetype=obj %s | llvm-objdump -d --mcpu=gfx900 - | FileCheck %s --check-prefix=BIN
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s --check-prefix=GFX9
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -filetype=obj %s | llvm-objdump -d --mcpu=gfx900 - | FileCheck %s --check-prefix=BIN
loop_start:
diff --git a/llvm/test/MC/AMDGPU/labels-branch.s b/llvm/test/MC/AMDGPU/labels-branch.s
index 7315f0d54053b25..2858c6d9010ceea 100644
--- a/llvm/test/MC/AMDGPU/labels-branch.s
+++ b/llvm/test/MC/AMDGPU/labels-branch.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s | FileCheck %s --check-prefix=VI
-// RUN: llvm-mc -arch=amdgcn -mcpu=fiji -filetype=obj %s | llvm-objdump -d --mcpu=fiji - | FileCheck %s --check-prefix=BIN
+// RUN: llvm-mc -triple=amdgcn -mcpu=fiji -show-encoding %s | FileCheck %s --check-prefix=VI
+// RUN: llvm-mc -triple=amdgcn -mcpu=fiji -filetype=obj %s | llvm-objdump -d --mcpu=fiji - | FileCheck %s --check-prefix=BIN
loop_start:
s_branch loop_start
diff --git a/llvm/test/MC/AMDGPU/lds_direct-ci.s b/llvm/test/MC/AMDGPU/lds_direct-ci.s
index c8d3955042b20bb..d233f9874ecebd3 100644
--- a/llvm/test/MC/AMDGPU/lds_direct-ci.s
+++ b/llvm/test/MC/AMDGPU/lds_direct-ci.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s --check-prefix=CI
+// RUN: llvm-mc -triple=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s --check-prefix=CI
v_readfirstlane_b32 s0, lds_direct
// CI: v_readfirstlane_b32 s0, src_lds_direct ; encoding: [0xfe,0x04,0x00,0x7e]
diff --git a/llvm/test/MC/AMDGPU/lds_direct-err.s b/llvm/test/MC/AMDGPU/lds_direct-err.s
index 61ec7facf0c5aa4..fce011ec2be374f 100644
--- a/llvm/test/MC/AMDGPU/lds_direct-err.s
+++ b/llvm/test/MC/AMDGPU/lds_direct-err.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck %s --check-prefix=NOGFX9 --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck %s --check-prefix=NOGFX9 --implicit-check-not=error:
//---------------------------------------------------------------------------//
// lds_direct may be used only with vector ALU instructions
diff --git a/llvm/test/MC/AMDGPU/lds_direct-gfx10.s b/llvm/test/MC/AMDGPU/lds_direct-gfx10.s
index 58ca40afcb195dd..6043f2fec618dbf 100644
--- a/llvm/test/MC/AMDGPU/lds_direct-gfx10.s
+++ b/llvm/test/MC/AMDGPU/lds_direct-gfx10.s
@@ -1,5 +1,5 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck %s --check-prefix=GFX10
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck %s --check-prefix=NOGFX10 --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck %s --check-prefix=GFX10
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck %s --check-prefix=NOGFX10 --implicit-check-not=error:
v_readfirstlane_b32 s0, lds_direct
// GFX10: v_readfirstlane_b32 s0, src_lds_direct ; encoding: [0xfe,0x04,0x00,0x7e]
diff --git a/llvm/test/MC/AMDGPU/lds_direct.s b/llvm/test/MC/AMDGPU/lds_direct.s
index e8ca18933bf8cea..b20256b7aa7a3f0 100644
--- a/llvm/test/MC/AMDGPU/lds_direct.s
+++ b/llvm/test/MC/AMDGPU/lds_direct.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s --check-prefix=GFX9
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s --check-prefix=GFX9
//---------------------------------------------------------------------------//
// VOP1/3
diff --git a/llvm/test/MC/AMDGPU/literal16-err.s b/llvm/test/MC/AMDGPU/literal16-err.s
index d644a68f6052656..7eb228015bb53c2 100644
--- a/llvm/test/MC/AMDGPU/literal16-err.s
+++ b/llvm/test/MC/AMDGPU/literal16-err.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=NOVI --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=NOVI --implicit-check-not=error: %s
v_add_f16 v1, 0xfffff, v2
// NOVI: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
diff --git a/llvm/test/MC/AMDGPU/literal16.s b/llvm/test/MC/AMDGPU/literal16.s
index e757a1257ec4ffa..fd8ab05ec3ab4ee 100644
--- a/llvm/test/MC/AMDGPU/literal16.s
+++ b/llvm/test/MC/AMDGPU/literal16.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefix=VI %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefix=VI %s
v_add_f16 v1, 0, v2
// VI: v_add_f16_e32 v1, 0, v2 ; encoding: [0x80,0x04,0x02,0x3e]
diff --git a/llvm/test/MC/AMDGPU/literals.s b/llvm/test/MC/AMDGPU/literals.s
index e37a4f9a404b6b8..8e5e8fd1886f416 100644
--- a/llvm/test/MC/AMDGPU/literals.s
+++ b/llvm/test/MC/AMDGPU/literals.s
@@ -1,14 +1,14 @@
-// RUN: not llvm-mc -arch=amdgcn -show-encoding %s | FileCheck %s --check-prefix=SICI
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck %s --check-prefix=SICI
-// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s --check-prefixes=SICI,CI
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefix=GFX89
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s --check-prefixes=GFX89,GFX9
-
-// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s --check-prefixes=NOGCN,NOSI,NOSICI,NOSICIVI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s --check-prefixes=NOGCN,NOSI,NOSICI,NOSICIVI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck %s --check-prefixes=NOGCN,NOSICI,NOCIVI,NOSICIVI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck %s --check-prefixes=NOGCN,NOSICIVI,NOVI,NOGFX89 --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck %s --check-prefixes=NOGCN,NOGFX89,NOGFX9 --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -show-encoding %s | FileCheck %s --check-prefix=SICI
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck %s --check-prefix=SICI
+// RUN: not llvm-mc -triple=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s --check-prefixes=SICI,CI
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefix=GFX89
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s --check-prefixes=GFX89,GFX9
+
+// RUN: not llvm-mc -triple=amdgcn %s 2>&1 | FileCheck %s --check-prefixes=NOGCN,NOSI,NOSICI,NOSICIVI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s --check-prefixes=NOGCN,NOSI,NOSICI,NOSICIVI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck %s --check-prefixes=NOGCN,NOSICI,NOCIVI,NOSICIVI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s 2>&1 | FileCheck %s --check-prefixes=NOGCN,NOSICIVI,NOVI,NOGFX89 --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck %s --check-prefixes=NOGCN,NOGFX89,NOGFX9 --implicit-check-not=error:
//---------------------------------------------------------------------------//
// fp literal, expected fp operand
diff --git a/llvm/test/MC/AMDGPU/literalv216-err.s b/llvm/test/MC/AMDGPU/literalv216-err.s
index 8afb78f400f7f89..73148711d0425b8 100644
--- a/llvm/test/MC/AMDGPU/literalv216-err.s
+++ b/llvm/test/MC/AMDGPU/literalv216-err.s
@@ -1,5 +1,5 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck -check-prefix=GFX9 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck -check-prefix=GFX10 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck -check-prefix=GFX9 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck -check-prefix=GFX10 --implicit-check-not=error: %s
v_pk_add_f16 v1, -17, v2
// GFX9: :[[@LINE-1]]:{{[0-9]+}}: error: literal operands are not supported
diff --git a/llvm/test/MC/AMDGPU/literalv216.s b/llvm/test/MC/AMDGPU/literalv216.s
index 245763df77d4013..5b1c7a76ca8531c 100644
--- a/llvm/test/MC/AMDGPU/literalv216.s
+++ b/llvm/test/MC/AMDGPU/literalv216.s
@@ -1,8 +1,8 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s --check-prefix=GFX9
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck %s --check-prefix=GFX10
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s --check-prefix=GFX9
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck %s --check-prefix=GFX10
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck %s -check-prefix=NOGFX9 --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck %s -check-prefix=NOGFX10 --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck %s -check-prefix=NOGFX9 --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck %s -check-prefix=NOGFX10 --implicit-check-not=error:
//===----------------------------------------------------------------------===//
// Inline constants
diff --git a/llvm/test/MC/AMDGPU/macro-examples.s b/llvm/test/MC/AMDGPU/macro-examples.s
index 10cbe88dc87af04..12e05920f40e16f 100644
--- a/llvm/test/MC/AMDGPU/macro-examples.s
+++ b/llvm/test/MC/AMDGPU/macro-examples.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=fiji %s | FileCheck %s --check-prefix=VI
+// RUN: llvm-mc -triple=amdgcn -mcpu=fiji %s | FileCheck %s --check-prefix=VI
//===----------------------------------------------------------------------===//
// Example of reg[expr] and reg[epxr1:expr2] syntax in macros.
diff --git a/llvm/test/MC/AMDGPU/mad-mix.s b/llvm/test/MC/AMDGPU/mad-mix.s
index 4b7be21b48976e9..bc8239d61e34950 100644
--- a/llvm/test/MC/AMDGPU/mad-mix.s
+++ b/llvm/test/MC/AMDGPU/mad-mix.s
@@ -1,6 +1,6 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=GFX9-MADMIX %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx904 %s 2>&1 | FileCheck -check-prefix=GFX9-FMAMIX-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx906 %s 2>&1 | FileCheck -check-prefix=GFX9-FMAMIX-ERR --implicit-check-not=error: %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=GFX9-MADMIX %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx904 %s 2>&1 | FileCheck -check-prefix=GFX9-FMAMIX-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx906 %s 2>&1 | FileCheck -check-prefix=GFX9-FMAMIX-ERR --implicit-check-not=error: %s
v_mad_mix_f32 v0, v1, v2, v3
// GFX9-MADMIX: v_mad_mix_f32 v0, v1, v2, v3 ; encoding: [0x00,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x04]
diff --git a/llvm/test/MC/AMDGPU/mai-err-gfx940.s b/llvm/test/MC/AMDGPU/mai-err-gfx940.s
index 170176615781d55..810788555a71efd 100644
--- a/llvm/test/MC/AMDGPU/mai-err-gfx940.s
+++ b/llvm/test/MC/AMDGPU/mai-err-gfx940.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx940 %s 2>&1 | FileCheck -check-prefix=GFX940 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx940 %s 2>&1 | FileCheck -check-prefix=GFX940 %s
v_mfma_f32_32x32x2bf16 a[0:31], v0, v1, 0
// GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
diff --git a/llvm/test/MC/AMDGPU/mai-err.s b/llvm/test/MC/AMDGPU/mai-err.s
index 2caa6a128bf9d5f..af28d1f0f6622ea 100644
--- a/llvm/test/MC/AMDGPU/mai-err.s
+++ b/llvm/test/MC/AMDGPU/mai-err.s
@@ -1,5 +1,5 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx908 %s 2>&1 | FileCheck -check-prefix=GFX908 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck -check-prefix=GFX900 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx908 %s 2>&1 | FileCheck -check-prefix=GFX908 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck -check-prefix=GFX900 --implicit-check-not=error: %s
v_accvgpr_read_b32 v0, v0
// GFX908: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
diff --git a/llvm/test/MC/AMDGPU/mai-gfx90a.s b/llvm/test/MC/AMDGPU/mai-gfx90a.s
index 5314c7607417297..176854e67832253 100644
--- a/llvm/test/MC/AMDGPU/mai-gfx90a.s
+++ b/llvm/test/MC/AMDGPU/mai-gfx90a.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx90a -show-encoding %s | FileCheck -check-prefix=GFX90A %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx90a -show-encoding %s | FileCheck -check-prefix=GFX90A %s
v_accvgpr_read_b32 v2, a0
// GFX90A: v_accvgpr_read_b32 v2, a0 ; encoding: [0x02,0x40,0xd8,0xd3,0x00,0x01,0x00,0x18]
diff --git a/llvm/test/MC/AMDGPU/mai-gfx940.s b/llvm/test/MC/AMDGPU/mai-gfx940.s
index 25e3f6804172bec..f6343ad26cfa448 100644
--- a/llvm/test/MC/AMDGPU/mai-gfx940.s
+++ b/llvm/test/MC/AMDGPU/mai-gfx940.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx940 -show-encoding %s | FileCheck -check-prefix=GFX940 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx90a %s 2>&1 | FileCheck -check-prefix=GFX90A %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx940 -show-encoding %s | FileCheck -check-prefix=GFX940 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx90a %s 2>&1 | FileCheck -check-prefix=GFX90A %s
//===----------------------------------------------------------------------===//
// Misc opcodes.
diff --git a/llvm/test/MC/AMDGPU/mai.s b/llvm/test/MC/AMDGPU/mai.s
index 31b2fdb1116e50c..475c99e13e4f8c4 100644
--- a/llvm/test/MC/AMDGPU/mai.s
+++ b/llvm/test/MC/AMDGPU/mai.s
@@ -1,5 +1,5 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx908 -show-encoding %s | FileCheck -check-prefix=GFX908 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx908 %s 2>&1 | FileCheck -check-prefix=NOGFX908 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx908 -show-encoding %s | FileCheck -check-prefix=GFX908 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx908 %s 2>&1 | FileCheck -check-prefix=NOGFX908 --implicit-check-not=error: %s
v_accvgpr_read_b32 v2, a0
// GFX908: v_accvgpr_read_b32 v2, a0 ; encoding: [0x02,0x40,0xd8,0xd3,0x00,0x01,0x00,0x18]
diff --git a/llvm/test/MC/AMDGPU/max-branch-distance.s b/llvm/test/MC/AMDGPU/max-branch-distance.s
index 3fdd3629d59eb09..0e3337a7e04b4eb 100644
--- a/llvm/test/MC/AMDGPU/max-branch-distance.s
+++ b/llvm/test/MC/AMDGPU/max-branch-distance.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -filetype=obj -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s
+// RUN: not llvm-mc -triple=amdgcn -filetype=obj -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s
// ERROR: max-branch-distance.s:7:3: error: branch size exceeds simm16
// fill v_nop
diff --git a/llvm/test/MC/AMDGPU/mimg-err-gfx940.s b/llvm/test/MC/AMDGPU/mimg-err-gfx940.s
index 06b54103fd4a880..5d2892745633289 100644
--- a/llvm/test/MC/AMDGPU/mimg-err-gfx940.s
+++ b/llvm/test/MC/AMDGPU/mimg-err-gfx940.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx940 %s 2>&1 | FileCheck %s --check-prefix=NOGFX940 --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx940 %s 2>&1 | FileCheck %s --check-prefix=NOGFX940 --implicit-check-not=error:
image_load v[4:6], v[238:241], s[28:35] dmask:0x7 unorm
// NOGFX940: :[[@LINE-1]]:{{[0-9]+}}: error:
diff --git a/llvm/test/MC/AMDGPU/mimg-err.s b/llvm/test/MC/AMDGPU/mimg-err.s
index 51820bce326c8c1..6cf92f29c27b78e 100644
--- a/llvm/test/MC/AMDGPU/mimg-err.s
+++ b/llvm/test/MC/AMDGPU/mimg-err.s
@@ -1,8 +1,8 @@
-// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s --check-prefix=NOGCN --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s --check-prefix=NOGCN --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji %s 2>&1 | FileCheck %s --check-prefix=NOGCN --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck %s --check-prefix=NOGFX9 --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx90a %s 2>&1 | FileCheck %s --check-prefix=NOGFX90A --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn %s 2>&1 | FileCheck %s --check-prefix=NOGCN --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s --check-prefix=NOGCN --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=fiji %s 2>&1 | FileCheck %s --check-prefix=NOGCN --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck %s --check-prefix=NOGFX9 --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx90a %s 2>&1 | FileCheck %s --check-prefix=NOGFX90A --implicit-check-not=error:
//===----------------------------------------------------------------------===//
// Image Load/Store
diff --git a/llvm/test/MC/AMDGPU/mimg-gfx90a.s b/llvm/test/MC/AMDGPU/mimg-gfx90a.s
index 92ddb2ed9d2c5a2..ee606410f795ffb 100644
--- a/llvm/test/MC/AMDGPU/mimg-gfx90a.s
+++ b/llvm/test/MC/AMDGPU/mimg-gfx90a.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx90a -show-encoding %s | FileCheck --check-prefix=GFX90A %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx90a -show-encoding %s | FileCheck --check-prefix=GFX90A %s
image_load v[4:6], v[238:241], s[28:35] dmask:0x7 unorm
// GFX90A: image_load v[4:6], v[238:241], s[28:35] dmask:0x7 unorm ; encoding: [0x00,0x17,0x00,0xf0,0xee,0x04,0x07,0x00]
diff --git a/llvm/test/MC/AMDGPU/mimg.s b/llvm/test/MC/AMDGPU/mimg.s
index 071599ea129fc68..38927b40f334754 100644
--- a/llvm/test/MC/AMDGPU/mimg.s
+++ b/llvm/test/MC/AMDGPU/mimg.s
@@ -1,16 +1,16 @@
-// RUN: not llvm-mc -arch=amdgcn -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=SICI --check-prefix=SICIVI
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=SICI --check-prefix=SICIVI
-// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=SICI --check-prefix=SICIVI
-// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=SICIVI --check-prefix=VI --check-prefix=GFX89 --check-prefix=GFX8_0
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx810 -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=SICIVI --check-prefix=VI --check-prefix=GFX89 --check-prefix=GFX8_1
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=GFX9 --check-prefix=GFX89
-
-// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji %s 2>&1 | FileCheck %s --check-prefix=NOVI --check-prefix=NOGFX8_0 --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx810 %s 2>&1 | FileCheck %s --check-prefix=NOVI --check-prefix=NOGFX8_1 --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck %s --check-prefix=NOGFX9 --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=SICI --check-prefix=SICIVI
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=SICI --check-prefix=SICIVI
+// RUN: not llvm-mc -triple=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=SICI --check-prefix=SICIVI
+// RUN: not llvm-mc -triple=amdgcn -mcpu=fiji -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=SICIVI --check-prefix=VI --check-prefix=GFX89 --check-prefix=GFX8_0
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx810 -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=SICIVI --check-prefix=VI --check-prefix=GFX89 --check-prefix=GFX8_1
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=GFX9 --check-prefix=GFX89
+
+// RUN: not llvm-mc -triple=amdgcn %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=fiji %s 2>&1 | FileCheck %s --check-prefix=NOVI --check-prefix=NOGFX8_0 --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx810 %s 2>&1 | FileCheck %s --check-prefix=NOVI --check-prefix=NOGFX8_1 --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck %s --check-prefix=NOGFX9 --implicit-check-not=error:
//===----------------------------------------------------------------------===//
// Image Load/Store
diff --git a/llvm/test/MC/AMDGPU/misaligned-vgpr-tuples-err.s b/llvm/test/MC/AMDGPU/misaligned-vgpr-tuples-err.s
index 7a6b49ae6babcd8..d76dc8c9fff63f1 100644
--- a/llvm/test/MC/AMDGPU/misaligned-vgpr-tuples-err.s
+++ b/llvm/test/MC/AMDGPU/misaligned-vgpr-tuples-err.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx90a %s 2>&1 | FileCheck --check-prefixes=GFX90A --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx90a %s 2>&1 | FileCheck --check-prefixes=GFX90A --implicit-check-not=error: %s
v_add_f64 v[1:2], v[1:2], v[1:2]
// GFX90A: :[[@LINE-1]]:{{[0-9]+}}: error: invalid register class: vgpr tuples must be 64 bit aligned
diff --git a/llvm/test/MC/AMDGPU/mtbuf-gfx10.s b/llvm/test/MC/AMDGPU/mtbuf-gfx10.s
index c486cd0ebd0047f..f235280874c4aed 100644
--- a/llvm/test/MC/AMDGPU/mtbuf-gfx10.s
+++ b/llvm/test/MC/AMDGPU/mtbuf-gfx10.s
@@ -1,5 +1,5 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck -check-prefix=GFX10 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck -check-prefix=GFX10-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck -check-prefix=GFX10 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck -check-prefix=GFX10-ERR --implicit-check-not=error: %s
//===----------------------------------------------------------------------===//
// Positive tests for legacy format syntax.
diff --git a/llvm/test/MC/AMDGPU/mtbuf.s b/llvm/test/MC/AMDGPU/mtbuf.s
index 4ae3c44ce0767a8..2a35b7ffc700d76 100644
--- a/llvm/test/MC/AMDGPU/mtbuf.s
+++ b/llvm/test/MC/AMDGPU/mtbuf.s
@@ -1,10 +1,10 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck -check-prefix=SICI %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck -check-prefix=SICI %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefix=VI %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck -check-prefix=SICI %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck -check-prefix=SICI %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefix=VI %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefixes=GCN-ERR,SICI-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck -check-prefixes=GCN-ERR,SICI-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefixes=GCN-ERR,VI-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefixes=GCN-ERR,SICI-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck -check-prefixes=GCN-ERR,SICI-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefixes=GCN-ERR,VI-ERR --implicit-check-not=error: %s
//===----------------------------------------------------------------------===//
// Positive tests for legacy dfmt/nfmt syntax.
diff --git a/llvm/test/MC/AMDGPU/mubuf-gfx10.s b/llvm/test/MC/AMDGPU/mubuf-gfx10.s
index 155055145283075..e0f1feb43bee90d 100644
--- a/llvm/test/MC/AMDGPU/mubuf-gfx10.s
+++ b/llvm/test/MC/AMDGPU/mubuf-gfx10.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck -check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck -check-prefix=GFX10 %s
buffer_load_sbyte off, s[8:11], s3 glc slc lds
// GFX10: buffer_load_sbyte off, s[8:11], s3 glc slc lds ; encoding: [0x00,0x40,0x25,0xe0,0x00,0x00,0x42,0x03]
diff --git a/llvm/test/MC/AMDGPU/mubuf-gfx9.s b/llvm/test/MC/AMDGPU/mubuf-gfx9.s
index 90f0cdf75375065..994d82f56a2ecf4 100644
--- a/llvm/test/MC/AMDGPU/mubuf-gfx9.s
+++ b/llvm/test/MC/AMDGPU/mubuf-gfx9.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=GFX9 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga 2>&1 %s | FileCheck -check-prefix=VI-ERR --implicit-check-not=error: %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=GFX9 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga 2>&1 %s | FileCheck -check-prefix=VI-ERR --implicit-check-not=error: %s
buffer_load_ubyte_d16 v1, off, s[4:7], s1
// VI-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
diff --git a/llvm/test/MC/AMDGPU/mubuf.s b/llvm/test/MC/AMDGPU/mubuf.s
index 0daca9860986b37..600580ac515560a 100644
--- a/llvm/test/MC/AMDGPU/mubuf.s
+++ b/llvm/test/MC/AMDGPU/mubuf.s
@@ -1,10 +1,10 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck --check-prefixes=SI,SICI %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck --check-prefixes=CI,SICI %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefix=VI %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck --check-prefixes=SI,SICI %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck --check-prefixes=CI,SICI %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefix=VI %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck --check-prefixes=NOSI,NOSICIVI,NOSICI --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck --check-prefixes=NOCI,NOSICIVI,NOSICI --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck --check-prefixes=NOVI,NOSICIVI --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck --check-prefixes=NOSI,NOSICIVI,NOSICI --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck --check-prefixes=NOCI,NOSICIVI,NOSICI --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s 2>&1 | FileCheck --check-prefixes=NOVI,NOSICIVI --implicit-check-not=error: %s
//===----------------------------------------------------------------------===//
// Test for
diff erent operand combinations
diff --git a/llvm/test/MC/AMDGPU/offset-expr.s b/llvm/test/MC/AMDGPU/offset-expr.s
index 7ec05c7531283c6..92a9bf1b4ce9a9b 100644
--- a/llvm/test/MC/AMDGPU/offset-expr.s
+++ b/llvm/test/MC/AMDGPU/offset-expr.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx906 -filetype=obj %s | llvm-objdump -d --mcpu=gfx906 - | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx906 -filetype=obj %s | llvm-objdump -d --mcpu=gfx906 - | FileCheck %s
// Check that the offset is correctly calculated.
diff --git a/llvm/test/MC/AMDGPU/offsetbug_once.s b/llvm/test/MC/AMDGPU/offsetbug_once.s
index f357c40f3c948d6..e0bd71d675c287d 100644
--- a/llvm/test/MC/AMDGPU/offsetbug_once.s
+++ b/llvm/test/MC/AMDGPU/offsetbug_once.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck %s --check-prefix=GFX10
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -filetype=obj %s | llvm-objdump -d --mcpu=gfx1010 - | FileCheck %s --check-prefix=BIN
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck %s --check-prefix=GFX10
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -filetype=obj %s | llvm-objdump -d --mcpu=gfx1010 - | FileCheck %s --check-prefix=BIN
s_getpc_b64 s[0:1]
s_cbranch_vccnz BB0_1
// GFX10: s_cbranch_vccnz BB0_1 ; encoding: [A,A,0x87,0xbf]
diff --git a/llvm/test/MC/AMDGPU/offsetbug_one_and_one.s b/llvm/test/MC/AMDGPU/offsetbug_one_and_one.s
index 875ea44b225cf0a..7023ae80e6b6677 100644
--- a/llvm/test/MC/AMDGPU/offsetbug_one_and_one.s
+++ b/llvm/test/MC/AMDGPU/offsetbug_one_and_one.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck %s --check-prefix=GFX10
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -filetype=obj %s | llvm-objdump -d --mcpu=gfx1010 - | FileCheck %s --check-prefix=BIN
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck %s --check-prefix=GFX10
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -filetype=obj %s | llvm-objdump -d --mcpu=gfx1010 - | FileCheck %s --check-prefix=BIN
s_getpc_b64 s[0:1]
s_cbranch_vccnz BB0_1
// GFX10: s_cbranch_vccnz BB0_1 ; encoding: [A,A,0x87,0xbf]
diff --git a/llvm/test/MC/AMDGPU/offsetbug_twice.s b/llvm/test/MC/AMDGPU/offsetbug_twice.s
index 1bcc1adc258161d..b5fa183c8d8b7ff 100644
--- a/llvm/test/MC/AMDGPU/offsetbug_twice.s
+++ b/llvm/test/MC/AMDGPU/offsetbug_twice.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck %s --check-prefix=GFX10
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -filetype=obj %s | llvm-objdump -d --mcpu=gfx1010 - | FileCheck %s --check-prefix=BIN
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck %s --check-prefix=GFX10
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -filetype=obj %s | llvm-objdump -d --mcpu=gfx1010 - | FileCheck %s --check-prefix=BIN
s_getpc_b64 s[0:1]
s_cbranch_vccnz BB0_2
// GFX10: s_cbranch_vccnz BB0_2 ; encoding: [A,A,0x87,0xbf]
diff --git a/llvm/test/MC/AMDGPU/out-of-range-registers.s b/llvm/test/MC/AMDGPU/out-of-range-registers.s
index cd602d9854e3052..fda8d5524e68761 100644
--- a/llvm/test/MC/AMDGPU/out-of-range-registers.s
+++ b/llvm/test/MC/AMDGPU/out-of-range-registers.s
@@ -1,12 +1,12 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefixes=GCN-ERR,SICIVI9-ERR,SIVICI-ERR,SI-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefixes=GCN-ERR,SICIVI9-ERR,SIVICI-ERR,VI-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck -check-prefixes=GCN-ERR,GFX9-ERR,SICIVI9-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck -check-prefixes=GCN-ERR,GFX10-ERR --implicit-check-not=error: %s
-
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck -check-prefix=SIVICI %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefixes=SIVICI,CIVI9 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefixes=GFX9,CIVI9 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck -check-prefix=GFX10 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefixes=GCN-ERR,SICIVI9-ERR,SIVICI-ERR,SI-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefixes=GCN-ERR,SICIVI9-ERR,SIVICI-ERR,VI-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck -check-prefixes=GCN-ERR,GFX9-ERR,SICIVI9-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck -check-prefixes=GCN-ERR,GFX10-ERR --implicit-check-not=error: %s
+
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck -check-prefix=SIVICI %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefixes=SIVICI,CIVI9 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefixes=GFX9,CIVI9 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck -check-prefix=GFX10 %s
s_add_i32 s106, s0, s1
// GCN-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: register index is out of range
diff --git a/llvm/test/MC/AMDGPU/reg-syntax-err.s b/llvm/test/MC/AMDGPU/reg-syntax-err.s
index 7307953c0c4e676..dff58c976265f36 100644
--- a/llvm/test/MC/AMDGPU/reg-syntax-err.s
+++ b/llvm/test/MC/AMDGPU/reg-syntax-err.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=NOVI --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=NOVI --implicit-check-not=error: %s
s_mov_b32 s1, s 1
// NOVI: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
diff --git a/llvm/test/MC/AMDGPU/reg-syntax-extra.s b/llvm/test/MC/AMDGPU/reg-syntax-extra.s
index 492e78b981f63c5..216efe95c0e8292 100644
--- a/llvm/test/MC/AMDGPU/reg-syntax-extra.s
+++ b/llvm/test/MC/AMDGPU/reg-syntax-extra.s
@@ -1,11 +1,11 @@
-// RUN: not llvm-mc -arch=amdgcn -show-encoding %s | FileCheck --check-prefixes=GCN,SICI %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck --check-prefixes=GCN,SICI %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s | FileCheck --check-prefixes=GCN,VI %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck --check-prefixes=GCN,GFX10 %s
-
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck --check-prefixes=NOSICI,NOSICIVI --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji %s 2>&1 | FileCheck --check-prefix=NOVI --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck --check-prefix=NOGFX10 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -show-encoding %s | FileCheck --check-prefixes=GCN,SICI %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck --check-prefixes=GCN,SICI %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=fiji -show-encoding %s | FileCheck --check-prefixes=GCN,VI %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck --check-prefixes=GCN,GFX10 %s
+
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck --check-prefixes=NOSICI,NOSICIVI --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=fiji %s 2>&1 | FileCheck --check-prefix=NOVI --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck --check-prefix=NOGFX10 --implicit-check-not=error: %s
s_mov_b32 [ttmp5], [ttmp3]
// SICI: s_mov_b32 ttmp5, ttmp3 ; encoding: [0x73,0x03,0xf5,0xbe]
diff --git a/llvm/test/MC/AMDGPU/regression/bug28165.s b/llvm/test/MC/AMDGPU/regression/bug28165.s
index 375eb338c0a6ae8..1e31f204e8995f5 100644
--- a/llvm/test/MC/AMDGPU/regression/bug28165.s
+++ b/llvm/test/MC/AMDGPU/regression/bug28165.s
@@ -1,7 +1,7 @@
-// RUN: llvm-mc -arch=amdgcn -show-encoding %s | FileCheck %s --check-prefixes=GCN,SICI
-// RUN: llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck %s --check-prefixes=GCN,SICI
-// RUN: llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s --check-prefixes=GCN,SICI
-// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefixes=GCN,VI
+// RUN: llvm-mc -triple=amdgcn -show-encoding %s | FileCheck %s --check-prefixes=GCN,SICI
+// RUN: llvm-mc -triple=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck %s --check-prefixes=GCN,SICI
+// RUN: llvm-mc -triple=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s --check-prefixes=GCN,SICI
+// RUN: llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefixes=GCN,VI
// SICI: v_cmp_eq_f64_e32 vcc, 0.5, v[254:255] ; encoding: [0xf0,0xfc,0x45,0x7c]
// VI: v_cmp_eq_f64_e32 vcc, 0.5, v[254:255] ; encoding: [0xf0,0xfc,0xc5,0x7c]
diff --git a/llvm/test/MC/AMDGPU/regression/bug28168.s b/llvm/test/MC/AMDGPU/regression/bug28168.s
index e65414856e722a6..4b2604d0581b2a1 100644
--- a/llvm/test/MC/AMDGPU/regression/bug28168.s
+++ b/llvm/test/MC/AMDGPU/regression/bug28168.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s --check-prefix=CI
-// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefix=VI
+// RUN: llvm-mc -triple=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s --check-prefix=CI
+// RUN: llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefix=VI
v_mqsad_pk_u16_u8 v[2:3], s[0:1], 1, v[254:255]
// CI: [0x02,0x00,0xe6,0xd2,0x00,0x02,0xf9,0x07]
diff --git a/llvm/test/MC/AMDGPU/regression/bug28413.s b/llvm/test/MC/AMDGPU/regression/bug28413.s
index f301764b4a6814f..5fbf9f37d4a8de9 100644
--- a/llvm/test/MC/AMDGPU/regression/bug28413.s
+++ b/llvm/test/MC/AMDGPU/regression/bug28413.s
@@ -1,7 +1,7 @@
-// RUN: llvm-mc -arch=amdgcn -show-encoding %s | FileCheck %s --check-prefixes=GCN,SICI
-// RUN: llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck %s --check-prefixes=GCN,SICI
-// RUN: llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s --check-prefixes=GCN,SICI
-// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefixes=GCN,VI
+// RUN: llvm-mc -triple=amdgcn -show-encoding %s | FileCheck %s --check-prefixes=GCN,SICI
+// RUN: llvm-mc -triple=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck %s --check-prefixes=GCN,SICI
+// RUN: llvm-mc -triple=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s --check-prefixes=GCN,SICI
+// RUN: llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefixes=GCN,VI
v_cmp_eq_i32 vcc, 0.5, v0
// SICI: v_cmp_eq_i32_e32 vcc, 0.5, v0 ; encoding: [0xf0,0x00,0x04,0x7d]
diff --git a/llvm/test/MC/AMDGPU/regression/bug28538.s b/llvm/test/MC/AMDGPU/regression/bug28538.s
index 1dba3c0098bd36f..dd66a51fbfa32ed 100644
--- a/llvm/test/MC/AMDGPU/regression/bug28538.s
+++ b/llvm/test/MC/AMDGPU/regression/bug28538.s
@@ -1,7 +1,7 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck %s --check-prefix=NOVI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s 2>&1 | FileCheck %s --check-prefix=NOVI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
// NOSICI: :[[@LINE+2]]:{{[0-9]+}}: error: not a valid operand.
// NOVI: :[[@LINE+1]]:{{[0-9]+}}: error: invalid row_bcast value
diff --git a/llvm/test/MC/AMDGPU/s_endpgm.s b/llvm/test/MC/AMDGPU/s_endpgm.s
index 6a9d3ea285faadf..59170f1497b2d79 100644
--- a/llvm/test/MC/AMDGPU/s_endpgm.s
+++ b/llvm/test/MC/AMDGPU/s_endpgm.s
@@ -1,6 +1,6 @@
-// RUN: llvm-mc -arch=amdgcn %s | FileCheck -strict-whitespace %s -check-prefix=WHITESPACE
-// RUN: llvm-mc -arch=amdgcn -show-encoding %s | FileCheck %s --check-prefix=GCN
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -filetype=obj %s | llvm-objcopy -S -K keep_symbol - | llvm-objdump -d --mcpu=gfx900 - | FileCheck %s --check-prefix=BIN
+// RUN: llvm-mc -triple=amdgcn %s | FileCheck -strict-whitespace %s -check-prefix=WHITESPACE
+// RUN: llvm-mc -triple=amdgcn -show-encoding %s | FileCheck %s --check-prefix=GCN
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -filetype=obj %s | llvm-objcopy -S -K keep_symbol - | llvm-objdump -d --mcpu=gfx900 - | FileCheck %s --check-prefix=BIN
// WHITESPACE: s_endpgm{{$}}
// GCN: s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
diff --git a/llvm/test/MC/AMDGPU/smem-err.s b/llvm/test/MC/AMDGPU/smem-err.s
index 2c4c32d521f75f0..091509cdc26a5e7 100644
--- a/llvm/test/MC/AMDGPU/smem-err.s
+++ b/llvm/test/MC/AMDGPU/smem-err.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=NOVI --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=NOVI --implicit-check-not=error: %s
s_memtime exec
// NOVI: :[[@LINE-1]]:11: error: invalid operand for instruction
diff --git a/llvm/test/MC/AMDGPU/smem.s b/llvm/test/MC/AMDGPU/smem.s
index 0e33d95cd04e4a5..c2785c139cca777 100644
--- a/llvm/test/MC/AMDGPU/smem.s
+++ b/llvm/test/MC/AMDGPU/smem.s
@@ -1,17 +1,17 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck -check-prefix=SICI %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck -check-prefix=SICI %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=kaveri -show-encoding %s | FileCheck -check-prefix=SICI %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck --check-prefixes=VI,GFX89 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck --check-prefixes=GFX89,GFX9 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1012 -show-encoding %s | FileCheck --check-prefixes=GFX10,GFX1012 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1030 -show-encoding %s | FileCheck -check-prefix=GFX10 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck --check-prefixes=NOSICI,NOSICIGFX10,NOSICIGFX1030,NOSICIVIGFX1030 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck --check-prefixes=NOSICI,NOSICIGFX10,NOSICIGFX1030,NOSICIVIGFX1030 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=kaveri %s 2>&1 | FileCheck --check-prefixes=NOSICI,NOSICIGFX10,NOSICIGFX1030,NOSICIVIGFX1030 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck --check-prefixes=NOVI,NOSICIVIGFX1030 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck --check-prefixes=NOGFX9GFX10,NOGFX9GFX1012,NOGFX9 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1012 %s 2>&1 | FileCheck --check-prefixes=NOSICIGFX10,NOGFX9GFX10,NOGFX9GFX1012,NOGFX10 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1030 %s 2>&1 | FileCheck --check-prefixes=NOSICIGFX1030,NOSICIVIGFX1030,NOSICIGFX10,NOGFX9GFX10,NOGFX1030,NOGFX10 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck -check-prefix=SICI %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck -check-prefix=SICI %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=kaveri -show-encoding %s | FileCheck -check-prefix=SICI %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck --check-prefixes=VI,GFX89 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck --check-prefixes=GFX89,GFX9 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1012 -show-encoding %s | FileCheck --check-prefixes=GFX10,GFX1012 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1030 -show-encoding %s | FileCheck -check-prefix=GFX10 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck --check-prefixes=NOSICI,NOSICIGFX10,NOSICIGFX1030,NOSICIVIGFX1030 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck --check-prefixes=NOSICI,NOSICIGFX10,NOSICIGFX1030,NOSICIVIGFX1030 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=kaveri %s 2>&1 | FileCheck --check-prefixes=NOSICI,NOSICIGFX10,NOSICIGFX1030,NOSICIVIGFX1030 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s 2>&1 | FileCheck --check-prefixes=NOVI,NOSICIVIGFX1030 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck --check-prefixes=NOGFX9GFX10,NOGFX9GFX1012,NOGFX9 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1012 %s 2>&1 | FileCheck --check-prefixes=NOSICIGFX10,NOGFX9GFX10,NOGFX9GFX1012,NOGFX10 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1030 %s 2>&1 | FileCheck --check-prefixes=NOSICIGFX1030,NOSICIVIGFX1030,NOSICIGFX10,NOGFX9GFX10,NOGFX1030,NOGFX10 --implicit-check-not=error: %s
s_dcache_wb
// GFX89: s_dcache_wb ; encoding: [0x00,0x00,0x84,0xc0,0x00,0x00,0x00,0x00]
diff --git a/llvm/test/MC/AMDGPU/smrd-err.s b/llvm/test/MC/AMDGPU/smrd-err.s
index b217c34ce85c382..11d6658cffb8b08 100644
--- a/llvm/test/MC/AMDGPU/smrd-err.s
+++ b/llvm/test/MC/AMDGPU/smrd-err.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=tahiti %s | FileCheck -check-prefix=SI %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=NOVI --implicit-check-not=error: %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=tahiti %s | FileCheck -check-prefix=SI %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=NOVI --implicit-check-not=error: %s
s_load_dwordx4 s[100:103], s[2:3], s4
// NOVI: :[[@LINE-1]]:{{[0-9]+}}: error: register not available on this GPU
diff --git a/llvm/test/MC/AMDGPU/smrd.s b/llvm/test/MC/AMDGPU/smrd.s
index f5f57acb227c8ba..b3b3824f1988ca5 100644
--- a/llvm/test/MC/AMDGPU/smrd.s
+++ b/llvm/test/MC/AMDGPU/smrd.s
@@ -1,11 +1,11 @@
-// RUN: not llvm-mc -arch=amdgcn -show-encoding %s | FileCheck --check-prefix=GCN %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck --check-prefix=GCN %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck --check-prefixes=GCN,CI %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s | FileCheck --check-prefix=VI %s
-
-// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s --check-prefix=NOSI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s --check-prefix=NOSI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji %s 2>&1 | FileCheck %s --check-prefix=NOVI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -show-encoding %s | FileCheck --check-prefix=GCN %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck --check-prefix=GCN %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck --check-prefixes=GCN,CI %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=fiji -show-encoding %s | FileCheck --check-prefix=VI %s
+
+// RUN: not llvm-mc -triple=amdgcn %s 2>&1 | FileCheck %s --check-prefix=NOSI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s --check-prefix=NOSI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=fiji %s 2>&1 | FileCheck %s --check-prefix=NOVI --implicit-check-not=error:
//===----------------------------------------------------------------------===//
// Offset Handling
diff --git a/llvm/test/MC/AMDGPU/sop1-err.s b/llvm/test/MC/AMDGPU/sop1-err.s
index 14feba7950477fd..18b1f912b1d556a 100644
--- a/llvm/test/MC/AMDGPU/sop1-err.s
+++ b/llvm/test/MC/AMDGPU/sop1-err.s
@@ -1,6 +1,6 @@
-// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck -check-prefix=GCN --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefix=GCN --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck --check-prefixes=GCN,VI --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn %s 2>&1 | FileCheck -check-prefix=GCN --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefix=GCN --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s 2>&1 | FileCheck --check-prefixes=GCN,VI --implicit-check-not=error: %s
s_mov_b32 v1, s2
// GCN: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
diff --git a/llvm/test/MC/AMDGPU/sop1.s b/llvm/test/MC/AMDGPU/sop1.s
index 73227c05c67c839..6e5f329142d2a4d 100644
--- a/llvm/test/MC/AMDGPU/sop1.s
+++ b/llvm/test/MC/AMDGPU/sop1.s
@@ -1,12 +1,12 @@
-// RUN: not llvm-mc -arch=amdgcn -show-encoding %s | FileCheck --check-prefix=SICI %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s | FileCheck --check-prefix=GFX89 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck --check-prefixes=GFX89,GFX9 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
-
-// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck --check-prefixes=NOSICI,NOSICIVI --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji %s 2>&1 | FileCheck --check-prefixes=NOSICIVI,NOGFX89 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck --check-prefixes=NOGFX9,NOGFX89 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 2>&1 %s | FileCheck --check-prefix=GFX10-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -show-encoding %s | FileCheck --check-prefix=SICI %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=fiji -show-encoding %s | FileCheck --check-prefix=GFX89 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck --check-prefixes=GFX89,GFX9 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+
+// RUN: not llvm-mc -triple=amdgcn %s 2>&1 | FileCheck --check-prefixes=NOSICI,NOSICIVI --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=fiji %s 2>&1 | FileCheck --check-prefixes=NOSICIVI,NOGFX89 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck --check-prefixes=NOGFX9,NOGFX89 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 2>&1 %s | FileCheck --check-prefix=GFX10-ERR --implicit-check-not=error: %s
s_mov_b32 s1, s2
// SICI: s_mov_b32 s1, s2 ; encoding: [0x02,0x03,0x81,0xbe]
diff --git a/llvm/test/MC/AMDGPU/sop2-err.s b/llvm/test/MC/AMDGPU/sop2-err.s
index b095f1c6a174b17..eb68d03c1ce0840 100644
--- a/llvm/test/MC/AMDGPU/sop2-err.s
+++ b/llvm/test/MC/AMDGPU/sop2-err.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck -check-prefix=GCN --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn %s 2>&1 | FileCheck -check-prefix=GCN --implicit-check-not=error: %s
s_cbranch_g_fork 100, s[6:7]
// GCN: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
diff --git a/llvm/test/MC/AMDGPU/sop2.s b/llvm/test/MC/AMDGPU/sop2.s
index 26537be40c8a580..fbf1dbf97d51a4d 100644
--- a/llvm/test/MC/AMDGPU/sop2.s
+++ b/llvm/test/MC/AMDGPU/sop2.s
@@ -1,16 +1,16 @@
-// RUN: not llvm-mc -arch=amdgcn -show-encoding %s | FileCheck --check-prefixes=GCN,SICI %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck --check-prefixes=GCN,SICI %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck --check-prefixes=GCN,SICI %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s | FileCheck --check-prefixes=GCN,GFX89 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck --check-prefixes=GCN,GFX89,GFX9 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck --check-prefixes=GCN,GFX10 %s
-
-// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck --check-prefix=NOSICIVI --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck --check-prefix=NOSICIVI --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck --check-prefix=NOSICIVI --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji %s 2>&1 | FileCheck --check-prefixes=NOSICIVI,NOGFX89 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck --check-prefixes=NOGFX9,NOGFX89 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 2>&1 %s | FileCheck --check-prefix=GFX10-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -show-encoding %s | FileCheck --check-prefixes=GCN,SICI %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck --check-prefixes=GCN,SICI %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck --check-prefixes=GCN,SICI %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=fiji -show-encoding %s | FileCheck --check-prefixes=GCN,GFX89 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck --check-prefixes=GCN,GFX89,GFX9 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck --check-prefixes=GCN,GFX10 %s
+
+// RUN: not llvm-mc -triple=amdgcn %s 2>&1 | FileCheck --check-prefix=NOSICIVI --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck --check-prefix=NOSICIVI --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck --check-prefix=NOSICIVI --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=fiji %s 2>&1 | FileCheck --check-prefixes=NOSICIVI,NOGFX89 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck --check-prefixes=NOGFX9,NOGFX89 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 2>&1 %s | FileCheck --check-prefix=GFX10-ERR --implicit-check-not=error: %s
s_add_u32 s1, s2, s3
// GCN: s_add_u32 s1, s2, s3 ; encoding: [0x02,0x03,0x01,0x80]
diff --git a/llvm/test/MC/AMDGPU/sopc-err.s b/llvm/test/MC/AMDGPU/sopc-err.s
index 60d2badf986884c..8f74038e4f04d0d 100644
--- a/llvm/test/MC/AMDGPU/sopc-err.s
+++ b/llvm/test/MC/AMDGPU/sopc-err.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=VI --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=VI --implicit-check-not=error: %s
s_set_gpr_idx_on s0, s1
// VI: :[[@LINE-1]]:{{[0-9]+}}: error: expected absolute expression
diff --git a/llvm/test/MC/AMDGPU/sopc.s b/llvm/test/MC/AMDGPU/sopc.s
index c3a79d8b5f1622d..73564f99f697437 100644
--- a/llvm/test/MC/AMDGPU/sopc.s
+++ b/llvm/test/MC/AMDGPU/sopc.s
@@ -1,7 +1,7 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck -check-prefix=GCN %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s | FileCheck --check-prefixes=GCN,VI %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefix=NOSICI --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck -check-prefix=GFX10-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck -check-prefix=GCN %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=fiji -show-encoding %s | FileCheck --check-prefixes=GCN,VI %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefix=NOSICI --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck -check-prefix=GFX10-ERR --implicit-check-not=error: %s
//===----------------------------------------------------------------------===//
// SOPC Instructions
diff --git a/llvm/test/MC/AMDGPU/sopk-err.s b/llvm/test/MC/AMDGPU/sopk-err.s
index 88bcd0ca07d5d43..504ee1d11cbc97d 100644
--- a/llvm/test/MC/AMDGPU/sopk-err.s
+++ b/llvm/test/MC/AMDGPU/sopk-err.s
@@ -1,16 +1,16 @@
-// RUN: not llvm-mc -arch=amdgcn -show-encoding %s | FileCheck --check-prefix=SICI %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck --check-prefix=SICI %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck --check-prefix=VI %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=GFX9 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck -check-prefix=GFX10 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck -check-prefix=GFX11 %s
-
-// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck -check-prefixes=GCN,SICIVI-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefixes=GCN,SICIVI-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefixes=GCN,SICIVI-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck -check-prefixes=GCN,GFX9-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck -check-prefixes=GCN,GFX10-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 %s 2>&1 | FileCheck -check-prefixes=GCN,GFX11-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -show-encoding %s | FileCheck --check-prefix=SICI %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck --check-prefix=SICI %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck --check-prefix=VI %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=GFX9 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck -check-prefix=GFX10 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck -check-prefix=GFX11 %s
+
+// RUN: not llvm-mc -triple=amdgcn %s 2>&1 | FileCheck -check-prefixes=GCN,SICIVI-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefixes=GCN,SICIVI-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefixes=GCN,SICIVI-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck -check-prefixes=GCN,GFX9-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck -check-prefixes=GCN,GFX10-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 %s 2>&1 | FileCheck -check-prefixes=GCN,GFX11-ERR --implicit-check-not=error: %s
s_setreg_b32 0x1f803, s2
// GCN: :[[@LINE-1]]:{{[0-9]+}}: error: invalid immediate: only 16-bit values are legal
diff --git a/llvm/test/MC/AMDGPU/sopk.s b/llvm/test/MC/AMDGPU/sopk.s
index c769c7534b2dee0..2b20c35aa7719ae 100644
--- a/llvm/test/MC/AMDGPU/sopk.s
+++ b/llvm/test/MC/AMDGPU/sopk.s
@@ -1,16 +1,16 @@
-// RUN: not llvm-mc -arch=amdgcn -show-encoding %s | FileCheck --check-prefixes=GCN,SICI %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck --check-prefixes=GCN,SICI %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s | FileCheck --check-prefixes=GCN,VI9,VI %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck --check-prefixes=GCN,VI9,GFX9 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck --check-prefixes=GCN,GFX10 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck -check-prefixes=GCN,GFX11 %s
-
-// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck -check-prefix=NOSICIVI --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefix=NOSICIVI --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji %s 2>&1 | FileCheck -check-prefix=NOSICIVI --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck --check-prefix=NOGFX9 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck --check-prefix=NOGFX10 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 %s 2>&1 | FileCheck --check-prefix=NOGFX11 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -show-encoding %s | FileCheck --check-prefixes=GCN,SICI %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck --check-prefixes=GCN,SICI %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=fiji -show-encoding %s | FileCheck --check-prefixes=GCN,VI9,VI %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck --check-prefixes=GCN,VI9,GFX9 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck --check-prefixes=GCN,GFX10 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck -check-prefixes=GCN,GFX11 %s
+
+// RUN: not llvm-mc -triple=amdgcn %s 2>&1 | FileCheck -check-prefix=NOSICIVI --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefix=NOSICIVI --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=fiji %s 2>&1 | FileCheck -check-prefix=NOSICIVI --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck --check-prefix=NOGFX9 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck --check-prefix=NOGFX10 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 %s 2>&1 | FileCheck --check-prefix=NOGFX11 --implicit-check-not=error: %s
//===----------------------------------------------------------------------===//
// Instructions
diff --git a/llvm/test/MC/AMDGPU/sopp-err.s b/llvm/test/MC/AMDGPU/sopp-err.s
index 0e43b89dcf0f0f2..c7f28faa55763be 100644
--- a/llvm/test/MC/AMDGPU/sopp-err.s
+++ b/llvm/test/MC/AMDGPU/sopp-err.s
@@ -1,8 +1,8 @@
-// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck --check-prefixes=GCN,PREGFX11,SICI,SICIVI --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck --check-prefixes=GCN,PREGFX11,SICI,SICIVI --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji %s 2>&1 | FileCheck --check-prefixes=GCN,PREGFX11,VI,SICIVI --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck --check-prefixes=GCN,PREGFX11,GFX10 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 %s 2>&1 | FileCheck --check-prefixes=GCN,GFX11 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn %s 2>&1 | FileCheck --check-prefixes=GCN,PREGFX11,SICI,SICIVI --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck --check-prefixes=GCN,PREGFX11,SICI,SICIVI --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=fiji %s 2>&1 | FileCheck --check-prefixes=GCN,PREGFX11,VI,SICIVI --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck --check-prefixes=GCN,PREGFX11,GFX10 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 %s 2>&1 | FileCheck --check-prefixes=GCN,GFX11 --implicit-check-not=error: %s
//===----------------------------------------------------------------------===//
// sendmsg
diff --git a/llvm/test/MC/AMDGPU/sopp-gfx10.s b/llvm/test/MC/AMDGPU/sopp-gfx10.s
index eb08a609719343d..f50ed92cc988feb 100644
--- a/llvm/test/MC/AMDGPU/sopp-gfx10.s
+++ b/llvm/test/MC/AMDGPU/sopp-gfx10.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
//===----------------------------------------------------------------------===//
// s_sendmsg
diff --git a/llvm/test/MC/AMDGPU/sopp-gfx9.s b/llvm/test/MC/AMDGPU/sopp-gfx9.s
index 48045b8e1ecad04..e760d497896fa56 100644
--- a/llvm/test/MC/AMDGPU/sopp-gfx9.s
+++ b/llvm/test/MC/AMDGPU/sopp-gfx9.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck --check-prefix=GFX9 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck --check-prefix=GFX9 %s
//===----------------------------------------------------------------------===//
// s_waitcnt
diff --git a/llvm/test/MC/AMDGPU/sopp.s b/llvm/test/MC/AMDGPU/sopp.s
index a5faa76a0932875..7771573df1ecbfa 100644
--- a/llvm/test/MC/AMDGPU/sopp.s
+++ b/llvm/test/MC/AMDGPU/sopp.s
@@ -1,6 +1,6 @@
-// RUN: not llvm-mc -arch=amdgcn -show-encoding %s | FileCheck --check-prefixes=GCN,SI %s
-// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
-// RUN: llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s | FileCheck --check-prefixes=GCN,VI %s
+// RUN: not llvm-mc -triple=amdgcn -show-encoding %s | FileCheck --check-prefixes=GCN,SI %s
+// RUN: not llvm-mc -triple=amdgcn %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
+// RUN: llvm-mc -triple=amdgcn -mcpu=fiji -show-encoding %s | FileCheck --check-prefixes=GCN,VI %s
//===----------------------------------------------------------------------===//
// Edge Cases
diff --git a/llvm/test/MC/AMDGPU/sym_kernel_scope.s b/llvm/test/MC/AMDGPU/sym_kernel_scope.s
index 3e2857120904116..2e6e9d7e3960de4 100644
--- a/llvm/test/MC/AMDGPU/sym_kernel_scope.s
+++ b/llvm/test/MC/AMDGPU/sym_kernel_scope.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn %s 2>&1 | FileCheck %s
.byte .kernel.sgpr_count
// CHECK: .byte 0
diff --git a/llvm/test/MC/AMDGPU/sym_kernel_scope_agpr.s b/llvm/test/MC/AMDGPU/sym_kernel_scope_agpr.s
index ea065ea9ef5a94f..9602f91aec57f6e 100644
--- a/llvm/test/MC/AMDGPU/sym_kernel_scope_agpr.s
+++ b/llvm/test/MC/AMDGPU/sym_kernel_scope_agpr.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx90a %s 2>&1 | FileCheck -check-prefixes=GFX90A %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx908 %s 2>&1 | FileCheck -check-prefixes=GFX908 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx90a %s 2>&1 | FileCheck -check-prefixes=GFX90A %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx908 %s 2>&1 | FileCheck -check-prefixes=GFX908 %s
// Based on sym_kernel_scope.s
.byte .kernel.agpr_count
diff --git a/llvm/test/MC/AMDGPU/sym_option.s b/llvm/test/MC/AMDGPU/sym_option.s
index 48ce5df46f8cd66..33f16dc74dc94fc 100644
--- a/llvm/test/MC/AMDGPU/sym_option.s
+++ b/llvm/test/MC/AMDGPU/sym_option.s
@@ -1,12 +1,12 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=tahiti %s | FileCheck %s --check-prefix=SI
-// RUN: llvm-mc -arch=amdgcn -mcpu=bonaire %s | FileCheck %s --check-prefix=BONAIRE
-// RUN: llvm-mc -arch=amdgcn -mcpu=hawaii %s | FileCheck %s --check-prefix=HAWAII
-// RUN: llvm-mc -arch=amdgcn -mcpu=kabini %s | FileCheck %s --check-prefix=KABINI
-// RUN: llvm-mc -arch=amdgcn -mcpu=iceland %s | FileCheck %s --check-prefix=ICELAND
-// RUN: llvm-mc -arch=amdgcn -mcpu=carrizo %s | FileCheck %s --check-prefix=CARRIZO
-// RUN: llvm-mc -arch=amdgcn -mcpu=tonga %s | FileCheck %s --check-prefix=TONGA
-// RUN: llvm-mc -arch=amdgcn -mcpu=fiji %s | FileCheck %s --check-prefix=FIJI
-// RUN: llvm-mc -arch=amdgcn -mcpu=stoney %s | FileCheck %s --check-prefix=STONEY
+// RUN: llvm-mc -triple=amdgcn -mcpu=tahiti %s | FileCheck %s --check-prefix=SI
+// RUN: llvm-mc -triple=amdgcn -mcpu=bonaire %s | FileCheck %s --check-prefix=BONAIRE
+// RUN: llvm-mc -triple=amdgcn -mcpu=hawaii %s | FileCheck %s --check-prefix=HAWAII
+// RUN: llvm-mc -triple=amdgcn -mcpu=kabini %s | FileCheck %s --check-prefix=KABINI
+// RUN: llvm-mc -triple=amdgcn -mcpu=iceland %s | FileCheck %s --check-prefix=ICELAND
+// RUN: llvm-mc -triple=amdgcn -mcpu=carrizo %s | FileCheck %s --check-prefix=CARRIZO
+// RUN: llvm-mc -triple=amdgcn -mcpu=tonga %s | FileCheck %s --check-prefix=TONGA
+// RUN: llvm-mc -triple=amdgcn -mcpu=fiji %s | FileCheck %s --check-prefix=FIJI
+// RUN: llvm-mc -triple=amdgcn -mcpu=stoney %s | FileCheck %s --check-prefix=STONEY
.byte .option.machine_version_major
// SI: .byte 6
diff --git a/llvm/test/MC/AMDGPU/trap.s b/llvm/test/MC/AMDGPU/trap.s
index 13ad7b00e3a10e8..366ba7f43aaaef6 100644
--- a/llvm/test/MC/AMDGPU/trap.s
+++ b/llvm/test/MC/AMDGPU/trap.s
@@ -1,12 +1,12 @@
-// RUN: not llvm-mc -arch=amdgcn -show-encoding %s | FileCheck %s --check-prefix=SICI
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck %s --check-prefix=SICI
-// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s | FileCheck %s --check-prefix=VI
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s --check-prefix=GFX9
-
-// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s --check-prefix=NOSICIVI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s --check-prefix=NOSICIVI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji %s 2>&1 | FileCheck %s --check-prefix=NOSICIVI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck %s --check-prefix=NOGFX9 --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -show-encoding %s | FileCheck %s --check-prefix=SICI
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck %s --check-prefix=SICI
+// RUN: not llvm-mc -triple=amdgcn -mcpu=fiji -show-encoding %s | FileCheck %s --check-prefix=VI
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s --check-prefix=GFX9
+
+// RUN: not llvm-mc -triple=amdgcn %s 2>&1 | FileCheck %s --check-prefix=NOSICIVI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s --check-prefix=NOSICIVI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=fiji %s 2>&1 | FileCheck %s --check-prefix=NOSICIVI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck %s --check-prefix=NOGFX9 --implicit-check-not=error:
//===----------------------------------------------------------------------===//
// Trap Handler related - 32 bit registers
diff --git a/llvm/test/MC/AMDGPU/v_illegal-atomics.s b/llvm/test/MC/AMDGPU/v_illegal-atomics.s
index 9ee9acda7252589..175f017ad9caae8 100644
--- a/llvm/test/MC/AMDGPU/v_illegal-atomics.s
+++ b/llvm/test/MC/AMDGPU/v_illegal-atomics.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1030 -show-encoding %s | FileCheck --check-prefix=GFX1030 %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck --check-prefix=GFX1100 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1030 -show-encoding %s | FileCheck --check-prefix=GFX1030 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck --check-prefix=GFX1100 %s
v_illegal
// GFX1030: encoding: [0x00,0x00,0x00,0x00]
diff --git a/llvm/test/MC/AMDGPU/vcmpx-gfx10.s b/llvm/test/MC/AMDGPU/vcmpx-gfx10.s
index eeccc4b88e77e17..15e7159568d40b4 100644
--- a/llvm/test/MC/AMDGPU/vcmpx-gfx10.s
+++ b/llvm/test/MC/AMDGPU/vcmpx-gfx10.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
// GFX10: v_cmpx_le_f32_e64 v1, v0 ; encoding: [0x7e,0x00,0x13,0xd4,0x01,0x01,0x02,0x00]
v_cmpx_le_f32_e64 v1, v0
diff --git a/llvm/test/MC/AMDGPU/vintrp-e64-err.s b/llvm/test/MC/AMDGPU/vintrp-e64-err.s
index 41f7b539c570fe8..663f48dfde0ebb5 100644
--- a/llvm/test/MC/AMDGPU/vintrp-e64-err.s
+++ b/llvm/test/MC/AMDGPU/vintrp-e64-err.s
@@ -1,6 +1,6 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck %s --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck %s --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck %s --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s 2>&1 | FileCheck %s --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck %s --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck %s --implicit-check-not=error:
v_interp_p1_f32_e64 v5, 0.5, attr0.w
// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
diff --git a/llvm/test/MC/AMDGPU/vintrp-err.s b/llvm/test/MC/AMDGPU/vintrp-err.s
index 05c26d5ae9419a3..6cda6d13276b393 100644
--- a/llvm/test/MC/AMDGPU/vintrp-err.s
+++ b/llvm/test/MC/AMDGPU/vintrp-err.s
@@ -1,5 +1,5 @@
-// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck -check-prefix=GCN --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=GCN --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn %s 2>&1 | FileCheck -check-prefix=GCN --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=GCN --implicit-check-not=error: %s
v_interp_p1_f32 v0, v1
// GCN: :[[@LINE-1]]:{{[0-9]+}}: error: too few operands for instruction
diff --git a/llvm/test/MC/AMDGPU/vintrp.s b/llvm/test/MC/AMDGPU/vintrp.s
index fbeb540b712864e..db15f8eb4499dda 100644
--- a/llvm/test/MC/AMDGPU/vintrp.s
+++ b/llvm/test/MC/AMDGPU/vintrp.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -show-encoding %s | FileCheck -check-prefix=SI %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefix=VI %s
+// RUN: llvm-mc -triple=amdgcn -show-encoding %s | FileCheck -check-prefix=SI %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefix=VI %s
v_interp_p1_f32 v1, v0, attr0.x
// SI: v_interp_p1_f32 v1, v0, attr0.x ; encoding: [0x00,0x00,0x04,0xc8]
diff --git a/llvm/test/MC/AMDGPU/vop-err.s b/llvm/test/MC/AMDGPU/vop-err.s
index 6bf8272183aa209..4af69a5752ac983 100644
--- a/llvm/test/MC/AMDGPU/vop-err.s
+++ b/llvm/test/MC/AMDGPU/vop-err.s
@@ -1,5 +1,5 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s 2>&1 | FileCheck --implicit-check-not=error: %s
// GENERIC LIMITATIONS ON VOP FORMATS: CONSTANT BUS RESTRICTIONS
diff --git a/llvm/test/MC/AMDGPU/vop1-gfx9-err.s b/llvm/test/MC/AMDGPU/vop1-gfx9-err.s
index 317bbfa354111ff..71290eb80686427 100644
--- a/llvm/test/MC/AMDGPU/vop1-gfx9-err.s
+++ b/llvm/test/MC/AMDGPU/vop1-gfx9-err.s
@@ -1,6 +1,6 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck -check-prefixes=GCN,GFX9 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefixes=GCN,VI --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=hawaii %s 2>&1 | FileCheck -check-prefixes=GCN,CI --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck -check-prefixes=GCN,GFX9 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefixes=GCN,VI --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=hawaii %s 2>&1 | FileCheck -check-prefixes=GCN,CI --implicit-check-not=error: %s
v_swap_b32 v1, 1
// CI: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
diff --git a/llvm/test/MC/AMDGPU/vop1-gfx9.s b/llvm/test/MC/AMDGPU/vop1-gfx9.s
index b88d872b28e5630..c810298a61e1901 100644
--- a/llvm/test/MC/AMDGPU/vop1-gfx9.s
+++ b/llvm/test/MC/AMDGPU/vop1-gfx9.s
@@ -1,7 +1,7 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=GFX9 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefix=NOVI --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=hawaii %s 2>&1 | FileCheck -check-prefix=NOVI --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=NOVI --implicit-check-not=error: %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=GFX9 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefix=NOVI --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=hawaii %s 2>&1 | FileCheck -check-prefix=NOVI --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=NOVI --implicit-check-not=error: %s
v_swap_b32 v1, v2
// GFX9: v_swap_b32 v1, v2 ; encoding: [0x02,0xa3,0x02,0x7e]
diff --git a/llvm/test/MC/AMDGPU/vop1.s b/llvm/test/MC/AMDGPU/vop1.s
index 914627bebf92755..f7e5db7fa3d39f0 100644
--- a/llvm/test/MC/AMDGPU/vop1.s
+++ b/llvm/test/MC/AMDGPU/vop1.s
@@ -1,12 +1,12 @@
-// RUN: not llvm-mc -arch=amdgcn -show-encoding %s | FileCheck %s --check-prefixes=GCN,SICI
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck %s --check-prefixes=GCN,SICI
-// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s --check-prefixes=GCN,CI,SICI,CIVI
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefixes=GCN,CIVI,VI
-
-// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s --check-prefixes=NOSI,NOSICI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s --check-prefixes=NOSI,NOSICI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck %s -check-prefix=NOVI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -show-encoding %s | FileCheck %s --check-prefixes=GCN,SICI
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck %s --check-prefixes=GCN,SICI
+// RUN: not llvm-mc -triple=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s --check-prefixes=GCN,CI,SICI,CIVI
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefixes=GCN,CIVI,VI
+
+// RUN: not llvm-mc -triple=amdgcn %s 2>&1 | FileCheck %s --check-prefixes=NOSI,NOSICI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s --check-prefixes=NOSI,NOSICI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s 2>&1 | FileCheck %s -check-prefix=NOVI --implicit-check-not=error:
// Force 32-bit encoding
diff --git a/llvm/test/MC/AMDGPU/vop2-err.s b/llvm/test/MC/AMDGPU/vop2-err.s
index a951e0697588d21..122fbd7134911a0 100644
--- a/llvm/test/MC/AMDGPU/vop2-err.s
+++ b/llvm/test/MC/AMDGPU/vop2-err.s
@@ -1,5 +1,5 @@
-// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck --implicit-check-not=error: %s
//===----------------------------------------------------------------------===//
// Generic checks
diff --git a/llvm/test/MC/AMDGPU/vop2.s b/llvm/test/MC/AMDGPU/vop2.s
index c5e8e684fd12750..ade7ce95f17584a 100644
--- a/llvm/test/MC/AMDGPU/vop2.s
+++ b/llvm/test/MC/AMDGPU/vop2.s
@@ -1,12 +1,12 @@
-// RUN: not llvm-mc -arch=amdgcn -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=SICI
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=SICI
-// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=SICI
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=VI
-
-// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck %s -check-prefix=NOVI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=SICI
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=SICI
+// RUN: not llvm-mc -triple=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=SICI
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=VI
+
+// RUN: not llvm-mc -triple=amdgcn %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s 2>&1 | FileCheck %s -check-prefix=NOVI --implicit-check-not=error:
//===----------------------------------------------------------------------===//
// Generic Checks for floating-point instructions (These have modifiers).
diff --git a/llvm/test/MC/AMDGPU/vop3-convert.s b/llvm/test/MC/AMDGPU/vop3-convert.s
index ebf4251fb71d234..0f33a81c6ea0fee 100644
--- a/llvm/test/MC/AMDGPU/vop3-convert.s
+++ b/llvm/test/MC/AMDGPU/vop3-convert.s
@@ -1,12 +1,12 @@
-// RUN: not llvm-mc -arch=amdgcn -show-encoding %s | FileCheck %s --check-prefixes=GCN,SICI
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck %s --check-prefixes=GCN,SICI
-// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s --check-prefixes=GCN,SICI
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefixes=GCN,VI
-
-// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck %s -check-prefix=NOVI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -show-encoding %s | FileCheck %s --check-prefixes=GCN,SICI
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck %s --check-prefixes=GCN,SICI
+// RUN: not llvm-mc -triple=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s --check-prefixes=GCN,SICI
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefixes=GCN,VI
+
+// RUN: not llvm-mc -triple=amdgcn %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s 2>&1 | FileCheck %s -check-prefix=NOVI --implicit-check-not=error:
v_mov_b32 [v1], [v2]
// GCN: v_mov_b32_e32 v1, v2 ; encoding: [0x02,0x03,0x02,0x7e]
diff --git a/llvm/test/MC/AMDGPU/vop3-errs.s b/llvm/test/MC/AMDGPU/vop3-errs.s
index 3e3bde0e8373fc5..e600151410389d1 100644
--- a/llvm/test/MC/AMDGPU/vop3-errs.s
+++ b/llvm/test/MC/AMDGPU/vop3-errs.s
@@ -1,7 +1,7 @@
-// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s --check-prefix=GFX67 --check-prefix=GCN --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s --check-prefix=GFX67 --check-prefix=GCN --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji %s 2>&1 | FileCheck %s --check-prefix=GFX89 --check-prefix=GCN --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck %s --check-prefix=GFX89 --check-prefix=GCN --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn %s 2>&1 | FileCheck %s --check-prefix=GFX67 --check-prefix=GCN --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s --check-prefix=GFX67 --check-prefix=GCN --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=fiji %s 2>&1 | FileCheck %s --check-prefix=GFX89 --check-prefix=GCN --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck %s --check-prefix=GFX89 --check-prefix=GCN --implicit-check-not=error:
v_add_f32_e64 v0, v1
// GCN: :[[@LINE-1]]:{{[0-9]+}}: error: too few operands for instruction
diff --git a/llvm/test/MC/AMDGPU/vop3-gfx10.s b/llvm/test/MC/AMDGPU/vop3-gfx10.s
index dc0e8579571e875..50810e82647b1a2 100644
--- a/llvm/test/MC/AMDGPU/vop3-gfx10.s
+++ b/llvm/test/MC/AMDGPU/vop3-gfx10.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck -check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck -check-prefix=GFX10 %s
v_mad_i16 v5, v1, 4.0, v3
// GFX10: v_mad_i16 v5, v1, 0x4400, v3 ; encoding: [0x05,0x00,0x5e,0xd7,0x01,0xff,0x0d,0x04,0x00,0x44,0x00,0x00]
diff --git a/llvm/test/MC/AMDGPU/vop3-gfx9.s b/llvm/test/MC/AMDGPU/vop3-gfx9.s
index c7fa8c2e14b4d85..b61f690d20233c8 100644
--- a/llvm/test/MC/AMDGPU/vop3-gfx9.s
+++ b/llvm/test/MC/AMDGPU/vop3-gfx9.s
@@ -1,11 +1,11 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck -check-prefix=SICI %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=hawaii -show-encoding %s | FileCheck -check-prefix=SICI %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefix=VI %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck --check-prefix=GFX9 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefixes=NOSICI,NOGCN --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=hawaii %s 2>&1 | FileCheck -check-prefixes=NOSICI,NOGCN --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefixes=NOVI,NOGCN --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck -check-prefix=NOGFX9 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck -check-prefix=SICI %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=hawaii -show-encoding %s | FileCheck -check-prefix=SICI %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefix=VI %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck --check-prefix=GFX9 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefixes=NOSICI,NOGCN --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=hawaii %s 2>&1 | FileCheck -check-prefixes=NOSICI,NOGCN --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefixes=NOVI,NOGCN --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck -check-prefix=NOGFX9 --implicit-check-not=error: %s
v_lshl_add_u32 v1, v2, v3, v4
// GFX9: v_lshl_add_u32 v1, v2, v3, v4 ; encoding: [0x01,0x00,0xfd,0xd1,0x02,0x07,0x12,0x04]
diff --git a/llvm/test/MC/AMDGPU/vop3-literal.s b/llvm/test/MC/AMDGPU/vop3-literal.s
index 4b89d9f16a091cc..d97ded08769a4ec 100644
--- a/llvm/test/MC/AMDGPU/vop3-literal.s
+++ b/llvm/test/MC/AMDGPU/vop3-literal.s
@@ -1,7 +1,7 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck -check-prefix=GFX10 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=GFX9 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck -check-prefix=GFX10-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck -check-prefix=GFX9-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck -check-prefix=GFX10 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=GFX9 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck -check-prefix=GFX10-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck -check-prefix=GFX9-ERR --implicit-check-not=error: %s
v_bfe_u32 v0, 0x3039, v1, s1
// GFX10: v_bfe_u32 v0, 0x3039, v1, s1 ; encoding: [0x00,0x00,0x48,0xd5,0xff,0x02,0x06,0x00,0x39,0x30,0x00,0x00]
diff --git a/llvm/test/MC/AMDGPU/vop3-modifiers-err.s b/llvm/test/MC/AMDGPU/vop3-modifiers-err.s
index 1163e8ccbd6d40d..fc113874d7a72c2 100644
--- a/llvm/test/MC/AMDGPU/vop3-modifiers-err.s
+++ b/llvm/test/MC/AMDGPU/vop3-modifiers-err.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s 2>&1 | FileCheck --implicit-check-not=error: %s
//---------------------------------------------------------------------------//
// VOP3 Modifiers
diff --git a/llvm/test/MC/AMDGPU/vop3-modifiers.s b/llvm/test/MC/AMDGPU/vop3-modifiers.s
index 8c9767bda26ded7..aa86f84cfb23426 100644
--- a/llvm/test/MC/AMDGPU/vop3-modifiers.s
+++ b/llvm/test/MC/AMDGPU/vop3-modifiers.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
//---------------------------------------------------------------------------//
// VOP1/VOP3 F16
diff --git a/llvm/test/MC/AMDGPU/vop3-vop1-nosrc.s b/llvm/test/MC/AMDGPU/vop3-vop1-nosrc.s
index ae90d0dc3f60891..3b68d515ebcb775 100644
--- a/llvm/test/MC/AMDGPU/vop3-vop1-nosrc.s
+++ b/llvm/test/MC/AMDGPU/vop3-vop1-nosrc.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck %s --check-prefix=SICI
-// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefix=VI
+// RUN: llvm-mc -triple=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck %s --check-prefix=SICI
+// RUN: llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefix=VI
// XFAIL: *
// FIXME: We should be printing _e64 suffixes for these.
diff --git a/llvm/test/MC/AMDGPU/vop3.s b/llvm/test/MC/AMDGPU/vop3.s
index ae8f814e086ae75..27fcf5e1ba33728 100644
--- a/llvm/test/MC/AMDGPU/vop3.s
+++ b/llvm/test/MC/AMDGPU/vop3.s
@@ -1,14 +1,14 @@
-// RUN: not llvm-mc -arch=amdgcn -show-encoding %s | FileCheck %s --check-prefix=SICI
-// RUN: not llvm-mc -arch=amdgcn -mcpu=hawaii -show-encoding %s | FileCheck %s --check-prefix=CI --check-prefix=SICI
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefix=VI
+// RUN: not llvm-mc -triple=amdgcn -show-encoding %s | FileCheck %s --check-prefix=SICI
+// RUN: not llvm-mc -triple=amdgcn -mcpu=hawaii -show-encoding %s | FileCheck %s --check-prefix=CI --check-prefix=SICI
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefix=VI
// Make sure interp instructions disassemble regardless of lds bank count
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx810 -show-encoding %s | FileCheck %s --check-prefix=VI
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx810 -show-encoding %s | FileCheck %s --check-prefix=VI
-// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s --check-prefix=NOSI --check-prefix=NOSICI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=hawaii %s 2>&1 | FileCheck %s -check-prefix=NOCI --check-prefix=NOSICI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck %s --check-prefix=NOVI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx810 %s 2>&1 | FileCheck -check-prefix=NOVI --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn %s 2>&1 | FileCheck %s --check-prefix=NOSI --check-prefix=NOSICI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=hawaii %s 2>&1 | FileCheck %s -check-prefix=NOCI --check-prefix=NOSICI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s 2>&1 | FileCheck %s --check-prefix=NOVI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx810 %s 2>&1 | FileCheck -check-prefix=NOVI --implicit-check-not=error: %s
//===----------------------------------------------------------------------===//
// VOPC Instructions
diff --git a/llvm/test/MC/AMDGPU/vop3p-err.s b/llvm/test/MC/AMDGPU/vop3p-err.s
index 5eb3e8dc25bee25..549f8ee216d9cf5 100644
--- a/llvm/test/MC/AMDGPU/vop3p-err.s
+++ b/llvm/test/MC/AMDGPU/vop3p-err.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck -check-prefix=GFX9 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck -check-prefix=GFX9 --implicit-check-not=error: %s
// GFX9: :[[@LINE+1]]:25: error: invalid operand for instruction
v_pk_add_u16 v1, v2, v3 op_sel
diff --git a/llvm/test/MC/AMDGPU/vop3p.s b/llvm/test/MC/AMDGPU/vop3p.s
index 197da25734be92f..a84ada261abe89f 100644
--- a/llvm/test/MC/AMDGPU/vop3p.s
+++ b/llvm/test/MC/AMDGPU/vop3p.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=GFX9 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=GFX9 %s
//
// Test op_sel/op_sel_hi
//
diff --git a/llvm/test/MC/AMDGPU/vop_dpp.s b/llvm/test/MC/AMDGPU/vop_dpp.s
index eb6c9924ad5e8ed..b2251f5b3e33be6 100644
--- a/llvm/test/MC/AMDGPU/vop_dpp.s
+++ b/llvm/test/MC/AMDGPU/vop_dpp.s
@@ -1,11 +1,11 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefixes=VI,VI9
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s --check-prefixes=GFX9,VI9
-
-// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s --check-prefixes=NOSI,NOSICI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s --check-prefixes=NOSI,NOSICI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck %s --check-prefixes=NOSICI,NOCI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck %s --check-prefix=NOVI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck %s --check-prefix=NOGFX9 --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefixes=VI,VI9
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s --check-prefixes=GFX9,VI9
+
+// RUN: not llvm-mc -triple=amdgcn %s 2>&1 | FileCheck %s --check-prefixes=NOSI,NOSICI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s --check-prefixes=NOSI,NOSICI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck %s --check-prefixes=NOSICI,NOCI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s 2>&1 | FileCheck %s --check-prefix=NOVI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck %s --check-prefix=NOGFX9 --implicit-check-not=error:
//===----------------------------------------------------------------------===//
// Check dpp_ctrl values
diff --git a/llvm/test/MC/AMDGPU/vop_dpp_expr.s b/llvm/test/MC/AMDGPU/vop_dpp_expr.s
index 6ca3a0ee9d31c0d..280f4e5ff8d2525 100644
--- a/llvm/test/MC/AMDGPU/vop_dpp_expr.s
+++ b/llvm/test/MC/AMDGPU/vop_dpp_expr.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefix=VI9
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s --check-prefix=VI9
+// RUN: llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefix=VI9
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s --check-prefix=VI9
zero = 0
two = 2
diff --git a/llvm/test/MC/AMDGPU/vop_sdwa.s b/llvm/test/MC/AMDGPU/vop_sdwa.s
index 2d7a9ac0f19ccaf..6c8482aaddd994f 100644
--- a/llvm/test/MC/AMDGPU/vop_sdwa.s
+++ b/llvm/test/MC/AMDGPU/vop_sdwa.s
@@ -1,11 +1,11 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefixes=VI,GFX89
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s --check-prefixes=GFX9,GFX89
-
-// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s --check-prefixes=NOSI,NOSICI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s --check-prefixes=NOSI,NOSICI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck %s --check-prefixes=NOCI,NOSICI --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck %s --check-prefixes=NOVI,NOGFX89 --implicit-check-not=error:
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck %s --check-prefixes=NOGFX9,NOGFX89 --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefixes=VI,GFX89
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s --check-prefixes=GFX9,GFX89
+
+// RUN: not llvm-mc -triple=amdgcn %s 2>&1 | FileCheck %s --check-prefixes=NOSI,NOSICI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s --check-prefixes=NOSI,NOSICI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck %s --check-prefixes=NOCI,NOSICI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s 2>&1 | FileCheck %s --check-prefixes=NOVI,NOGFX89 --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck %s --check-prefixes=NOGFX9,NOGFX89 --implicit-check-not=error:
//---------------------------------------------------------------------------//
// Check SDWA operands
diff --git a/llvm/test/MC/AMDGPU/vopc-errs.s b/llvm/test/MC/AMDGPU/vopc-errs.s
index 469063d0ebdf7f3..316684b892662ca 100644
--- a/llvm/test/MC/AMDGPU/vopc-errs.s
+++ b/llvm/test/MC/AMDGPU/vopc-errs.s
@@ -1,6 +1,6 @@
-// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s 2>&1 | FileCheck --implicit-check-not=error: %s
// Force 32-bit encoding with non-vcc result
diff --git a/llvm/test/MC/AMDGPU/vopc-vi.s b/llvm/test/MC/AMDGPU/vopc-vi.s
index 91fb117867b13ba..28711d2bec8769b 100644
--- a/llvm/test/MC/AMDGPU/vopc-vi.s
+++ b/llvm/test/MC/AMDGPU/vopc-vi.s
@@ -1,6 +1,6 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s | FileCheck -check-prefix=VI %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefix=NOSICI --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=hawaii %s 2>&1 | FileCheck -check-prefix=NOSICI --implicit-check-not=error: %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=fiji -show-encoding %s | FileCheck -check-prefix=VI %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefix=NOSICI --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=hawaii %s 2>&1 | FileCheck -check-prefix=NOSICI --implicit-check-not=error: %s
v_cmp_class_f16 vcc, v2, v4
// VI: v_cmp_class_f16_e32 vcc, v2, v4 ; encoding: [0x02,0x09,0x28,0x7c]
diff --git a/llvm/test/MC/AMDGPU/vopc.s b/llvm/test/MC/AMDGPU/vopc.s
index fb95abdf8dda99f..55289c0a463fa97 100644
--- a/llvm/test/MC/AMDGPU/vopc.s
+++ b/llvm/test/MC/AMDGPU/vopc.s
@@ -1,6 +1,6 @@
-// RUN: llvm-mc -arch=amdgcn -show-encoding %s | FileCheck %s --check-prefix=SICI
-// RUN: llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck %s --check-prefix=SICI
-// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefix=VI
+// RUN: llvm-mc -triple=amdgcn -show-encoding %s | FileCheck %s --check-prefix=SICI
+// RUN: llvm-mc -triple=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck %s --check-prefix=SICI
+// RUN: llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefix=VI
//===----------------------------------------------------------------------===//
// Generic Checks
diff --git a/llvm/test/MC/AMDGPU/wave32.s b/llvm/test/MC/AMDGPU/wave32.s
index b707bfc4c37427d..c52693076e2c5ee 100644
--- a/llvm/test/MC/AMDGPU/wave32.s
+++ b/llvm/test/MC/AMDGPU/wave32.s
@@ -1,7 +1,7 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck -check-prefix=GFX1032 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck -check-prefix=GFX1064 %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck -check-prefix=GFX1032-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck -check-prefix=GFX1064-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck -check-prefix=GFX1032 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck -check-prefix=GFX1064 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck -check-prefix=GFX1032-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck -check-prefix=GFX1064-ERR --implicit-check-not=error: %s
v_cmp_ge_i32_e32 s0, v0
// GFX1032: v_cmp_ge_i32_e32 vcc_lo, s0, v0 ; encoding: [0x00,0x00,0x0c,0x7d]
diff --git a/llvm/test/MC/AMDGPU/wave_any.s b/llvm/test/MC/AMDGPU/wave_any.s
index e5b014049c7367f..825a0abc1722400 100644
--- a/llvm/test/MC/AMDGPU/wave_any.s
+++ b/llvm/test/MC/AMDGPU/wave_any.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
v_cmp_ge_i32_e32 s0, v0
// GFX10: v_cmp_ge_i32_e32 vcc, s0, v0 ; encoding: [0x00,0x00,0x0c,0x7d]
diff --git a/llvm/test/MC/AMDGPU/xdl-insts-err.s b/llvm/test/MC/AMDGPU/xdl-insts-err.s
index a5083ed1a3a179a..22f0e03f9f3f5eb 100644
--- a/llvm/test/MC/AMDGPU/xdl-insts-err.s
+++ b/llvm/test/MC/AMDGPU/xdl-insts-err.s
@@ -1,5 +1,5 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx906 %s 2>&1 | FileCheck --check-prefix=GFX906-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx908 %s 2>&1 | FileCheck --check-prefix=GFX908-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx906 %s 2>&1 | FileCheck --check-prefix=GFX906-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx908 %s 2>&1 | FileCheck --check-prefix=GFX908-ERR --implicit-check-not=error: %s
// GFX906-ERR: :[[@LINE+1]]:{{[0-9]+}}: error: instruction not supported on this GPU
v_dot2c_f32_f16 v0, v1, v2
diff --git a/llvm/test/MC/AMDGPU/xdl-insts-gfx1011-gfx1012.s b/llvm/test/MC/AMDGPU/xdl-insts-gfx1011-gfx1012.s
index 312acb78ac3d6d7..d06373d44dc5bb9 100644
--- a/llvm/test/MC/AMDGPU/xdl-insts-gfx1011-gfx1012.s
+++ b/llvm/test/MC/AMDGPU/xdl-insts-gfx1011-gfx1012.s
@@ -1,5 +1,5 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1011 -show-encoding %s | FileCheck %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1012 -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1011 -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1012 -show-encoding %s | FileCheck %s
v_dot2c_f32_f16_e32 v5, v1, v2
// CHECK: encoding: [0x01,0x05,0x0a,0x04]
diff --git a/llvm/test/MC/AMDGPU/xdl-insts-gfx908.s b/llvm/test/MC/AMDGPU/xdl-insts-gfx908.s
index 22a1f1316ea24e4..be2041454b10c88 100644
--- a/llvm/test/MC/AMDGPU/xdl-insts-gfx908.s
+++ b/llvm/test/MC/AMDGPU/xdl-insts-gfx908.s
@@ -1,6 +1,6 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx908 -show-encoding %s | FileCheck %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx90a -show-encoding %s | FileCheck %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx940 -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx908 -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx90a -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx940 -show-encoding %s | FileCheck %s
// CHECK: encoding: [0x01,0x05,0x0a,0x6e]
v_dot2c_f32_f16 v5, v1, v2
diff --git a/llvm/test/MC/AMDGPU/xnack-mask.s b/llvm/test/MC/AMDGPU/xnack-mask.s
index e10b167bd49377f..1a07e921f750354 100644
--- a/llvm/test/MC/AMDGPU/xnack-mask.s
+++ b/llvm/test/MC/AMDGPU/xnack-mask.s
@@ -1,10 +1,10 @@
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefix=NOSICIVI10 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=hawaii %s 2>&1 | FileCheck -check-prefix=NOSICIVI10 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=NOSICIVI10 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1001 -mattr=-xnack %s 2>&1 | FileCheck -check-prefix=NOSICIVI10 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefix=NOSICIVI10 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=hawaii %s 2>&1 | FileCheck -check-prefix=NOSICIVI10 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=NOSICIVI10 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1001 -mattr=-xnack %s 2>&1 | FileCheck -check-prefix=NOSICIVI10 --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=stoney -mattr=+xnack %s 2>&1 | FileCheck -check-prefix=XNACKERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=stoney -mattr=+xnack -show-encoding %s | FileCheck -check-prefix=XNACK %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=stoney -mattr=+xnack %s 2>&1 | FileCheck -check-prefix=XNACKERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=stoney -mattr=+xnack -show-encoding %s | FileCheck -check-prefix=XNACK %s
s_mov_b64 xnack_mask, -1
// NOSICIVI10: :[[@LINE-1]]:{{[0-9]+}}: error: register not available on this GPU
diff --git a/llvm/test/MC/Disassembler/AMDGPU/buf_fmt_packed_d16.txt b/llvm/test/MC/Disassembler/AMDGPU/buf_fmt_packed_d16.txt
index a7599f29fa0a621..355758175699762 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/buf_fmt_packed_d16.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/buf_fmt_packed_d16.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx810 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=PACKED
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=PACKED
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx810 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=PACKED
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=PACKED
# PACKED: buffer_load_format_d16_x v1, off, s[4:7], s1 ; encoding: [0x00,0x00,0x20,0xe0,0x00,0x01,0x01,0x01]
0x00,0x00,0x20,0xe0,0x00,0x01,0x01,0x01
diff --git a/llvm/test/MC/Disassembler/AMDGPU/buf_fmt_unpacked_d16.txt b/llvm/test/MC/Disassembler/AMDGPU/buf_fmt_unpacked_d16.txt
index 9c78e97c8e3ca41..be688136187d553 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/buf_fmt_unpacked_d16.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/buf_fmt_unpacked_d16.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=fiji -disassemble -show-encoding < %s | FileCheck %s -check-prefix=UNPACKED
+# RUN: llvm-mc -triple=amdgcn -mcpu=fiji -disassemble -show-encoding < %s | FileCheck %s -check-prefix=UNPACKED
# UNPACKED: buffer_load_format_d16_x v1, off, s[4:7], s1 ; encoding: [0x00,0x00,0x20,0xe0,0x00,0x01,0x01,0x01]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/decode-err.txt b/llvm/test/MC/Disassembler/AMDGPU/decode-err.txt
index 346996938633e46..8da7e5ac2d88b38 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/decode-err.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/decode-err.txt
@@ -1,6 +1,6 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s 2>&1 | FileCheck -check-prefix=GCN %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s 2>&1 | FileCheck -check-prefixes=GFX11,W32 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s 2>&1 | FileCheck -check-prefixes=GFX11,W64 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s 2>&1 | FileCheck -check-prefix=GCN %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s 2>&1 | FileCheck -check-prefixes=GFX11,W32 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s 2>&1 | FileCheck -check-prefixes=GFX11,W64 %s
# GCN: warning: invalid instruction encoding
0xdf,0x00,0x00,0x02
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10-null-reg.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10-null-reg.txt
index b7e9d574e142a77..66df0c2de2590d9 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10-null-reg.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10-null-reg.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding --disassemble < %s | FileCheck -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -show-encoding --disassemble < %s | FileCheck -check-prefix=GFX10 %s
0x7d,0x04,0x00,0x10
# GFX10: v_mul_f32_e32 v0, null, v2 ; encoding: [0x7d,0x04,0x00,0x10]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10-sgpr-max.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10-sgpr-max.txt
index 70a92e9100087f2..37312bf06762c14 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10-sgpr-max.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10-sgpr-max.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
# GFX10: v_mov_b32_e32 v0, s105 ; encoding: [0x69,0x02,0x00,0x7e]
0x69,0x02,0x00,0x7e
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10-vop2be-literal.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10-vop2be-literal.txt
index b28a1a71eeb9d86..a50b0ae76cbaade 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10-vop2be-literal.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10-vop2be-literal.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
# GFX10: v_add_co_ci_u32_e32 v3, vcc_lo, 0x3039, v3, vcc_lo ; encoding: [0xff,0x06,0x06,0x50,0x39,0x30,0x00,0x00]
0xff,0x06,0x06,0x50,0x39,0x30,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10-vop3-literal.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10-vop3-literal.txt
index 51f72a718804770..015ce3e963fb31e 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10-vop3-literal.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10-vop3-literal.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
# GFX10: v_bfe_u32 v0, 0x3039, v1, s1 ; encoding: [0x00,0x00,0x48,0xd5,0xff,0x02,0x06,0x00,0x39,0x30,0x00,0x00]
0x00,0x00,0x48,0xd5,0xff,0x02,0x06,0x00,0x39,0x30,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10-wave32.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10-wave32.txt
index 790c2931a67e66b..7d15f041bd770e1 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10-wave32.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10-wave32.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX1032 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize64,-wavefrontsize32 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX1064 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX1032 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize64,-wavefrontsize32 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX1064 %s
# GFX1032: v_cmp_lt_f32_e32 vcc_lo, s2, v4
# GFX1064: v_cmp_lt_f32_e32 vcc, s2, v4
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx1011-xdl-insts.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx1011-xdl-insts.txt
index 2f2fd81e0c21d19..914b6a7db7ddeb3 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx1011-xdl-insts.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx1011-xdl-insts.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1011 -disassemble -show-encoding < %s | FileCheck %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1012 -disassemble -show-encoding < %s | FileCheck %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1011 -disassemble -show-encoding < %s | FileCheck %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1012 -disassemble -show-encoding < %s | FileCheck %s
# CHECK: v_dot2c_f32_f16_e32 v5, v1, v2 ; encoding: [0x01,0x05,0x0a,0x04]
0x01,0x05,0x0a,0x04
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx1011_dlops.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx1011_dlops.txt
index 41406aba22b754b..972673542f4cea9 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx1011_dlops.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx1011_dlops.txt
@@ -1,12 +1,12 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1011 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1012 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1030 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1031 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1032 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1033 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1034 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1035 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1036 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1011 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1012 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1030 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1031 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1032 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1033 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1034 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1035 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1036 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
# GFX10: v_dot2_f32_f16 v0, v1, v2, v3 ; encoding: [0x00,0x40,0x13,0xcc,0x01,0x05,0x0e,0x1c]
0x00,0x40,0x13,0xcc,0x01,0x05,0x0e,0x1c
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx1030_new.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx1030_new.txt
index cdd7eeabf2fb56e..129f70d2914018a 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx1030_new.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx1030_new.txt
@@ -1,10 +1,10 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1030 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1031 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1032 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1033 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1034 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1035 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1036 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1030 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1031 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1032 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1033 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1034 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1035 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1036 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
# GFX10: global_load_dword_addtid v1, s[2:3] offset:16
0x10,0x80,0x58,0xdc,0x00,0x00,0x02,0x01
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_ds.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_ds.txt
index 8433882ac279cd4..b57ea682aaeafab 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_ds.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_ds.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
# GFX10: ds_add_f32 v0, v1 ; encoding: [0x00,0x00,0x54,0xd8,0x00,0x01,0x00,0x00]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_exp.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_exp.txt
index 2bca44369014206..0fe4fc8d5b15f40 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_exp.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_exp.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GXF10
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GXF10
# GXF10: exp mrt0 v1, v2, v3, v4 ; encoding: [0x0f,0x00,0x00,0xf8,0x01,0x02,0x03,0x04]
0x0f,0x00,0x00,0xf8,0x01,0x02,0x03,0x04
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_flat.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_flat.txt
index aabd9de2a3b2bad..9754b8c597a17e0 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_flat.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_flat.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
#===------------------------------------------------------------------------===#
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_mimg.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_mimg.txt
index 481a3184509b2d3..8f3da34ea24739a 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_mimg.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_mimg.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX10 %s
#===------------------------------------------------------------------------===#
# MIMG, regular address
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_mtbuf.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_mtbuf.txt
index 4007c5f0dea703b..950ce783baba2e4 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_mtbuf.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_mtbuf.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GFX10
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GFX10
# GFX10: tbuffer_load_format_d16_x v0, off, s[0:3], 0 format:[BUF_FMT_32_FLOAT]
0x00,0x00,0xb0,0xe8,0x00,0x00,0x20,0x80
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_mubuf.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_mubuf.txt
index caf4546e94cfd8c..6fbe77e43ad4288 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_mubuf.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_mubuf.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
# GFX10: buffer_atomic_add v255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0xc8,0xe0,0x00,0xff,0x02,0x03]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_smem.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_smem.txt
index f2fbac05abffd24..0417f94353be05b 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_smem.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_smem.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
# GFX10: s_atc_probe 7, s[4:5], 0x64 ; encoding: [0xc2,0x01,0x98,0xf4,0x64,0x00,0x00,0xfa]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_sop1.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_sop1.txt
index 684cdc07d2da6c3..b5578bb4fd200dd 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_sop1.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_sop1.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
# GFX10: s_abs_i32 exec_hi, s1 ; encoding: [0x01,0x34,0xff,0xbe]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_sop2.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_sop2.txt
index fdcb28ab55a3f82..85e1de86513a1e1 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_sop2.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_sop2.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
# GFX10: s_abs
diff _i32 exec_hi, s1, s2 ; encoding: [0x01,0x02,0x7f,0x96]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_sopc.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_sopc.txt
index e2207a19a2b68c9..baa5c5f06a1ff78 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_sopc.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_sopc.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
# GFX10: s_bitcmp0_b32 exec_hi, s1 ; encoding: [0x7f,0x01,0x0c,0xbf]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_sopk.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_sopk.txt
index 7b3c591dc0f8579..1878f8b4672276e 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_sopk.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_sopk.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
# GFX10: s_addk_i32 exec_hi, 0x1234 ; encoding: [0x34,0x12,0xff,0xb7]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_sopp.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_sopp.txt
index 874f6f6b3cf175a..8022439c72d528c 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_sopp.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_sopp.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
# GFX10: s_barrier ; encoding: [0x00,0x00,0x8a,0xbf]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1.txt
index 5804f498cb3e84f..ee1114f4ab32ba7 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
# GFX10: v_bfrev_b32_e32 v255, v1 ; encoding: [0x01,0x71,0xfe,0x7f]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1_dpp16.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1_dpp16.txt
index 54b9abea720b4ef..d80b2dd748281bb 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1_dpp16.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1_dpp16.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
# GFX10: v_bfrev_b32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x70,0xfe,0x7f,0x01,0xe4,0x00,0x00]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1_dpp8.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1_dpp8.txt
index b520dcfe918b73c..b354990ddfdefbc 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1_dpp8.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1_dpp8.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX10 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX10 %s
# GFX10: v_mov_b32_dpp v5, v1 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x02,0x0a,0x7e,0x01,0x88,0xc6,0xfa]
0xe9,0x02,0x0a,0x7e,0x01,0x88,0xc6,0xfa
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1_sdwa.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1_sdwa.txt
index c7eaee952326e72..0739ba3973f3439 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1_sdwa.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1_sdwa.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
# GFX10: v_bfrev_b32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD ; encoding: [0xf9,0x70,0xfe,0x7f,0x01,0x06,0x06,0x00]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop2.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop2.txt
index 80e7a3f94ec0638..b759912204db82b 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop2.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop2.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefixes=GFX10,W32 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefixes=GFX10,W64 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefixes=GFX10,W32 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefixes=GFX10,W64 %s
# W32: v_add_co_ci_u32_e32 v255, vcc_lo, v1, v2, vcc_lo ; encoding: [0x01,0x05,0xfe,0x51]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop2_dpp16.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop2_dpp16.txt
index 998ef19dca75c16..0d098496af09154 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop2_dpp16.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop2_dpp16.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefixes=GFX10,W32 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefixes=GFX10,W64 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefixes=GFX10,W32 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefixes=GFX10,W64 %s
# GFX10: v_add_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x65,0x01,0xe4,0x00,0x00]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop2_dpp8.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop2_dpp8.txt
index cee1163a9f0523c..819a27647c1bae9 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop2_dpp8.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop2_dpp8.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX10,W32 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX10,W64 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX10,W32 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX10,W64 %s
# GFX10: v_add_f32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x06,0x01,0x88,0xc6,0xfa]
0xe9,0x04,0x0a,0x06,0x01,0x88,0xc6,0xfa
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop2_sdwa.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop2_sdwa.txt
index 474640471018e2f..3dece53d48d29e2 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop2_sdwa.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop2_sdwa.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefixes=GFX10,W32 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefixes=GFX10,W64 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefixes=GFX10,W32 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefixes=GFX10,W64 %s
# W32: v_add_co_ci_u32_sdwa v255, vcc_lo, v1, v2, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0xfe,0x51,0x01,0x06,0x06,0x06]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3.txt
index 0785ba2ea2eb6e0..4c0170ca4e4747c 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefixes=GFX10,W32 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefixes=GFX10,W64 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefixes=GFX10,W32 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefixes=GFX10,W64 %s
# GFX10: v_add3_u32 v255, v1, v2, v3 ; encoding: [0xff,0x00,0x6d,0xd7,0x01,0x05,0x0e,0x04]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3c.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3c.txt
index 66b69e7c7c1f2a6..f682c5aa65b1617 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3c.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3c.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=W32 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=W64 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=W32 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=W64 %s
# W32: v_cmp_class_f32_e64 s10, -1, v2 ; encoding: [0x0a,0x00,0x88,0xd4,0xc1,0x04,0x02,0x00]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3cx.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3cx.txt
index b76ad301a6e3382..d70f07dd835d718 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3cx.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3cx.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
# GFX10: v_cmpx_class_f16_e64 -1, v2 ; encoding: [0x7e,0x00,0x9f,0xd4,0xc1,0x04,0x02,0x00]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3p_literalv216.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3p_literalv216.txt
index b124281903faca1..e42d0de5db86f78 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3p_literalv216.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3p_literalv216.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -disassemble -show-encoding %s | FileCheck -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -disassemble -show-encoding %s | FileCheck -check-prefix=GFX10 %s
#===----------------------------------------------------------------------===//
# Inline constants
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vopc.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vopc.txt
index e6a019a47239c38..3aeb21349f6f066 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vopc.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vopc.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=W32 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=W64 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=W32 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=W64 %s
# W32: v_cmp_class_f32_e32 vcc_lo, -1, v2 ; encoding: [0xc1,0x04,0x10,0x7d]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vopc_sdwa.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vopc_sdwa.txt
index 3e04f424e64fa04..5b9ff0333e98a14 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vopc_sdwa.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vopc_sdwa.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=W32 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=W64 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=W32 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=W64 %s
# W32: v_cmp_class_f32_sdwa s100, v1, v2 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x10,0x7d,0x01,0xe4,0x06,0x06]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vopcx.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vopcx.txt
index d41dc9992e5875f..4ed855b97453d25 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vopcx.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vopcx.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
# GFX10: v_cmpx_class_f16_e32 -1, v2 ; encoding: [0xc1,0x04,0x3e,0x7d]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vopcx_sdwa.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vopcx_sdwa.txt
index 01973a89ba63ef6..c94d883fcf9131a 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vopcx_sdwa.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vopcx_sdwa.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
# GFX10: v_cmpx_eq_f16_sdwa -v1, v2 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0xb4,0x7d,0x01,0x00,0x16,0x06]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_ds.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_ds.txt
index 0d2129a85248bfc..5c4f5829cdaf1de 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_ds.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_ds.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
# GFX11: ds_add_f32 v0, v1 ; encoding: [0x00,0x00,0x54,0xd8,0x00,0x01,0x00,0x00]
0x00,0x00,0x54,0xd8,0x00,0x01,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_exp.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_exp.txt
index ffdd30597ddd821..fae271b2fc7cf82 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_exp.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_exp.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s -check-prefix=GFX11
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s -check-prefix=GFX11
# GFX11: exp dual_src_blend0 v4, v3, v2, v1 ; encoding: [0x5f,0x01,0x00,0xf8,0x04,0x03,0x02,0x01]
0x5f,0x01,0x00,0xf8,0x04,0x03,0x02,0x01
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_flat.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_flat.txt
index a2ee4b4d24df14b..e83fbe31801f8aa 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_flat.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_flat.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GFX11
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GFX11
#===------------------------------------------------------------------------===#
# FLAT
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_ldsdir.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_ldsdir.txt
index 274dc960124f269..018af4646c1f9c1 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_ldsdir.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_ldsdir.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
# GFX11: lds_direct_load v10 wait_vdst:6 ; encoding: [0x0a,0x00,0x16,0xce]
0x0a,0x00,0x16,0xce
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_mimg.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_mimg.txt
index 8461a5ebfceb8bb..969279877af24b2 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_mimg.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_mimg.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck %s --check-prefix=GFX11
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck %s --check-prefix=GFX11
# GFX11: image_atomic_add v[1:2], v2, s[12:19] dmask:0x3 dim:SQ_RSRC_IMG_1D unorm ; encoding: [0x80,0x03,0x30,0xf0,0x02,0x01,0x03,0x00]
0x80,0x03,0x30,0xf0,0x02,0x01,0x03,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_mimg_features.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_mimg_features.txt
index d8183142775affd..46488a9aa4ec704 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_mimg_features.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_mimg_features.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11 %s
# GFX11: image_load v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm ; encoding: [0x80,0x0f,0x00,0xf0,0x00,0x00,0x00,0x00]
0x80,0x0f,0x00,0xf0,0x00,0x00,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_mtbuf.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_mtbuf.txt
index f844df8d3d17bf2..d28c996044836a2 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_mtbuf.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_mtbuf.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11 %s
# GFX11: tbuffer_load_d16_format_x v4, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x0c,0xe8,0x00,0x04,0x02,0x03]
0xff,0x0f,0x0c,0xe8,0x00,0x04,0x02,0x03
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_mubuf.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_mubuf.txt
index 752a60366c57a72..f231b1bb07a4341 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_mubuf.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_mubuf.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11 %s
# GFX11: buffer_gl0_inv ; encoding: [0x00,0x00,0xac,0xe0,0x00,0x00,0x00,0x00]
0x00,0x00,0xac,0xe0,0x00,0x00,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_smem.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_smem.txt
index 2a1f8e2b736682e..83f6a3da3ad7b43 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_smem.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_smem.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
# GFX11: s_atc_probe 7, s[4:5], 0x64 ; encoding: [0xc2,0x01,0x88,0xf4,0x64,0x00,0x00,0xf8]
0xc2,0x01,0x88,0xf4,0x64,0x00,0x00,0xf8
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sop1.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sop1.txt
index e4ea924d6c90c3f..fbb95450dbbe2f2 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sop1.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sop1.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
# GFX11: s_abs_i32 exec_hi, s1 ; encoding: [0x01,0x15,0xff,0xbe]
0x01,0x15,0xff,0xbe
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sop2.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sop2.txt
index d24a22e8baa2c9c..e57648235df620e 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sop2.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sop2.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
# GFX11: s_abs
diff _i32 exec_hi, s1, s2 ; encoding: [0x01,0x02,0x7f,0x83]
0x01,0x02,0x7f,0x83
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sopc.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sopc.txt
index 439bc3529459fc5..af2905f14dd0161 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sopc.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sopc.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
# GFX11: s_bitcmp0_b32 exec_hi, s1 ; encoding: [0x7f,0x01,0x0c,0xbf]
0x7f,0x01,0x0c,0xbf
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sopk.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sopk.txt
index 7f6329bf2a3110c..f1717bd92832ed3 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sopk.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sopk.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
# GFX11: s_addk_i32 exec_hi, 0x1234 ; encoding: [0x34,0x12,0xff,0xb7]
0x34,0x12,0xff,0xb7
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sopp.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sopp.txt
index 098a68ff48d31b6..3b122c834b8755b 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sopp.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sopp.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
# GFX11: s_barrier ; encoding: [0x00,0x00,0xbd,0xbf]
0x00,0x00,0xbd,0xbf
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vinterp.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vinterp.txt
index a0b098ddbd6da03..da1f129fcf40e73 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vinterp.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vinterp.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble %s | FileCheck -strict-whitespace -check-prefix=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble %s | FileCheck -strict-whitespace -check-prefix=GFX11 %s
# GFX11: v_interp_p10_f32 v0, v1, v2, v3{{$}}
0x00,0x00,0x00,0xcd,0x01,0x05,0x0e,0x04
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1.txt
index 583d61fe80ecc20..7156fb19d2bb052 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
# GFX11: v_bfrev_b32_e32 v5, v1 ; encoding: [0x01,0x71,0x0a,0x7e]
0x01,0x71,0x0a,0x7e
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1_dpp16.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1_dpp16.txt
index f3251954f9e10f8..8758305258387cc 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1_dpp16.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1_dpp16.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
# GFX11: v_bfrev_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x70,0x0a,0x7e,0x01,0x1b,0x00,0xff]
0xfa,0x70,0x0a,0x7e,0x01,0x1b,0x00,0xff
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1_dpp8.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1_dpp8.txt
index 0e4e8fc49023516..a3531410ac401f1 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1_dpp8.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1_dpp8.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
# GFX11: v_bfrev_b32_dpp v5, v1 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x70,0x0a,0x7e,0x01,0x77,0x39,0x05]
0xe9,0x70,0x0a,0x7e,0x01,0x77,0x39,0x05
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2.txt
index 2fcae1c4a119ece..146db5a923a2506 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W32 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W64 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W32 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W64 %s
# W32: v_add_co_ci_u32_e32 v5, vcc_lo, v1, v2, vcc_lo ; encoding: [0x01,0x05,0x0a,0x40]
# W64: v_add_co_ci_u32_e32 v5, vcc, v1, v2, vcc ; encoding: [0x01,0x05,0x0a,0x40]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2_dpp16.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2_dpp16.txt
index 7f80bf637f3cc91..dd41cfa2a10455b 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2_dpp16.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2_dpp16.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W32 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W64 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W32 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W64 %s
# W32: v_add_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x1b,0x00,0xff]
# W64: v_add_co_ci_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x1b,0x00,0xff]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2_dpp8.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2_dpp8.txt
index 1bdd77d2651b3ae..97f9b67b4eea318 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2_dpp8.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2_dpp8.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W32 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W64 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W32 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W64 %s
# W32: v_add_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x0a,0x40,0x01,0x77,0x39,0x05]
# W64: v_add_co_ci_u32_dpp v5, vcc, v1, v2, vcc dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x0a,0x40,0x01,0x77,0x39,0x05]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3.txt
index cc6c48a059c47f9..7674c02185b5f23 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W32 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W64 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W32 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W64 %s
# GFX11: v_add3_u32 v5, v1, v2, s3 ; encoding: [0x05,0x00,0x55,0xd6,0x01,0x05,0x0e,0x00]
0x05,0x00,0x55,0xd6,0x01,0x05,0x0e,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16.txt
index e9da1905f177fbe..8b4dca4f5bd11ef 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W32 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W64 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W32 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W64 %s
# GFX11: v_add3_u32_e64_dpp v5, v1, v2, v3 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x55,0xd6,0xfa,0x04,0x0e,0x04,0x01,0x1b,0x00,0xff]
0x05,0x00,0x55,0xd6,0xfa,0x04,0x0e,0x04,0x01,0x1b,0x00,0xff
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vop1.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vop1.txt
index 19a5c3611833799..cf29efa5ff56bb1 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vop1.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vop1.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11 %s
# GFX11: v_bfrev_b32_e64_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0xb8,0xd5,0xfa,0x00,0x00,0x00,0x01,0x1b,0x00,0xff]
0x05,0x00,0xb8,0xd5,0xfa,0x00,0x00,0x00,0x01,0x1b,0x00,0xff
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vop2.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vop2.txt
index 69a7122e438317e..a0838e09bf4578e 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vop2.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vop2.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W32 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W64 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W32 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W64 %s
# W32: v_add_co_ci_u32_e64_dpp v5, s12, v1, v2, s6 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x0c,0x20,0xd5,0xfa,0x04,0x1a,0x00,0x01,0x1b,0x00,0xff]
# W64: v_add_co_ci_u32_e64_dpp v5, s[12:13], v1, v2, s[6:7] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x0c,0x20,0xd5,0xfa,0x04,0x1a,0x00,0x01,0x1b,0x00,0xff]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vopc.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vopc.txt
index 480aacaaafb90fc..4575418801c5ca7 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vopc.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vopc.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W32 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W64 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W32 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W64 %s
# W32: v_cmp_class_f16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x7d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
# W64: v_cmp_class_f16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x7d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vopcx.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vopcx.txt
index 6ee9669f5378433..26168974198e885 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vopcx.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vopcx.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11 %s
# GFX11: v_cmpx_class_f16_e64_dpp v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x7e,0x00,0xfd,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
0x7e,0x00,0xfd,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8.txt
index f91216a7469c54d..78470d4707494d9 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W32 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W64 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W32 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W64 %s
# GFX11: v_add3_u32_e64_dpp v5, v1, v2, v3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x55,0xd6,0xe9,0x04,0x0e,0x04,0x01,0x77,0x39,0x05]
0x05,0x00,0x55,0xd6,0xe9,0x04,0x0e,0x04,0x01,0x77,0x39,0x05
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vop1.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vop1.txt
index 4ea57003eeeb93c..bfda6d10c2f6d47 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vop1.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vop1.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11 %s
# GFX11: v_bfrev_b32_e64_dpp v5, v1 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0xb8,0xd5,0xe9,0x00,0x00,0x00,0x01,0x77,0x39,0x05]
0x05,0x00,0xb8,0xd5,0xe9,0x00,0x00,0x00,0x01,0x77,0x39,0x05
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vop2.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vop2.txt
index f0165884ba71feb..5aa68cba4a393c3 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vop2.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vop2.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W32 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W64 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W32 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W64 %s
# W32: v_add_co_ci_u32_e64_dpp v5, s12, v1, v2, s6 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x0c,0x20,0xd5,0xe9,0x04,0x1a,0x00,0x01,0x77,0x39,0x05]
# W64: v_add_co_ci_u32_e64_dpp v5, s[12:13], v1, v2, s[6:7] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x0c,0x20,0xd5,0xe9,0x04,0x1a,0x00,0x01,0x77,0x39,0x05]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vopc.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vopc.txt
index a682f2a886ea2b6..5f21c9b92f6f879 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vopc.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vopc.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W32 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W64 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W32 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W64 %s
# W32: v_cmp_class_f16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x7d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
# W64: v_cmp_class_f16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x7d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vopcx.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vopcx.txt
index 09f92517f545fc0..70ece76fcc9e180 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vopcx.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vopcx.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11 %s
# GFX11: v_cmpx_class_f16_e64_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7e,0x00,0xfd,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
0x7e,0x00,0xfd,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop1.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop1.txt
index cba7fa924be2c4f..770e3c6e7a6f309 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop1.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop1.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11 %s
# GFX11: v_bfrev_b32_e64 v5, v1 ; encoding: [0x05,0x00,0xb8,0xd5,0x01,0x01,0x00,0x00]
0x05,0x00,0xb8,0xd5,0x01,0x01,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2.txt
index 3141e8f4b2cbbaa..503d644b61b5818 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W32 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W64 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W32 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W64 %s
# W32: v_add_co_ci_u32_e64 v5, s12, v1, 0xaf123456, s6 ; encoding: [0x05,0x0c,0x20,0xd5,0x01,0xff,0x19,0x00,0x56,0x34,0x12,0xaf]
# W64: v_add_co_ci_u32_e64 v5, s[12:13], v1, 0xaf123456, s[6:7] ; encoding: [0x05,0x0c,0x20,0xd5,0x01,0xff,0x19,0x00,0x56,0x34,0x12,0xaf]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopc.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopc.txt
index 8952c8c4aabd94c..f4a8b99a45f464d 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopc.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopc.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W32 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W64 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W32 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W64 %s
# W32: v_cmp_class_f16_e64 s10, v1, v2 ; encoding: [0x0a,0x00,0x7d,0xd4,0x01,0x05,0x02,0x00]
# W64: v_cmp_class_f16_e64 s[10:11], v1, v2 ; encoding: [0x0a,0x00,0x7d,0xd4,0x01,0x05,0x02,0x00]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopcx.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopcx.txt
index d300bc4d2056642..555a6aa6a0fbb74 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopcx.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopcx.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11 %s
# GFX11: v_cmpx_class_f16_e64 v1, v2 ; encoding: [0x7e,0x00,0xfd,0xd4,0x01,0x05,0x02,0x00]
0x7e,0x00,0xfd,0xd4,0x01,0x05,0x02,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3p.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3p.txt
index 9f146b8818c44c8..bc2cb5f06c4f496 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3p.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3p.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
# GFX11: v_dot2_f32_bf16 v5, v1, v2, v3 ; encoding: [0x05,0x40,0x1a,0xcc,0x01,0x05,0x0e,0x1c]
0x05,0x40,0x1a,0xcc,0x01,0x05,0x0e,0x1c
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3p_dpp16.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3p_dpp16.txt
index 8f14b1033e87523..6b230367c8313f8 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3p_dpp16.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3p_dpp16.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
# GFX11: v_dot2_f32_f16_e64_dpp v0, v1, v2, v3 neg_lo:[1,1,0] neg_hi:[1,0,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xe ; encoding: [0x00,0x05,0x13,0xcc,0xfa,0x04,0x0e,0x64,0x01,0x1b,0x00,0xfe]
0x00,0x05,0x13,0xcc,0xfa,0x04,0x0e,0x64,0x01,0x1b,0x00,0xfe
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3p_dpp8.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3p_dpp8.txt
index 60066f4babb0927..89c9b54d7cfeec4 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3p_dpp8.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3p_dpp8.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
# GFX11: v_dot2_f32_f16_e64_dpp v0, v1, v2, v3 neg_lo:[0,1,1] neg_hi:[1,0,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x00,0x05,0x13,0xcc,0xe9,0x04,0x0e,0xc4,0x01,0x77,0x39,0x05]
0x00,0x05,0x13,0xcc,0xe9,0x04,0x0e,0xc4,0x01,0x77,0x39,0x05
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc.txt
index f4f3801bcc30dea..f426c1cd7e79f97 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck %s --check-prefix=W32
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck %s --check-prefix=W64
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck %s --check-prefix=W32
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck %s --check-prefix=W64
# W32: v_cmp_class_f16_e32 vcc_lo, v1, v2 ; encoding: [0x01,0x05,0xfa,0x7c]
# W64: v_cmp_class_f16_e32 vcc, v1, v2 ; encoding: [0x01,0x05,0xfa,0x7c]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc_dpp16.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc_dpp16.txt
index bfd23afbe81033e..59d635bbe2bf327 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc_dpp16.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc_dpp16.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck %s --check-prefix=W32
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck %s --check-prefix=W64
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck %s --check-prefix=W32
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck %s --check-prefix=W64
# W32: v_cmp_class_f16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0xfa,0x7c,0x01,0x1b,0x00,0xff]
# W64: v_cmp_class_f16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0xfa,0x7c,0x01,0x1b,0x00,0xff]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc_dpp8.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc_dpp8.txt
index 69aab1d4f41dc08..29a55cb70dc4839 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc_dpp8.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc_dpp8.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck %s --check-prefix=W32
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck %s --check-prefix=W64
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck %s --check-prefix=W32
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck %s --check-prefix=W64
# W32: v_cmp_class_f16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0xfa,0x7c,0x01,0x77,0x39,0x05]
# W64: v_cmp_class_f16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0xfa,0x7c,0x01,0x77,0x39,0x05]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx.txt
index 7b314c67eaf5cc9..b5538bf0a98f8b8 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck %s --check-prefix=GFX11
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck %s --check-prefix=GFX11
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck %s --check-prefix=GFX11
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck %s --check-prefix=GFX11
# GFX11: v_cmpx_class_f16_e32 v1, v2 ; encoding: [0x01,0x05,0xfa,0x7d]
0x01,0x05,0xfa,0x7d
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp16.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp16.txt
index ddc5ce2a432b581..a47440f5092d1bc 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp16.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp16.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck %s --check-prefix=GFX11
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck %s --check-prefix=GFX11
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck %s --check-prefix=GFX11
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck %s --check-prefix=GFX11
# GFX11: v_cmpx_class_f16 v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0xfa,0x7d,0x01,0x1b,0x00,0xff]
0xfa,0x04,0xfa,0x7d,0x01,0x1b,0x00,0xff
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp8.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp8.txt
index b4feaa65bcf7e41..fd1c626ea51be9d 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp8.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp8.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck %s --check-prefix=GFX11
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck %s --check-prefix=GFX11
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck %s --check-prefix=GFX11
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck %s --check-prefix=GFX11
# GFX11: v_cmpx_class_f16 v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0xfa,0x7d,0x01,0x77,0x39,0x05]
0xe9,0x04,0xfa,0x7d,0x01,0x77,0x39,0x05
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopd.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopd.txt
index a5f21592050cbf7..bd8f4c667d4ffab 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopd.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopd.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck %s --check-prefix=GFX11
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck %s --check-prefix=GFX11
# GFX11: v_dual_add_f32 v255, v4, v2 :: v_dual_add_f32 v6, v1, v3 ; encoding: [0x04,0x05,0x08,0xc9,0x01,0x07,0x06,0xff]
0x04,0x05,0x08,0xc9,0x01,0x07,0x06,0xff
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopd_features.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopd_features.txt
index 5f9e66843daf30c..2c4e7d646a1753c 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopd_features.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopd_features.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
#===------------------------------------------------------------------------===#
# Check instructions with several literals
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_wmma.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_wmma.txt
index b09e5c459e25b76..fff7a807bfd6c86 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_wmma.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_wmma.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=W32 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=W64 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=W32 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=W64 %s
# Test v_wmma_f32_16x16x16_f16
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx8-literal.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx8-literal.txt
index 05483ccd0008d9b..d2c24f3fbaef549 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx8-literal.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx8-literal.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding %s | FileCheck -check-prefix=VI %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=tonga -disassemble -show-encoding %s | FileCheck -check-prefix=VI %s
# VI: v_fract_f64_e32 v[0:1], 0.15915494309189532 ; encoding: [0xf8,0x64,0x00,0x7e]
0xf8,0x64,0x00,0x7e
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx8-literal16.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx8-literal16.txt
index 466932e8691e088..c5751de810d90b4 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx8-literal16.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx8-literal16.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding %s | FileCheck -check-prefix=VI %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=tonga -disassemble -show-encoding %s | FileCheck -check-prefix=VI %s
# VI: v_add_f16_e32 v1, 0.5, v3 ; encoding: [0xf0,0x06,0x02,0x3e]
0xf0 0x06 0x02 0x3e
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx8-trap.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx8-trap.txt
index eb254134cc53ea8..e5c4a5278e7f443 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx8-trap.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx8-trap.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck %s -check-prefix=VI
+# RUN: llvm-mc -triple=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck %s -check-prefix=VI
#===----------------------------------------------------------------------===#
# Trap Handler related - 32 bit registers
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx8_ds.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx8_ds.txt
index 73c40dee8523d2a..f9cc491a7f9214b 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx8_ds.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx8_ds.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: ds_add_u32 v1, v2 offset:65535 ; encoding: [0xff,0xff,0x00,0xd8,0x01,0x02,0x00,0x00]
0xff,0xff,0x00,0xd8,0x01,0x02,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx8_exp.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx8_exp.txt
index 126a66111da312a..c6be9a48afbc0d7 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx8_exp.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx8_exp.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: exp mrt0 v0, v0, v0, v0 ; encoding: [0x0f,0x00,0x00,0xc4,0x00,0x00,0x00,0x00]
0x0f,0x00,0x00,0xc4,0x00,0x00,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx8_flat.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx8_flat.txt
index 456306164b96ff9..56891898409f93f 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx8_flat.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx8_flat.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: flat_load_ubyte v5, v[1:2] ; encoding: [0x00,0x00,0x40,0xdc,0x01,0x00,0x00,0x05]
0x00,0x00,0x40,0xdc,0x01,0x00,0x00,0x05
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx8_mimg.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx8_mimg.txt
index 048d1570c810387..d6e56d37c3ba822 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx8_mimg.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx8_mimg.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: image_load v5, v1, s[8:15] dmask:0x1 ; encoding: [0x00,0x01,0x00,0xf0,0x01,0x05,0x02,0x00]
0x00,0x01,0x00,0xf0,0x01,0x05,0x02,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx8_mimg_features.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx8_mimg_features.txt
index cc59789c62be504..292af1850db8638 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx8_mimg_features.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx8_mimg_features.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck %s -check-prefix=VI -check-prefix=GFX80
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx810 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=VI -check-prefix=GFX81
+# RUN: llvm-mc -triple=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck %s -check-prefix=VI -check-prefix=GFX80
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx810 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=VI -check-prefix=GFX81
#===------------------------------------------------------------------------===#
# Image load/store
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx8_mtbuf.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx8_mtbuf.txt
index d32545f7f48c96c..f6c5a459e6c8943 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx8_mtbuf.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx8_mtbuf.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck %s -check-prefix=VI
+# RUN: llvm-mc -triple=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck %s -check-prefix=VI
# VI: tbuffer_load_format_x v1, off, s[4:7], s1 format:[BUF_DATA_FORMAT_RESERVED_15,BUF_NUM_FORMAT_USCALED] ; encoding: [0x00,0x00,0x78,0xe9,0x00,0x01,0x01,0x01]
0x00 0x00 0x78 0xe9 0x00 0x01 0x01 0x01
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx8_mubuf.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx8_mubuf.txt
index d0c9ddf9beecc5d..759fd0309819ef5 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx8_mubuf.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx8_mubuf.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: buffer_load_format_x v5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0x03]
0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0x03
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx8_smem.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx8_smem.txt
index 8d3670cd62f9c4f..f141a5ade23a788 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx8_smem.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx8_smem.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: s_load_dword s5, s[2:3], s2 ; encoding: [0x41,0x01,0x00,0xc0,0x02,0x00,0x00,0x00]
0x41,0x01,0x00,0xc0,0x02,0x00,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx8_sop1.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx8_sop1.txt
index 995748ecc2a120c..1aab1d9cbdad131 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx8_sop1.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx8_sop1.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: s_mov_b32 s5, s1 ; encoding: [0x01,0x00,0x85,0xbe]
0x01,0x00,0x85,0xbe
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx8_sop2.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx8_sop2.txt
index 2bf624b9ade355d..5b12d7561befa79 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx8_sop2.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx8_sop2.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: s_add_u32 s5, s1, s2 ; encoding: [0x01,0x02,0x05,0x80]
0x01,0x02,0x05,0x80
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx8_sopc.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx8_sopc.txt
index 9adae0dfa002ad0..3e06d2d726b129f 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx8_sopc.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx8_sopc.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: s_cmp_eq_i32 s1, s2 ; encoding: [0x01,0x02,0x00,0xbf]
0x01,0x02,0x00,0xbf
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx8_sopk.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx8_sopk.txt
index 6293dfad0ef514b..40d6ac6699640b3 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx8_sopk.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx8_sopk.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: s_movk_i32 s5, 0x3141 ; encoding: [0x41,0x31,0x05,0xb0]
0x41,0x31,0x05,0xb0
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx8_sopp.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx8_sopp.txt
index e91d03b2dec62c2..0a309101caf122c 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx8_sopp.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx8_sopp.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: s_nop 0x3141 ; encoding: [0x41,0x31,0x80,0xbf]
0x41,0x31,0x80,0xbf
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx8_vintrp.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx8_vintrp.txt
index a960c4ac61843a8..0400893dba456df 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx8_vintrp.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx8_vintrp.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=fiji -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=fiji -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: v_interp_p1_f32_e32 v5, v1, attr0.x ; encoding: [0x01,0x00,0x14,0xd4]
0x01,0x00,0x14,0xd4
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx8_vop1.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx8_vop1.txt
index 4f0d998e08eb8ca..a35b940cadd86c0 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx8_vop1.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx8_vop1.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: v_nop ; encoding: [0x00,0x00,0x00,0x7e]
0x00,0x00,0x00,0x7e
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx8_vop1_dpp.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx8_vop1_dpp.txt
index 9fa36a4c9518667..673481e44ae4050 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx8_vop1_dpp.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx8_vop1_dpp.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: v_mov_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0xe4,0x00,0x00]
0xfa,0x02,0x0a,0x7e,0x01,0xe4,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx8_vop1_sdwa.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx8_vop1_sdwa.txt
index f0f1b26953f00e2..8fe5d54323ba203 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx8_vop1_sdwa.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx8_vop1_sdwa.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD ; encoding: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x06,0x00]
0xf9,0x02,0x0a,0x7e,0x01,0x06,0x06,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx8_vop2.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx8_vop2.txt
index ce2fc3824b9c84e..69587d3ca1a9258 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx8_vop2.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx8_vop2.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: v_cndmask_b32_e32 v5, v1, v2, vcc ; encoding: [0x01,0x05,0x0a,0x00]
0x01,0x05,0x0a,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx8_vop2_dpp.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx8_vop2_dpp.txt
index 7233bf801372f3f..62855036b9ebf5f 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx8_vop2_dpp.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx8_vop2_dpp.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx8_vop2_sdwa.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx8_vop2_sdwa.txt
index f3f25f4c519ac91..45048b85c7a2f3c 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx8_vop2_sdwa.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx8_vop2_sdwa.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x06]
0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x06
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx8_vop3.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx8_vop3.txt
index 2b07d620fdad248..4488ad88de8848b 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx8_vop3.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx8_vop3.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: v_interp_p1_f32_e64 v5, v2, attr0.x ; encoding: [0x05,0x00,0x70,0xd2,0x00,0x04,0x02,0x00]
0x05,0x00,0x70,0xd2,0x00,0x04,0x02,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx8_vop3c.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx8_vop3c.txt
index e955d5891d99537..57d6207a2343178 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx8_vop3c.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx8_vop3c.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: v_cmp_class_f32_e64 s[10:11], v1, v2 ; encoding: [0x0a,0x00,0x10,0xd0,0x01,0x05,0x02,0x00]
0x0a,0x00,0x10,0xd0,0x01,0x05,0x02,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx8_vop3cx.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx8_vop3cx.txt
index 43f9667883f01d9..b70a44b6126471f 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx8_vop3cx.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx8_vop3cx.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: v_cmpx_class_f32_e64 s[10:11], v1, v2 ; encoding: [0x0a,0x00,0x11,0xd0,0x01,0x05,0x02,0x00]
0x0a,0x00,0x11,0xd0,0x01,0x05,0x02,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx8_vopc.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx8_vopc.txt
index d12fce686fa65a5..28a46eab474a080 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx8_vopc.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx8_vopc.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: v_cmp_class_f32_e32 vcc, v1, v2 ; encoding: [0x01,0x05,0x20,0x7c]
0x01,0x05,0x20,0x7c
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx8_vopc_sdwa.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx8_vopc_sdwa.txt
index 5c61596e6881f26..6ec8c25221116aa 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx8_vopc_sdwa.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx8_vopc_sdwa.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: v_cmp_class_f32 vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x20,0x7c,0x01,0x00,0x06,0x06]
0xf9,0x04,0x20,0x7c,0x01,0x00,0x06,0x06
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx8_vopcx.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx8_vopcx.txt
index 468b9e655a5b979..c819a03a69670de 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx8_vopcx.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx8_vopcx.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: v_cmpx_class_f32_e32 vcc, v1, v2 ; encoding: [0x01,0x05,0x22,0x7c]
0x01,0x05,0x22,0x7c
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx8_vopcx_sdwa.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx8_vopcx_sdwa.txt
index 7cf1a07b846027f..e7e1590edc990e3 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx8_vopcx_sdwa.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx8_vopcx_sdwa.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: v_cmpx_class_f32 vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x22,0x7c,0x01,0x00,0x06,0x06]
0xf9,0x04,0x22,0x7c,0x01,0x00,0x06,0x06
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx9-aperture-regs.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx9-aperture-regs.txt
index 1af85415d137ee7..8048789eae503d8 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx9-aperture-regs.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx9-aperture-regs.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX9 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX9 %s
# GFX9: v_mov_b32_e32 v1, src_shared_base ; encoding: [0xeb,0x02,0x02,0x7e]
0xeb 0x02 0x02 0x7e
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx9-bool-regs.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx9-bool-regs.txt
index 216d58b70942469..b084263e4a5edfa 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx9-bool-regs.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx9-bool-regs.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding %s | FileCheck -check-prefix=GFX9 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding %s | FileCheck -check-prefix=GFX9 %s
# GFX9: buffer_atomic_add v0, off, s[0:3], src_scc offset:4095 ; encoding: [0xff,0x0f,0x08,0xe1,0x00,0x00,0x00,0xfd]
0xff,0x0f,0x08,0xe1,0x00,0x00,0x00,0xfd
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx9-lds_direct.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx9-lds_direct.txt
index 7ab114578abe74c..4740237c93732a2 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx9-lds_direct.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx9-lds_direct.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck %s --check-prefix=GFX9
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck %s --check-prefix=GFX9
# GFX9: v_mov_b32_e32 v0, src_lds_direct ; encoding: [0xfe,0x02,0x00,0x7e]
0xfe,0x02,0x00,0x7e
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx9-trap.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx9-trap.txt
index 0b140c42168a5f6..ece637685ab56ab 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx9-trap.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx9-trap.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GFX9
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GFX9
#===----------------------------------------------------------------------===#
# Trap Handler related - 32 bit registers
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx908-atomic-fadd-insts.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx908-atomic-fadd-insts.txt
index 20988a40f98e367..cd3b66769045dc3 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx908-atomic-fadd-insts.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx908-atomic-fadd-insts.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx908 -disassemble -show-encoding < %s | FileCheck %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx908 -disassemble -show-encoding < %s | FileCheck %s
# CHECK: buffer_atomic_add_f32 v5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x34,0xe1,0x00,0x05,0x02,0x03]
0xff,0x0f,0x34,0xe1,0x00,0x05,0x02,0x03
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx908-dl-insts.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx908-dl-insts.txt
index 256c6072cdd7780..aa3b4c7f03837ab 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx908-dl-insts.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx908-dl-insts.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx906 -disassemble -show-encoding < %s | FileCheck %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx908 -disassemble -show-encoding < %s | FileCheck %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx906 -disassemble -show-encoding < %s | FileCheck %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx908 -disassemble -show-encoding < %s | FileCheck %s
# CHECK: v_fmac_f32_e32 v5, v1, v2 ; encoding: [0x01,0x05,0x0a,0x76]
0x01,0x05,0x0a,0x76
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx908-xdl-insts.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx908-xdl-insts.txt
index b643007015d478d..be23058ff424d90 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx908-xdl-insts.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx908-xdl-insts.txt
@@ -1,6 +1,6 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx908 -disassemble -show-encoding < %s | FileCheck %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx90a -disassemble -show-encoding < %s | FileCheck %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx940 -disassemble -show-encoding < %s | FileCheck %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx908 -disassemble -show-encoding < %s | FileCheck %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx90a -disassemble -show-encoding < %s | FileCheck %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx940 -disassemble -show-encoding < %s | FileCheck %s
# CHECK: v_dot2c_f32_f16_e32 v5, v1, v2 ; encoding: [0x01,0x05,0x0a,0x6e]
0x01,0x05,0x0a,0x6e
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx908_mai.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx908_mai.txt
index 7f45302e383be6e..2f3de6dc282397d 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx908_mai.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx908_mai.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx908 -show-encoding -disassemble %s | FileCheck -check-prefix=GFX908 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx908 -show-encoding -disassemble %s | FileCheck -check-prefix=GFX908 %s
# GFX908: v_accvgpr_read_b32 v2, a0 ; encoding: [0x02,0x40,0xd8,0xd3,0x00,0x01,0x00,0x18]
0x02,0x40,0xd8,0xd3,0x00,0x01,0x00,0x18
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx90a-dpp64.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx90a-dpp64.txt
index b11d2b422134550..ef194eb021e1509 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx90a-dpp64.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx90a-dpp64.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx90a -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GFX90A
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx90a -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GFX90A
# GFX90A: v_ceil_f64_dpp v[0:1], v[2:3] row_newbcast:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x30,0x00,0x7e,0x02,0x51,0x01,0xff]
0xfa,0x30,0x00,0x7e,0x02,0x51,0x01,0xff
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx90a_features.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx90a_features.txt
index 6778d9855dd6946..8746ee79c8f556b 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx90a_features.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx90a_features.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx90a -disassemble -show-encoding %s | FileCheck --check-prefix=GFX90A %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx90a -disassemble -show-encoding %s | FileCheck --check-prefix=GFX90A %s
# GFX90A: v_pk_fma_f32 v[8:9], v[0:1], s[0:1], v[4:5] ; encoding: [0x08,0x40,0xb0,0xd3,0x00,0x01,0x10,0x1c]
0x08,0x40,0xb0,0xd3,0x00,0x01,0x10,0x1c
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx90a_ldst_acc.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx90a_ldst_acc.txt
index 770eea7bc43f156..b8cc7ac604da2ff 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx90a_ldst_acc.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx90a_ldst_acc.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx90a -disassemble -show-encoding %s | FileCheck --check-prefix=GFX90A %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx90a -disassemble -show-encoding %s | FileCheck --check-prefix=GFX90A %s
# GFX90A: flat_load_ubyte a5, v[2:3] offset:4095 ; encoding: [0xff,0x0f,0x40,0xdc,0x02,0x00,0x80,0x05]
0xff,0x0f,0x40,0xdc,0x02,0x00,0x80,0x05
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx90a_mai.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx90a_mai.txt
index 6d4a4760d8eb170..eca0ee57ef8b005 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx90a_mai.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx90a_mai.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx90a -show-encoding -disassemble %s | FileCheck -check-prefix=GFX90A %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx90a -show-encoding -disassemble %s | FileCheck -check-prefix=GFX90A %s
# GFX90A: v_accvgpr_read_b32 v2, a0 ; encoding: [0x02,0x40,0xd8,0xd3,0x00,0x01,0x00,0x18]
0x02,0x40,0xd8,0xd3,0x00,0x01,0x00,0x18
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx90a_mimg.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx90a_mimg.txt
index b902fca9288ce45..0f2dca4cb578362 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx90a_mimg.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx90a_mimg.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx90a -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GFX90A
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx90a -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GFX90A
# GFX90A: image_load v[4:6], v238, s[28:35] dmask:0x7 unorm ; encoding: [0x00,0x17,0x00,0xf0,0xee,0x04,0x07,0x00]
0x00,0x17,0x00,0xf0,0xee,0x04,0x07,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx940_features.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx940_features.txt
index 01eef8b646f4c60..9575e50f16312fb 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx940_features.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx940_features.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx940 -disassemble -show-encoding %s | FileCheck -strict-whitespace --check-prefix=GFX940 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx940 -disassemble -show-encoding %s | FileCheck -strict-whitespace --check-prefix=GFX940 %s
# GFX940: global_load_dword v2, v[2:3], off sc0 ; encoding: [0x00,0x80,0x51,0xdc,0x02,0x00,0x7f,0x02]
0x00,0x80,0x51,0xdc,0x02,0x00,0x7f,0x02
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx940_flat.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx940_flat.txt
index b3182c98cb1b726..856fcd894638c91 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx940_flat.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx940_flat.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx940 -show-encoding -disassemble %s | FileCheck -check-prefix=GFX940 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx940 -show-encoding -disassemble %s | FileCheck -check-prefix=GFX940 %s
# GFX940: scratch_load_dword a2, v4, s6 ; encoding: [0x00,0x60,0x50,0xdc,0x04,0x00,0x86,0x02]
0x00,0x60,0x50,0xdc,0x04,0x00,0x86,0x02
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx940_mai.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx940_mai.txt
index 0742cf1b5c720d9..e6951bc5dc68427 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx940_mai.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx940_mai.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx940 -show-encoding -disassemble %s | FileCheck -check-prefix=GFX940 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx940 -show-encoding -disassemble %s | FileCheck -check-prefix=GFX940 %s
# GFX940: v_accvgpr_write_b32 a10, s20 ; encoding: [0x0a,0x40,0xd9,0xd3,0x14,0x00,0x00,0x18]
0x0a,0x40,0xd9,0xd3,0x14,0x00,0x00,0x18
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx9_ds.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx9_ds.txt
index 3f66c9f560cf018..58a44e1250542fe 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx9_ds.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx9_ds.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: ds_add_u32 v1, v2 offset:65535 ; encoding: [0xff,0xff,0x00,0xd8,0x01,0x02,0x00,0x00]
0xff,0xff,0x00,0xd8,0x01,0x02,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx9_exp.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx9_exp.txt
index 651de5b50f7c69b..c8c17d87e3902c5 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx9_exp.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx9_exp.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: exp mrt0 v0, v0, v0, v0 ; encoding: [0x0f,0x00,0x00,0xc4,0x00,0x00,0x00,0x00]
0x0f,0x00,0x00,0xc4,0x00,0x00,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx9_flat.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx9_flat.txt
index f5540eed2a0c765..0ee659e207c915d 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx9_flat.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx9_flat.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: flat_load_ubyte v5, v[1:2] offset:4095 ; encoding: [0xff,0x0f,0x40,0xdc,0x01,0x00,0x00,0x05]
0xff,0x0f,0x40,0xdc,0x01,0x00,0x00,0x05
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx9_mimg.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx9_mimg.txt
index 21120a679b70927..f3c5dec1b161737 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx9_mimg.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx9_mimg.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: image_load v5, v1, s[8:15] dmask:0x1 ; encoding: [0x00,0x01,0x00,0xf0,0x01,0x05,0x02,0x00]
0x00,0x01,0x00,0xf0,0x01,0x05,0x02,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx9_mubuf.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx9_mubuf.txt
index dae9ee805905d34..4cf5aecdb2be79c 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx9_mubuf.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx9_mubuf.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: buffer_load_format_x v5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0x03]
0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0x03
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx9_sdwa_features.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx9_sdwa_features.txt
index 94b98505092e17c..3408024d9257aca 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx9_sdwa_features.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx9_sdwa_features.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GFX9
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GFX9
#-----------------------------------------------------------------------------#
# Input modifiers
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx9_smem.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx9_smem.txt
index f00c989deb52681..9e9ba19dd09eb18 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx9_smem.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx9_smem.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: s_load_dword s5, s[2:3], s0 ; encoding: [0x41,0x01,0x00,0xc0,0x00,0x00,0x00,0x00]
0x41,0x01,0x00,0xc0,0x00,0x00,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx9_smem_features.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx9_smem_features.txt
index c2573060a1e9d6d..63a8b292e8ee9d0 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx9_smem_features.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx9_smem_features.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GFX9
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GFX9
#===------------------------------------------------------------------------===#
# s_scratch
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx9_sop1.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx9_sop1.txt
index 94063f1c587d735..cad9491e0d0ba91 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx9_sop1.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx9_sop1.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: s_mov_b32 s5, s1 ; encoding: [0x01,0x00,0x85,0xbe]
0x01,0x00,0x85,0xbe
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx9_sop2.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx9_sop2.txt
index 79a09ff921a96d7..8bd778ec1872934 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx9_sop2.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx9_sop2.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: s_add_u32 s5, s1, s2 ; encoding: [0x01,0x02,0x05,0x80]
0x01,0x02,0x05,0x80
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx9_sopc.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx9_sopc.txt
index 0d65ede1afba722..4e6a7550534b380 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx9_sopc.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx9_sopc.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: s_cmp_eq_i32 s1, s2 ; encoding: [0x01,0x02,0x00,0xbf]
0x01,0x02,0x00,0xbf
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx9_sopk.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx9_sopk.txt
index ec4277829529b72..e296d2a3a1fa47d 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx9_sopk.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx9_sopk.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: s_movk_i32 s5, 0x3141 ; encoding: [0x41,0x31,0x05,0xb0]
0x41,0x31,0x05,0xb0
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx9_sopp.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx9_sopp.txt
index bd83e0cd4f6e521..6647b1fb657c502 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx9_sopp.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx9_sopp.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: s_nop 0x3141 ; encoding: [0x41,0x31,0x80,0xbf]
0x41,0x31,0x80,0xbf
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx9_vintrp.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx9_vintrp.txt
index ba20fc3baa577aa..1c685aa47214465 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx9_vintrp.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx9_vintrp.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: v_interp_p1_f32_e32 v5, v1, attr0.x ; encoding: [0x01,0x00,0x14,0xd4]
0x01,0x00,0x14,0xd4
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop1.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop1.txt
index 51d2f68277b5a14..5bbd0ab3f45eeb4 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop1.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop1.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: v_nop ; encoding: [0x00,0x00,0x00,0x7e]
0x00,0x00,0x00,0x7e
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop1_dpp.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop1_dpp.txt
index c6df564d28cb8c1..f1f24202ad7fed9 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop1_dpp.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop1_dpp.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: v_mov_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0xe4,0x00,0x00]
0xfa,0x02,0x0a,0x7e,0x01,0xe4,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop1_sdwa.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop1_sdwa.txt
index 0194b0ef5ef36d6..a5ed931ffd99957 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop1_sdwa.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop1_sdwa.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD ; encoding: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x06,0x00]
0xf9,0x02,0x0a,0x7e,0x01,0x06,0x06,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop2.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop2.txt
index 40c325cb6ce3f82..f64b852a14bffe8 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop2.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop2.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: v_cndmask_b32_e32 v5, v1, v2, vcc ; encoding: [0x01,0x05,0x0a,0x00]
0x01,0x05,0x0a,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop2_dpp.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop2_dpp.txt
index 352f15f13b6c237..d678d8bdd795877 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop2_dpp.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop2_dpp.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop2_sdwa.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop2_sdwa.txt
index e04168f0fe345e9..9b141b603946938 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop2_sdwa.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop2_sdwa.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x06]
0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x06
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3.txt
index e3ed9778f6fb4d1..618e0815254148b 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: v_interp_p1_f32_e64 v5, v2, attr0.x ; encoding: [0x05,0x00,0x70,0xd2,0x00,0x04,0x02,0x00]
0x05,0x00,0x70,0xd2,0x00,0x04,0x02,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3c.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3c.txt
index ab406ad526a6f8e..26131cf217e7693 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3c.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3c.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: v_cmp_class_f32_e64 s[10:11], v1, v2 ; encoding: [0x0a,0x00,0x10,0xd0,0x01,0x05,0x02,0x00]
0x0a,0x00,0x10,0xd0,0x01,0x05,0x02,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3cx.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3cx.txt
index 6d117f1436b8868..f1c8480b1f0ef02 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3cx.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3cx.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: v_cmpx_class_f32_e64 s[10:11], v1, v2 ; encoding: [0x0a,0x00,0x11,0xd0,0x01,0x05,0x02,0x00]
0x0a,0x00,0x11,0xd0,0x01,0x05,0x02,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3p.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3p.txt
index 052087c0992ef74..215453d0331d41d 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3p.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3p.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: v_pk_mad_i16 v5, v1, v2, v3 ; encoding: [0x05,0x40,0x80,0xd3,0x01,0x05,0x0e,0x1c]
0x05,0x40,0x80,0xd3,0x01,0x05,0x0e,0x1c
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3p_opsel.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3p_opsel.txt
index 2269bdd814c323e..2abbc989a0ada39 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3p_opsel.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3p_opsel.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck %s
# Check that we can disassemble opcodes w/o src2 with any op_sel_hi value for src2
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx9_vopc.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx9_vopc.txt
index 3a803ba44e6a546..9952093bd1e1c93 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx9_vopc.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx9_vopc.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: v_cmp_class_f32_e32 vcc, v1, v2 ; encoding: [0x01,0x05,0x20,0x7c]
0x01,0x05,0x20,0x7c
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx9_vopc_sdwa.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx9_vopc_sdwa.txt
index 06add8bdf39e97f..cf8ea6054454381 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx9_vopc_sdwa.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx9_vopc_sdwa.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: v_cmp_class_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x20,0x7c,0x01,0x86,0x06,0x06]
0xf9,0x04,0x20,0x7c,0x01,0x86,0x06,0x06
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx9_vopcx.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx9_vopcx.txt
index 7398b42a0ef82ab..ed64f87d1dd6f6d 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx9_vopcx.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx9_vopcx.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: v_cmpx_class_f32_e32 vcc, v1, v2 ; encoding: [0x01,0x05,0x22,0x7c]
0x01,0x05,0x22,0x7c
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx9_vopcx_sdwa.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx9_vopcx_sdwa.txt
index e54110b635c2e5c..4b280ed02f1dcc9 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx9_vopcx_sdwa.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx9_vopcx_sdwa.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: v_cmpx_class_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x22,0x7c,0x01,0x86,0x06,0x06]
0xf9,0x04,0x22,0x7c,0x01,0x86,0x06,0x06
diff --git a/llvm/test/MC/Disassembler/AMDGPU/mad_mix.txt b/llvm/test/MC/Disassembler/AMDGPU/mad_mix.txt
index b328400b52c460e..6d73e588b48c861 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/mad_mix.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/mad_mix.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GFX900
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx906 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GFX906
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GFX900
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx906 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GFX906
# GFX900: v_mad_mix_f32 v0, v1, v2, v3 ; encoding: [0x00,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x04]
# GFX906: v_fma_mix_f32 v0, v1, v2, v3 ; encoding: [0x00,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x04]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/si-support.txt b/llvm/test/MC/Disassembler/AMDGPU/si-support.txt
index 5538983597f76ff..f62d89ff7b0e9ec 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/si-support.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/si-support.txt
@@ -1,4 +1,4 @@
-# RUN: not --crash llvm-mc -arch=amdgcn -mcpu=tahiti -disassemble < %s 2>&1 | FileCheck %s
+# RUN: not --crash llvm-mc -triple=amdgcn -mcpu=tahiti -disassemble < %s 2>&1 | FileCheck %s
# CHECK: LLVM ERROR: Disassembly not yet supported for subtarget
0x00 0x00 0x00 0x7e
diff --git a/llvm/test/MC/Disassembler/Mips/micromips32r3/valid-fp64-el.txt b/llvm/test/MC/Disassembler/Mips/micromips32r3/valid-fp64-el.txt
index 59b7f7e5a570f60..fbf8a57e84b0d3c 100644
--- a/llvm/test/MC/Disassembler/Mips/micromips32r3/valid-fp64-el.txt
+++ b/llvm/test/MC/Disassembler/Mips/micromips32r3/valid-fp64-el.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc --disassemble -arch=mipsel -mcpu=mips32r3 -mattr=+micromips,+fp64 %s \
+# RUN: llvm-mc --disassemble -triple=mipsel -mcpu=mips32r3 -mattr=+micromips,+fp64 %s \
# RUN: | FileCheck %s
0x0c 0x54 0x3b 0x0a # CHECK: sqrt.s $f0, $f12
diff --git a/llvm/test/MC/Disassembler/Mips/micromips32r3/valid-fp64.txt b/llvm/test/MC/Disassembler/Mips/micromips32r3/valid-fp64.txt
index 6cc1bb4bbfec88a..95d000df309bac8 100644
--- a/llvm/test/MC/Disassembler/Mips/micromips32r3/valid-fp64.txt
+++ b/llvm/test/MC/Disassembler/Mips/micromips32r3/valid-fp64.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc --disassemble -arch=mips -mcpu=mips32r3 -mattr=+micromips,+fp64 %s \
+# RUN: llvm-mc --disassemble -triple=mips -mcpu=mips32r3 -mattr=+micromips,+fp64 %s \
# RUN: | FileCheck %s
0x54 0x0c 0x0a 0x3b # CHECK: sqrt.s $f0, $f12
diff --git a/llvm/test/MC/Disassembler/Mips/mips32/valid-fp64-el.txt b/llvm/test/MC/Disassembler/Mips/mips32/valid-fp64-el.txt
index c1b46f02d9a3ab8..85713cbbd732ae0 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32/valid-fp64-el.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32/valid-fp64-el.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc --disassemble -arch=mipsel -mcpu=mips32 -mattr=+fp64 %s | \
+# RUN: llvm-mc --disassemble -triple=mipsel -mcpu=mips32 -mattr=+fp64 %s | \
# RUN: FileCheck %s
0x04 0x60 0x00 0x46 # CHECK: sqrt.s $f0, $f12
diff --git a/llvm/test/MC/Disassembler/Mips/mips32/valid-fp64.txt b/llvm/test/MC/Disassembler/Mips/mips32/valid-fp64.txt
index 08e7e54c4c0e7a6..d7de3beb55d52f2 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32/valid-fp64.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32/valid-fp64.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc --disassemble -arch=mips -mcpu=mips32 -mattr=+fp64 %s | \
+# RUN: llvm-mc --disassemble -triple=mips -mcpu=mips32 -mattr=+fp64 %s | \
# RUN: FileCheck %s
0x46 0x00 0x60 0x04 # CHECK: sqrt.s $f0, $f12
diff --git a/llvm/test/MC/Disassembler/Mips/mips32r2/valid-fp64-el.txt b/llvm/test/MC/Disassembler/Mips/mips32r2/valid-fp64-el.txt
index 73cd1969cb4b726..f84ea86ad5ef92a 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32r2/valid-fp64-el.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32r2/valid-fp64-el.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc --disassemble -arch=mipsel -mcpu=mips32r2 -mattr=+fp64 %s | \
+# RUN: llvm-mc --disassemble -triple=mipsel -mcpu=mips32r2 -mattr=+fp64 %s | \
# RUN: FileCheck %s
0x04 0x60 0x00 0x46 # CHECK: sqrt.s $f0, $f12
diff --git a/llvm/test/MC/Disassembler/Mips/mips32r2/valid-fp64.txt b/llvm/test/MC/Disassembler/Mips/mips32r2/valid-fp64.txt
index ce99e18f26dd88c..acacbc54b42d0ce 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32r2/valid-fp64.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32r2/valid-fp64.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc --disassemble -arch=mips -mcpu=mips32r2 -mattr=+fp64 %s | \
+# RUN: llvm-mc --disassemble -triple=mips -mcpu=mips32r2 -mattr=+fp64 %s | \
# RUN: FileCheck %s
0x46 0x00 0x60 0x04 # CHECK: sqrt.s $f0, $f12
diff --git a/llvm/test/MC/Disassembler/Mips/mips32r3/valid-fp64-el.txt b/llvm/test/MC/Disassembler/Mips/mips32r3/valid-fp64-el.txt
index a8291cfe64af7bc..d976a39b51a0bdc 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32r3/valid-fp64-el.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32r3/valid-fp64-el.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc --disassemble -arch=mipsel -mcpu=mips32r3 -mattr=+fp64 %s | \
+# RUN: llvm-mc --disassemble -triple=mipsel -mcpu=mips32r3 -mattr=+fp64 %s | \
# RUN: FileCheck %s
0x04 0x60 0x00 0x46 # CHECK: sqrt.s $f0, $f12
diff --git a/llvm/test/MC/Disassembler/Mips/mips32r3/valid-fp64.txt b/llvm/test/MC/Disassembler/Mips/mips32r3/valid-fp64.txt
index 572faad447379ea..637ffd420e6c064 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32r3/valid-fp64.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32r3/valid-fp64.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc --disassemble -arch=mips -mcpu=mips32r3 -mattr=+fp64 %s | \
+# RUN: llvm-mc --disassemble -triple=mips -mcpu=mips32r3 -mattr=+fp64 %s | \
# RUN: FileCheck %s
0x46 0x00 0x60 0x04 # CHECK: sqrt.s $f0, $f12
diff --git a/llvm/test/MC/Disassembler/Mips/mips32r5/valid-fp64-el.txt b/llvm/test/MC/Disassembler/Mips/mips32r5/valid-fp64-el.txt
index 33569c0af8b0b33..a110e707629e619 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32r5/valid-fp64-el.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32r5/valid-fp64-el.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc --disassemble -arch=mipsel -mcpu=mips32r5 -mattr=+fp64 %s | \
+# RUN: llvm-mc --disassemble -triple=mipsel -mcpu=mips32r5 -mattr=+fp64 %s | \
# RUN: FileCheck %s
0x04 0x60 0x00 0x46 # CHECK: sqrt.s $f0, $f12
diff --git a/llvm/test/MC/Disassembler/Mips/mips32r5/valid-fp64.txt b/llvm/test/MC/Disassembler/Mips/mips32r5/valid-fp64.txt
index 5116a69fbcaad89..ae6da7f676d7f25 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32r5/valid-fp64.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32r5/valid-fp64.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc --disassemble -arch=mips -mcpu=mips32r5 -mattr=+fp64 %s | \
+# RUN: llvm-mc --disassemble -triple=mips -mcpu=mips32r5 -mattr=+fp64 %s | \
# RUN: FileCheck %s
0x46 0x00 0x60 0x04 # CHECK: sqrt.s $f0, $f12
diff --git a/llvm/test/MC/Hexagon/J2_trap1_dep.s b/llvm/test/MC/Hexagon/J2_trap1_dep.s
index ab054d1783dc696..ea5d66e18a5919b 100644
--- a/llvm/test/MC/Hexagon/J2_trap1_dep.s
+++ b/llvm/test/MC/Hexagon/J2_trap1_dep.s
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=hexagon -mcpu=hexagonv62 -filetype=obj %s | llvm-objdump --no-print-imm-hex --mcpu=hexagonv62 -d - | FileCheck %s --check-prefix=CHECK-V62
-# RUN: llvm-mc -arch=hexagon -mcpu=hexagonv65 -filetype=obj %s | llvm-objdump --no-print-imm-hex --mcpu=hexagonv65 -d - | FileCheck %s --check-prefix=CHECK-V65
+# RUN: llvm-mc -triple=hexagon -mcpu=hexagonv62 -filetype=obj %s | llvm-objdump --no-print-imm-hex --mcpu=hexagonv62 -d - | FileCheck %s --check-prefix=CHECK-V62
+# RUN: llvm-mc -triple=hexagon -mcpu=hexagonv65 -filetype=obj %s | llvm-objdump --no-print-imm-hex --mcpu=hexagonv65 -d - | FileCheck %s --check-prefix=CHECK-V65
# CHECK-V62: trap1(#0)
# CHECK-V65: trap1(r0,#0)
diff --git a/llvm/test/MC/Hexagon/PacketRules/bundle_option.s b/llvm/test/MC/Hexagon/PacketRules/bundle_option.s
index 29f5a24fbda7dbe..5e63019bcce203e 100644
--- a/llvm/test/MC/Hexagon/PacketRules/bundle_option.s
+++ b/llvm/test/MC/Hexagon/PacketRules/bundle_option.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -arch=hexagon -filetype=asm %s 2>%t; FileCheck %s <%t
+# RUN: not llvm-mc -triple=hexagon -filetype=asm %s 2>%t; FileCheck %s <%t
{ nop }:junk
# CHECK: 3:9: error: 'junk' is not a valid bundle option
diff --git a/llvm/test/MC/Hexagon/PacketRules/hvx_vshuff_vdeal.s b/llvm/test/MC/Hexagon/PacketRules/hvx_vshuff_vdeal.s
index 028062f260f7a73..05e31191c0a51de 100644
--- a/llvm/test/MC/Hexagon/PacketRules/hvx_vshuff_vdeal.s
+++ b/llvm/test/MC/Hexagon/PacketRules/hvx_vshuff_vdeal.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -arch=hexagon -mv65 -mhvx -filetype=obj -o %t %s 2>&1 | FileCheck --implicit-check-not=error: %s
+# RUN: not llvm-mc -triple=hexagon -mv65 -mhvx -filetype=obj -o %t %s 2>&1 | FileCheck --implicit-check-not=error: %s
{ v1 = v2; vshuff(v1,v3,r0) }
# CHECK: error: register `V1' modified more than once
diff --git a/llvm/test/MC/Hexagon/PacketRules/hvx_vshuff_vdeal_dup.s b/llvm/test/MC/Hexagon/PacketRules/hvx_vshuff_vdeal_dup.s
index a435511990d199a..830e648106a5912 100644
--- a/llvm/test/MC/Hexagon/PacketRules/hvx_vshuff_vdeal_dup.s
+++ b/llvm/test/MC/Hexagon/PacketRules/hvx_vshuff_vdeal_dup.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -arch=hexagon -mv65 -mhvx -filetype=obj %s 2>&1 | FileCheck %s
+# RUN: not llvm-mc -triple=hexagon -mv65 -mhvx -filetype=obj %s 2>&1 | FileCheck %s
{ vshuff(v0,v0,r0) }
# CHECK: error: register `V0' modified more than once
diff --git a/llvm/test/MC/Hexagon/PacketRules/newvalue_producers.s b/llvm/test/MC/Hexagon/PacketRules/newvalue_producers.s
index e419d81a6368f03..b9165ed4d1aa425 100644
--- a/llvm/test/MC/Hexagon/PacketRules/newvalue_producers.s
+++ b/llvm/test/MC/Hexagon/PacketRules/newvalue_producers.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -arch=hexagon -mhvx -filetype=asm %s 2>%t; FileCheck %s <%t
+# RUN: not llvm-mc -triple=hexagon -mhvx -filetype=asm %s 2>%t; FileCheck %s <%t
{ r0=memw(r1=##0)
memw(r0)=r1.new }
diff --git a/llvm/test/MC/Hexagon/PacketRules/newvalue_producers_pass.s b/llvm/test/MC/Hexagon/PacketRules/newvalue_producers_pass.s
index e1c4bad9fecac51..e5ebcea626bc75b 100644
--- a/llvm/test/MC/Hexagon/PacketRules/newvalue_producers_pass.s
+++ b/llvm/test/MC/Hexagon/PacketRules/newvalue_producers_pass.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -mhvx -mcpu=hexagonv65 -filetype=obj %s | llvm-objdump --no-print-imm-hex --mattr=+hvxv65 -d - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -mhvx -mcpu=hexagonv65 -filetype=obj %s | llvm-objdump --no-print-imm-hex --mattr=+hvxv65 -d - | FileCheck %s
{ r0=r0
memw(r0)=r0.new }
diff --git a/llvm/test/MC/Hexagon/PacketRules/registers_readonly.s b/llvm/test/MC/Hexagon/PacketRules/registers_readonly.s
index ec11858971177c0..e3759614da7af05 100644
--- a/llvm/test/MC/Hexagon/PacketRules/registers_readonly.s
+++ b/llvm/test/MC/Hexagon/PacketRules/registers_readonly.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -arch=hexagon -filetype=obj %s 2>&1 | FileCheck %s
+# RUN: not llvm-mc -triple=hexagon -filetype=obj %s 2>&1 | FileCheck %s
# CHECK: 4:3: error: Cannot write to read-only register `PC'
{ pc = r0
diff --git a/llvm/test/MC/Hexagon/PacketRules/restrict_ax.s b/llvm/test/MC/Hexagon/PacketRules/restrict_ax.s
index 58c86b28e754f33..a18a926081c25a5 100644
--- a/llvm/test/MC/Hexagon/PacketRules/restrict_ax.s
+++ b/llvm/test/MC/Hexagon/PacketRules/restrict_ax.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -arch=hexagon -filetype=asm %s 2>%t; FileCheck %s <%t
+# RUN: not llvm-mc -triple=hexagon -filetype=asm %s 2>%t; FileCheck %s <%t
{ r0=memw_locked(r0)
r1=sfadd(r0,r0) }
diff --git a/llvm/test/MC/Hexagon/PacketRules/restrict_no_slot1_store_pass.s b/llvm/test/MC/Hexagon/PacketRules/restrict_no_slot1_store_pass.s
index fc85c776ae4c329..94d37ea8ef149af 100644
--- a/llvm/test/MC/Hexagon/PacketRules/restrict_no_slot1_store_pass.s
+++ b/llvm/test/MC/Hexagon/PacketRules/restrict_no_slot1_store_pass.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -filetype=obj %s | llvm-objdump --no-print-imm-hex -d - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -filetype=obj %s | llvm-objdump --no-print-imm-hex -d - | FileCheck %s
{ r0=sub(#1,r0)
r1=sub(#1, r0)
diff --git a/llvm/test/MC/Hexagon/PacketRules/restrict_slot1_aok.s b/llvm/test/MC/Hexagon/PacketRules/restrict_slot1_aok.s
index 669c43cebcd831a..1ef8e3097f04741 100644
--- a/llvm/test/MC/Hexagon/PacketRules/restrict_slot1_aok.s
+++ b/llvm/test/MC/Hexagon/PacketRules/restrict_slot1_aok.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -arch=hexagon -filetype=asm %s 2>&1 | FileCheck %s
+# RUN: not llvm-mc -triple=hexagon -filetype=asm %s 2>&1 | FileCheck %s
{ r0=sub(#1,r0)
r1=sub(#1, r0)
diff --git a/llvm/test/MC/Hexagon/PacketRules/restrict_slot1_aok_pass.s b/llvm/test/MC/Hexagon/PacketRules/restrict_slot1_aok_pass.s
index 0b439eb232da04a..c7282edeb4bbcbf 100644
--- a/llvm/test/MC/Hexagon/PacketRules/restrict_slot1_aok_pass.s
+++ b/llvm/test/MC/Hexagon/PacketRules/restrict_slot1_aok_pass.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -filetype=obj %s | llvm-objdump --no-print-imm-hex -d - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -filetype=obj %s | llvm-objdump --no-print-imm-hex -d - | FileCheck %s
{ r0=sub(#1,r0)
r1=sub(#1, r0)
diff --git a/llvm/test/MC/Hexagon/PacketRules/solo.s b/llvm/test/MC/Hexagon/PacketRules/solo.s
index 86107d52f1fc1ad..51505d551d17793 100644
--- a/llvm/test/MC/Hexagon/PacketRules/solo.s
+++ b/llvm/test/MC/Hexagon/PacketRules/solo.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -arch=hexagon -filetype=asm %s 2>%t; FileCheck %s <%t
+# RUN: not llvm-mc -triple=hexagon -filetype=asm %s 2>%t; FileCheck %s <%t
{ brkpt
r0 = r0 }
diff --git a/llvm/test/MC/Hexagon/arch-support.s b/llvm/test/MC/Hexagon/arch-support.s
index 1782ebb1ecc3d2b..01a15bce5c4116e 100644
--- a/llvm/test/MC/Hexagon/arch-support.s
+++ b/llvm/test/MC/Hexagon/arch-support.s
@@ -1,20 +1,20 @@
-# RUN: llvm-mc -arch=hexagon -mv5 -filetype=obj %s | llvm-readelf -h - | FileCheck --check-prefix=CHECK-V5 %s
-# RUN: llvm-mc -arch=hexagon -mv55 -filetype=obj %s | llvm-readelf -h - | FileCheck --check-prefix=CHECK-V55 %s
-# RUN: llvm-mc -arch=hexagon -mv60 -filetype=obj %s | llvm-readelf -h - | FileCheck --check-prefix=CHECK-V60 %s
-# RUN: llvm-mc -arch=hexagon -mv62 -filetype=obj %s | llvm-readelf -h - | FileCheck --check-prefix=CHECK-V62 %s
-# RUN: llvm-mc -arch=hexagon -mv65 -filetype=obj %s | llvm-readelf -h - | FileCheck --check-prefix=CHECK-V65 %s
-# RUN: llvm-mc -arch=hexagon -mv67 -filetype=obj %s | llvm-readelf -h - | FileCheck --check-prefix=CHECK-V67 %s
-# RUN: llvm-mc -arch=hexagon -mv68 -filetype=obj %s | llvm-readelf -h - | FileCheck --check-prefix=CHECK-V68 %s
-# RUN: llvm-mc -arch=hexagon -mv69 -filetype=obj %s | llvm-readelf -h - | FileCheck --check-prefix=CHECK-V69 %s
+# RUN: llvm-mc -triple=hexagon -mv5 -filetype=obj %s | llvm-readelf -h - | FileCheck --check-prefix=CHECK-V5 %s
+# RUN: llvm-mc -triple=hexagon -mv55 -filetype=obj %s | llvm-readelf -h - | FileCheck --check-prefix=CHECK-V55 %s
+# RUN: llvm-mc -triple=hexagon -mv60 -filetype=obj %s | llvm-readelf -h - | FileCheck --check-prefix=CHECK-V60 %s
+# RUN: llvm-mc -triple=hexagon -mv62 -filetype=obj %s | llvm-readelf -h - | FileCheck --check-prefix=CHECK-V62 %s
+# RUN: llvm-mc -triple=hexagon -mv65 -filetype=obj %s | llvm-readelf -h - | FileCheck --check-prefix=CHECK-V65 %s
+# RUN: llvm-mc -triple=hexagon -mv67 -filetype=obj %s | llvm-readelf -h - | FileCheck --check-prefix=CHECK-V67 %s
+# RUN: llvm-mc -triple=hexagon -mv68 -filetype=obj %s | llvm-readelf -h - | FileCheck --check-prefix=CHECK-V68 %s
+# RUN: llvm-mc -triple=hexagon -mv69 -filetype=obj %s | llvm-readelf -h - | FileCheck --check-prefix=CHECK-V69 %s
-# RUN: llvm-mc -arch=hexagon -mv5 -filetype=obj %s | llvm-objdump --disassemble - | FileCheck --check-prefix=CHECK-OBJDUMP %s
-# RUN: llvm-mc -arch=hexagon -mv55 -filetype=obj %s | llvm-objdump --disassemble - | FileCheck --check-prefix=CHECK-OBJDUMP %s
-# RUN: llvm-mc -arch=hexagon -mv60 -filetype=obj %s | llvm-objdump --disassemble - | FileCheck --check-prefix=CHECK-OBJDUMP %s
-# RUN: llvm-mc -arch=hexagon -mv62 -filetype=obj %s | llvm-objdump --disassemble - | FileCheck --check-prefix=CHECK-OBJDUMP %s
-# RUN: llvm-mc -arch=hexagon -mv65 -filetype=obj %s | llvm-objdump --disassemble - | FileCheck --check-prefix=CHECK-OBJDUMP %s
-# RUN: llvm-mc -arch=hexagon -mv67 -filetype=obj %s | llvm-objdump --disassemble - | FileCheck --check-prefix=CHECK-OBJDUMP %s
-# RUN: llvm-mc -arch=hexagon -mv68 -filetype=obj %s | llvm-objdump --disassemble - | FileCheck --check-prefix=CHECK-OBJDUMP %s
-# RUN: llvm-mc -arch=hexagon -mv69 -filetype=obj %s | llvm-objdump --disassemble - | FileCheck --check-prefix=CHECK-OBJDUMP %s
+# RUN: llvm-mc -triple=hexagon -mv5 -filetype=obj %s | llvm-objdump --disassemble - | FileCheck --check-prefix=CHECK-OBJDUMP %s
+# RUN: llvm-mc -triple=hexagon -mv55 -filetype=obj %s | llvm-objdump --disassemble - | FileCheck --check-prefix=CHECK-OBJDUMP %s
+# RUN: llvm-mc -triple=hexagon -mv60 -filetype=obj %s | llvm-objdump --disassemble - | FileCheck --check-prefix=CHECK-OBJDUMP %s
+# RUN: llvm-mc -triple=hexagon -mv62 -filetype=obj %s | llvm-objdump --disassemble - | FileCheck --check-prefix=CHECK-OBJDUMP %s
+# RUN: llvm-mc -triple=hexagon -mv65 -filetype=obj %s | llvm-objdump --disassemble - | FileCheck --check-prefix=CHECK-OBJDUMP %s
+# RUN: llvm-mc -triple=hexagon -mv67 -filetype=obj %s | llvm-objdump --disassemble - | FileCheck --check-prefix=CHECK-OBJDUMP %s
+# RUN: llvm-mc -triple=hexagon -mv68 -filetype=obj %s | llvm-objdump --disassemble - | FileCheck --check-prefix=CHECK-OBJDUMP %s
+# RUN: llvm-mc -triple=hexagon -mv69 -filetype=obj %s | llvm-objdump --disassemble - | FileCheck --check-prefix=CHECK-OBJDUMP %s
.text
r1 = r1
diff --git a/llvm/test/MC/Hexagon/bug15961.s b/llvm/test/MC/Hexagon/bug15961.s
index 7173aa0b7be9d3b..aa662ba9d76ee84 100644
--- a/llvm/test/MC/Hexagon/bug15961.s
+++ b/llvm/test/MC/Hexagon/bug15961.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -mv65 -filetype=obj %s | llvm-objdump --no-print-imm-hex -d - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -mv65 -filetype=obj %s | llvm-objdump --no-print-imm-hex -d - | FileCheck %s
#
{
diff --git a/llvm/test/MC/Hexagon/bug18767.s b/llvm/test/MC/Hexagon/bug18767.s
index 35604f379cacfb9..956aee45756c07f 100644
--- a/llvm/test/MC/Hexagon/bug18767.s
+++ b/llvm/test/MC/Hexagon/bug18767.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -arch=hexagon -filetype=asm %s 2>%t; FileCheck %s < %t
+# RUN: not llvm-mc -triple=hexagon -filetype=asm %s 2>%t; FileCheck %s < %t
.L_:
{
diff --git a/llvm/test/MC/Hexagon/bug24609.s b/llvm/test/MC/Hexagon/bug24609.s
index b64b5b817f006f6..e3da5e244ac9b59 100644
--- a/llvm/test/MC/Hexagon/bug24609.s
+++ b/llvm/test/MC/Hexagon/bug24609.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -filetype=obj %s | llvm-objdump --no-print-imm-hex -d - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -filetype=obj %s | llvm-objdump --no-print-imm-hex -d - | FileCheck %s
{ p0 = cmp.eq(r0,#0) ; if (p0.new) dealloc_return:t }
diff --git a/llvm/test/MC/Hexagon/bug28416.s b/llvm/test/MC/Hexagon/bug28416.s
index 237d577a7a486b0..b464c75a3838ffa 100644
--- a/llvm/test/MC/Hexagon/bug28416.s
+++ b/llvm/test/MC/Hexagon/bug28416.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -filetype=obj -o - %s | llvm-objdump -d -
+# RUN: llvm-mc -triple=hexagon -filetype=obj -o - %s | llvm-objdump -d -
# r0 = r6 and jump ##undefined should compound to J4_jumpsetr
# CHECK: { immext(#0)
diff --git a/llvm/test/MC/Hexagon/bug_28748.s b/llvm/test/MC/Hexagon/bug_28748.s
index 74543f20ba002c7..24f24a796dc1863 100644
--- a/llvm/test/MC/Hexagon/bug_28748.s
+++ b/llvm/test/MC/Hexagon/bug_28748.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -mcpu=hexagonv65 -filetype=obj %s | llvm-objdump --no-print-imm-hex --mcpu=hexagonv65 -d - | FileCheck --implicit-check-not='{' %s
+# RUN: llvm-mc -triple=hexagon -mcpu=hexagonv65 -filetype=obj %s | llvm-objdump --no-print-imm-hex --mcpu=hexagonv65 -d - | FileCheck --implicit-check-not='{' %s
# This case requires compounding only some of the instructions which are
# possible compounds. Compounding all possible opcodes is ideal for code size
diff --git a/llvm/test/MC/Hexagon/c4_newval.s b/llvm/test/MC/Hexagon/c4_newval.s
index 356a3695c58d17f..db07b1728de29ad 100644
--- a/llvm/test/MC/Hexagon/c4_newval.s
+++ b/llvm/test/MC/Hexagon/c4_newval.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -arch=hexagon %s 2>%t; FileCheck --implicit-check-not=error: %s <%t
+# RUN: not llvm-mc -triple=hexagon %s 2>%t; FileCheck --implicit-check-not=error: %s <%t
.Lfoo:
{ p3:0 = r0
diff --git a/llvm/test/MC/Hexagon/cmpyrw.s b/llvm/test/MC/Hexagon/cmpyrw.s
index c93205f43ab6d7c..d22f06db22cd4e3 100644
--- a/llvm/test/MC/Hexagon/cmpyrw.s
+++ b/llvm/test/MC/Hexagon/cmpyrw.s
@@ -1,3 +1,3 @@
-# RUN: llvm-mc -arch=hexagon -mv67t -filetype=obj %s | llvm-objdump --mcpu=hexagonv67t --mattr=+audio -d - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -mv67t -filetype=obj %s | llvm-objdump --mcpu=hexagonv67t --mattr=+audio -d - | FileCheck %s
r23:22 = cmpyrw(r15:14,r21:20*)
# CHECK: r23:22 = cmpyrw(r15:14,r21:20*)
diff --git a/llvm/test/MC/Hexagon/common-redeclare.s b/llvm/test/MC/Hexagon/common-redeclare.s
index 1babad14255741f..91ab645fe35837c 100644
--- a/llvm/test/MC/Hexagon/common-redeclare.s
+++ b/llvm/test/MC/Hexagon/common-redeclare.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -filetype=obj %s | llvm-objdump -t - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -filetype=obj %s | llvm-objdump -t - | FileCheck %s
# CHECK: 00000062 O *COM* 00000008 quartet_table_isqrt
diff --git a/llvm/test/MC/Hexagon/dcfetch-symbol.s b/llvm/test/MC/Hexagon/dcfetch-symbol.s
index 8309439a2aaa042..ad182fa47819be8 100644
--- a/llvm/test/MC/Hexagon/dcfetch-symbol.s
+++ b/llvm/test/MC/Hexagon/dcfetch-symbol.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -arch=hexagon -filetype=obj %s
+# RUN: not llvm-mc -triple=hexagon -filetype=obj %s
#CHECK: 9400c000 { dcfetch(r0 + #0) }
diff --git a/llvm/test/MC/Hexagon/dealloc-return-jump.s b/llvm/test/MC/Hexagon/dealloc-return-jump.s
index 0d480bef85d2bd5..fae0804ab52737b 100644
--- a/llvm/test/MC/Hexagon/dealloc-return-jump.s
+++ b/llvm/test/MC/Hexagon/dealloc-return-jump.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -arch=hexagon -mcpu=hexagonv62 -filetype=obj -o - %s
+# RUN: not llvm-mc -triple=hexagon -mcpu=hexagonv62 -filetype=obj -o - %s
# Check that a duplex involving dealloc_return is correctly checked
# dealloc_return cannot be involved in a double jump packet
diff --git a/llvm/test/MC/Hexagon/decode_acc_type.s b/llvm/test/MC/Hexagon/decode_acc_type.s
index e822ed3945c5b00..98a0d5d1c52ab8b 100644
--- a/llvm/test/MC/Hexagon/decode_acc_type.s
+++ b/llvm/test/MC/Hexagon/decode_acc_type.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -filetype=obj %s | llvm-objdump --no-print-imm-hex -d - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -filetype=obj %s | llvm-objdump --no-print-imm-hex -d - | FileCheck %s
#
# Currently ignore if there is one or two #'s
diff --git a/llvm/test/MC/Hexagon/dis-duplex-p0.s b/llvm/test/MC/Hexagon/dis-duplex-p0.s
index e41ff9ec606b30f..0ed688e028e9e0e 100644
--- a/llvm/test/MC/Hexagon/dis-duplex-p0.s
+++ b/llvm/test/MC/Hexagon/dis-duplex-p0.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=hexagon -filetype=obj -o - %s | llvm-objdump --no-print-imm-hex -d - | FileCheck %s
+// RUN: llvm-mc -triple=hexagon -filetype=obj -o - %s | llvm-objdump --no-print-imm-hex -d - | FileCheck %s
{ r7 = #-1
r6 = #-1 }
diff --git a/llvm/test/MC/Hexagon/double-vector-producer.s b/llvm/test/MC/Hexagon/double-vector-producer.s
index e10917b06fb4229..d1e5c5d6882de6d 100644
--- a/llvm/test/MC/Hexagon/double-vector-producer.s
+++ b/llvm/test/MC/Hexagon/double-vector-producer.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -mcpu=hexagonv60 -mhvx -filetype=obj %s | llvm-objdump -d - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -mcpu=hexagonv60 -mhvx -filetype=obj %s | llvm-objdump -d - | FileCheck %s
{
v1:0 = vshuff(v1,v0,r7)
v2.w = vadd(v13.w,v15.w)
diff --git a/llvm/test/MC/Hexagon/duplex-addi-global-imm.s b/llvm/test/MC/Hexagon/duplex-addi-global-imm.s
index e8e338c6a582bac..dd27be01ae4007e 100644
--- a/llvm/test/MC/Hexagon/duplex-addi-global-imm.s
+++ b/llvm/test/MC/Hexagon/duplex-addi-global-imm.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -show-encoding %s | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -show-encoding %s | FileCheck %s
# Check that we generate a duplex for this packet.
# CHECK: encoding: [A,0x40'A',A,A,0x01'B',0x28'B',B,0x20'B']
diff --git a/llvm/test/MC/Hexagon/elf-flags.s b/llvm/test/MC/Hexagon/elf-flags.s
index d392e7e1db24dbc..f6df80d57a257c2 100644
--- a/llvm/test/MC/Hexagon/elf-flags.s
+++ b/llvm/test/MC/Hexagon/elf-flags.s
@@ -1,7 +1,7 @@
-# RUN: llvm-mc -arch=hexagon -mcpu=hexagonv5 --filetype=obj %s -o - | llvm-readelf --file-headers - | FileCheck --check-prefix=CHECK-V5 %s
-# RUN: llvm-mc -arch=hexagon -mcpu=hexagonv55 --filetype=obj %s -o - | llvm-readelf --file-headers - | FileCheck --check-prefix=CHECK-V55 %s
-# RUN: llvm-mc -arch=hexagon -mcpu=hexagonv60 --filetype=obj %s -o - | llvm-readelf --file-headers - | FileCheck --check-prefix=CHECK-V60 %s
-# RUN: llvm-mc -arch=hexagon -mcpu=hexagonv62 --filetype=obj %s -o - | llvm-readelf --file-headers - | FileCheck --check-prefix=CHECK-V62 %s
+# RUN: llvm-mc -triple=hexagon -mcpu=hexagonv5 --filetype=obj %s -o - | llvm-readelf --file-headers - | FileCheck --check-prefix=CHECK-V5 %s
+# RUN: llvm-mc -triple=hexagon -mcpu=hexagonv55 --filetype=obj %s -o - | llvm-readelf --file-headers - | FileCheck --check-prefix=CHECK-V55 %s
+# RUN: llvm-mc -triple=hexagon -mcpu=hexagonv60 --filetype=obj %s -o - | llvm-readelf --file-headers - | FileCheck --check-prefix=CHECK-V60 %s
+# RUN: llvm-mc -triple=hexagon -mcpu=hexagonv62 --filetype=obj %s -o - | llvm-readelf --file-headers - | FileCheck --check-prefix=CHECK-V62 %s
# CHECK-V5: Flags: 0x4
# CHECK-V55: Flags: 0x5
diff --git a/llvm/test/MC/Hexagon/equ.s b/llvm/test/MC/Hexagon/equ.s
index fbf09edbbc1e0e1..900c2ac3eb39308 100644
--- a/llvm/test/MC/Hexagon/equ.s
+++ b/llvm/test/MC/Hexagon/equ.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -arch=hexagon %s 2> %t
+# RUN: not llvm-mc -triple=hexagon %s 2> %t
# RUN: FileCheck < %t %s
.equ a, 0
diff --git a/llvm/test/MC/Hexagon/ext-callt-rel.s b/llvm/test/MC/Hexagon/ext-callt-rel.s
index 344a8fbc11b94e4..ced09805f8c8870 100644
--- a/llvm/test/MC/Hexagon/ext-callt-rel.s
+++ b/llvm/test/MC/Hexagon/ext-callt-rel.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -filetype=obj %s -o - | llvm-objdump -r - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -filetype=obj %s -o - | llvm-objdump -r - | FileCheck %s
if (p0) call foo
#CHECK: R_HEX_B32_PCREL_X
diff --git a/llvm/test/MC/Hexagon/extender.s b/llvm/test/MC/Hexagon/extender.s
index 2b27901c30a7eaa..d2f15ccb2c19dd6 100644
--- a/llvm/test/MC/Hexagon/extender.s
+++ b/llvm/test/MC/Hexagon/extender.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -filetype=obj %s | llvm-objdump --no-print-imm-hex -d - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -filetype=obj %s | llvm-objdump --no-print-imm-hex -d - | FileCheck %s
#
# STrib_abs_V4
diff --git a/llvm/test/MC/Hexagon/extensions/v67_hvx.s b/llvm/test/MC/Hexagon/extensions/v67_hvx.s
index 2b1923cb6dd5966..f1f77979540ec8d 100644
--- a/llvm/test/MC/Hexagon/extensions/v67_hvx.s
+++ b/llvm/test/MC/Hexagon/extensions/v67_hvx.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -mcpu=hexagonv67 -mhvx -filetype=obj %s | llvm-objdump --no-print-imm-hex --mcpu=hexagonv67 --mattr=+hvx -d - | FileCheck --implicit-check-not='{' %s
+# RUN: llvm-mc -triple=hexagon -mcpu=hexagonv67 -mhvx -filetype=obj %s | llvm-objdump --no-print-imm-hex --mcpu=hexagonv67 --mattr=+hvx -d - | FileCheck --implicit-check-not='{' %s
diff --git a/llvm/test/MC/Hexagon/extensions/v67t_audio.s b/llvm/test/MC/Hexagon/extensions/v67t_audio.s
index e941f94146e3366..04d004f5f12a4f9 100644
--- a/llvm/test/MC/Hexagon/extensions/v67t_audio.s
+++ b/llvm/test/MC/Hexagon/extensions/v67t_audio.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -mcpu=hexagonv67t -filetype=obj %s | llvm-objdump --no-print-imm-hex --mcpu=hexagonv67t -d - | FileCheck --implicit-check-not='{' %s
+# RUN: llvm-mc -triple=hexagon -mcpu=hexagonv67t -filetype=obj %s | llvm-objdump --no-print-imm-hex --mcpu=hexagonv67t -d - | FileCheck --implicit-check-not='{' %s
diff --git a/llvm/test/MC/Hexagon/fixups.s b/llvm/test/MC/Hexagon/fixups.s
index 8f86db7ae18f181..d6fee5b028e2375 100644
--- a/llvm/test/MC/Hexagon/fixups.s
+++ b/llvm/test/MC/Hexagon/fixups.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -filetype=obj %s | llvm-objdump --no-print-imm-hex -d - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -filetype=obj %s | llvm-objdump --no-print-imm-hex -d - | FileCheck %s
.text
# CHECK-LABEL: 0:
diff --git a/llvm/test/MC/Hexagon/got.s b/llvm/test/MC/Hexagon/got.s
index 85409ee4a900dc7..bffe989a98a57d8 100644
--- a/llvm/test/MC/Hexagon/got.s
+++ b/llvm/test/MC/Hexagon/got.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -filetype=obj %s | llvm-objdump -r - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -filetype=obj %s | llvm-objdump -r - | FileCheck %s
#
# make sure the fixups emitted match what is
diff --git a/llvm/test/MC/Hexagon/gprel-shflag.s b/llvm/test/MC/Hexagon/gprel-shflag.s
index 6a8a9a027b69175..2d27bc7a16b28ae 100644
--- a/llvm/test/MC/Hexagon/gprel-shflag.s
+++ b/llvm/test/MC/Hexagon/gprel-shflag.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -filetype=asm %s | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -filetype=asm %s | FileCheck %s
# Make sure the assembler can parse and print the "s" flag for Hexaon's
# small-data section.
diff --git a/llvm/test/MC/Hexagon/guest.s b/llvm/test/MC/Hexagon/guest.s
index 8f8d7c410ef4023..60fdd94bc573872 100644
--- a/llvm/test/MC/Hexagon/guest.s
+++ b/llvm/test/MC/Hexagon/guest.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -mcpu=hexagonv62 -filetype=obj %s | llvm-objdump --no-print-imm-hex -d - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -mcpu=hexagonv62 -filetype=obj %s | llvm-objdump --no-print-imm-hex -d - | FileCheck %s
r0=gpmucnt4
# CHECK: { r0 = gpmucnt4 }
diff --git a/llvm/test/MC/Hexagon/hex-immediates.s b/llvm/test/MC/Hexagon/hex-immediates.s
index 8a0ed9a810e87cf..6bdd00cf7f719ac 100644
--- a/llvm/test/MC/Hexagon/hex-immediates.s
+++ b/llvm/test/MC/Hexagon/hex-immediates.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -filetype=obj -arch=hexagon %s | llvm-objdump -d --print-imm-hex - | FileCheck %s
+# RUN: llvm-mc -filetype=obj -triple=hexagon %s | llvm-objdump -d --print-imm-hex - | FileCheck %s
# CHECK: r3 = ##0x70000240
r3 = ##1879048768
diff --git a/llvm/test/MC/Hexagon/hvx-double-implies-hvx.s b/llvm/test/MC/Hexagon/hvx-double-implies-hvx.s
index a2de7e290e8e383..5c409ab733022d6 100644
--- a/llvm/test/MC/Hexagon/hvx-double-implies-hvx.s
+++ b/llvm/test/MC/Hexagon/hvx-double-implies-hvx.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -filetype=obj -arch=hexagon -mv65 -mattr=+hvxv65,+hvx-length128b %s | llvm-objdump -d --mattr=+hvx - | FileCheck %s
+# RUN: llvm-mc -filetype=obj -triple=hexagon -mv65 -mattr=+hvxv65,+hvx-length128b %s | llvm-objdump -d --mattr=+hvx - | FileCheck %s
# CHECK: vhist
vhist
diff --git a/llvm/test/MC/Hexagon/hvx-swapped-regpairs-alias-neg.s b/llvm/test/MC/Hexagon/hvx-swapped-regpairs-alias-neg.s
index 1988f90dc56e39c..5a0b628c992a40e 100644
--- a/llvm/test/MC/Hexagon/hvx-swapped-regpairs-alias-neg.s
+++ b/llvm/test/MC/Hexagon/hvx-swapped-regpairs-alias-neg.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -arch=hexagon -mcpu=hexagonv67 -mhvx -filetype=asm %s 2>%t; FileCheck --implicit-check-not="error:" %s <%t
+# RUN: not llvm-mc -triple=hexagon -mcpu=hexagonv67 -mhvx -filetype=asm %s 2>%t; FileCheck --implicit-check-not="error:" %s <%t
{
v1:0 = #0
diff --git a/llvm/test/MC/Hexagon/hvx-swapped-regpairs.s b/llvm/test/MC/Hexagon/hvx-swapped-regpairs.s
index 18bfafed2f98646..8fd722621876d59 100644
--- a/llvm/test/MC/Hexagon/hvx-swapped-regpairs.s
+++ b/llvm/test/MC/Hexagon/hvx-swapped-regpairs.s
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -filetype=obj -arch=hexagon -mcpu=hexagonv67 -mhvx %s | llvm-objdump --no-print-imm-hex -d --mcpu=hexagonv67 --mattr=+hvx - | FileCheck %s
-# RUN: not llvm-mc -arch=hexagon -mcpu=hexagonv65 -mhvx -filetype=asm %s 2>%t; FileCheck --check-prefix=CHECK-V65 --implicit-check-not="error:" %s <%t
+# RUN: llvm-mc -filetype=obj -triple=hexagon -mcpu=hexagonv67 -mhvx %s | llvm-objdump --no-print-imm-hex -d --mcpu=hexagonv67 --mattr=+hvx - | FileCheck %s
+# RUN: not llvm-mc -triple=hexagon -mcpu=hexagonv65 -mhvx -filetype=asm %s 2>%t; FileCheck --check-prefix=CHECK-V65 --implicit-check-not="error:" %s <%t
v1:0.w = vadd(v0.h, v1.h) // Normal
# CHECK: 1ca1c080
diff --git a/llvm/test/MC/Hexagon/hvx-tmp-accum-no-erros.s b/llvm/test/MC/Hexagon/hvx-tmp-accum-no-erros.s
index 255851c7dae0110..a43c8084dbfa038 100644
--- a/llvm/test/MC/Hexagon/hvx-tmp-accum-no-erros.s
+++ b/llvm/test/MC/Hexagon/hvx-tmp-accum-no-erros.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -mattr=+hvxv68 -filetype=obj %s | llvm-objdump --no-print-imm-hex --mattr=+hvxv68 -d - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -mattr=+hvxv68 -filetype=obj %s | llvm-objdump --no-print-imm-hex --mattr=+hvxv68 -d - | FileCheck %s
# packet w/accum with register
diff erent from one loaded to
{
diff --git a/llvm/test/MC/Hexagon/hvx-tmp-accum.s b/llvm/test/MC/Hexagon/hvx-tmp-accum.s
index d5871696bb9b89f..4adf9028e8b6c00 100644
--- a/llvm/test/MC/Hexagon/hvx-tmp-accum.s
+++ b/llvm/test/MC/Hexagon/hvx-tmp-accum.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -arch=hexagon -mhvx -filetype=asm %s 2>%t; FileCheck --implicit-check-not="error:" %s <%t
+# RUN: not llvm-mc -triple=hexagon -mhvx -filetype=asm %s 2>%t; FileCheck --implicit-check-not="error:" %s <%t
{
v0.tmp = vmem(r0+#0)
v0 += vrmpyub(v1, r1)
diff --git a/llvm/test/MC/Hexagon/hvx_cur_alias.s b/llvm/test/MC/Hexagon/hvx_cur_alias.s
index ed16659d4522f52..66f7595381e040f 100644
--- a/llvm/test/MC/Hexagon/hvx_cur_alias.s
+++ b/llvm/test/MC/Hexagon/hvx_cur_alias.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -mcpu=hexagonv60 -mhvx -filetype=obj %s 2>&1 | llvm-objdump --mattr=+hvx -d - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -mcpu=hexagonv60 -mhvx -filetype=obj %s 2>&1 | llvm-objdump --mattr=+hvx -d - | FileCheck %s
{ v2.cur = vmem(r11++m0)
v5:4.h = vmpa(v3:2.ub,v5:4.ub)
diff --git a/llvm/test/MC/Hexagon/inval_immed.s b/llvm/test/MC/Hexagon/inval_immed.s
index 12600b09eff897f..41604ff4ef23e7a 100644
--- a/llvm/test/MC/Hexagon/inval_immed.s
+++ b/llvm/test/MC/Hexagon/inval_immed.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -filetype=asm -arch=hexagon %s 2>%t; FileCheck %s < %t
+# RUN: not llvm-mc -filetype=asm -triple=hexagon %s 2>%t; FileCheck %s < %t
.text
r0 = mpyi(r0,#m9)
diff --git a/llvm/test/MC/Hexagon/load-GPRel.s b/llvm/test/MC/Hexagon/load-GPRel.s
index 613094a63f6ffd5..0d8959d034eacca 100644
--- a/llvm/test/MC/Hexagon/load-GPRel.s
+++ b/llvm/test/MC/Hexagon/load-GPRel.s
@@ -1,4 +1,4 @@
-#RUN: llvm-mc -arch=hexagon -filetype=obj %s | llvm-objdump --no-print-imm-hex -d - | FileCheck %s
+#RUN: llvm-mc -triple=hexagon -filetype=obj %s | llvm-objdump --no-print-imm-hex -d - | FileCheck %s
# Check encoding bits for GP-relative loads.
diff --git a/llvm/test/MC/Hexagon/missing_label.s b/llvm/test/MC/Hexagon/missing_label.s
index f916f2f4310a4c6..dc270c2a3e2c246 100644
--- a/llvm/test/MC/Hexagon/missing_label.s
+++ b/llvm/test/MC/Hexagon/missing_label.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -filetype=obj %s | llvm-objdump -d - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -filetype=obj %s | llvm-objdump -d - | FileCheck %s
#
.I1:
diff --git a/llvm/test/MC/Hexagon/multiple-pc4.s b/llvm/test/MC/Hexagon/multiple-pc4.s
index 697991961a5ddbf..df759ff8b0b97f3 100644
--- a/llvm/test/MC/Hexagon/multiple-pc4.s
+++ b/llvm/test/MC/Hexagon/multiple-pc4.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -filetype=asm %s 2>%t; FileCheck --implicit-check-not=error: %s <%t
+# RUN: llvm-mc -triple=hexagon -filetype=asm %s 2>%t; FileCheck --implicit-check-not=error: %s <%t
# Check that multiple changes to a predicate in a packet are caught.
diff --git a/llvm/test/MC/Hexagon/multiple_errs.s b/llvm/test/MC/Hexagon/multiple_errs.s
index cd04c0efbd360e1..03afbac966b7fde 100644
--- a/llvm/test/MC/Hexagon/multiple_errs.s
+++ b/llvm/test/MC/Hexagon/multiple_errs.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -arch=hexagon -filetype=asm %s 2> %t; FileCheck %s < %t
+# RUN: not llvm-mc -triple=hexagon -filetype=asm %s 2> %t; FileCheck %s < %t
#
{
diff --git a/llvm/test/MC/Hexagon/non-relocatable.s b/llvm/test/MC/Hexagon/non-relocatable.s
index 72a17901c622677..698e67ac1bed657 100644
--- a/llvm/test/MC/Hexagon/non-relocatable.s
+++ b/llvm/test/MC/Hexagon/non-relocatable.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -arch=hexagon -filetype=obj %s 2>%t; FileCheck %s <%t
+# RUN: not llvm-mc -triple=hexagon -filetype=obj %s 2>%t; FileCheck %s <%t
# Don't allow a symbolic operand for an insn that cannot take a
# relocation.
diff --git a/llvm/test/MC/Hexagon/not-over.s b/llvm/test/MC/Hexagon/not-over.s
index c31ce5312305090..01204724506084c 100644
--- a/llvm/test/MC/Hexagon/not-over.s
+++ b/llvm/test/MC/Hexagon/not-over.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -filetype=asm %s 2>%t; FileCheck %s <%t
+# RUN: llvm-mc -triple=hexagon -filetype=asm %s 2>%t; FileCheck %s <%t
#
# Check that proper packets are not wrongly flagged as invalid.
diff --git a/llvm/test/MC/Hexagon/not_found.s b/llvm/test/MC/Hexagon/not_found.s
index 9f1ba4d76e5dc43..3654af11f583fc2 100644
--- a/llvm/test/MC/Hexagon/not_found.s
+++ b/llvm/test/MC/Hexagon/not_found.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -arch=hexagon -filetype=asm junk123.s 2>%t ; FileCheck -DMSG=%errc_ENOENT %s < %t
+# RUN: not llvm-mc -triple=hexagon -filetype=asm junk123.s 2>%t ; FileCheck -DMSG=%errc_ENOENT %s < %t
#
# CHECK: junk123.s: [[MSG]]
diff --git a/llvm/test/MC/Hexagon/nowarn.s b/llvm/test/MC/Hexagon/nowarn.s
index f5b24ebe59063a0..ed0d7ddabd26942 100644
--- a/llvm/test/MC/Hexagon/nowarn.s
+++ b/llvm/test/MC/Hexagon/nowarn.s
@@ -1,6 +1,6 @@
-# RUN: llvm-mc -arch=hexagon -mhvx --filetype=asm %s -o - 2>&1 | FileCheck %s
-# RUN: llvm-mc --no-warn -arch=hexagon -mhvx --filetype=obj %s -o - | llvm-objdump -d - | FileCheck --check-prefix=CHECK-NOWARN %s
-# RUN: not llvm-mc --fatal-warnings -arch=hexagon -mhvx --filetype=asm %s 2>&1 | FileCheck --check-prefix=CHECK-FATAL-WARN %s
+# RUN: llvm-mc -triple=hexagon -mhvx --filetype=asm %s -o - 2>&1 | FileCheck %s
+# RUN: llvm-mc --no-warn -triple=hexagon -mhvx --filetype=obj %s -o - | llvm-objdump -d - | FileCheck --check-prefix=CHECK-NOWARN %s
+# RUN: not llvm-mc --fatal-warnings -triple=hexagon -mhvx --filetype=asm %s 2>&1 | FileCheck --check-prefix=CHECK-FATAL-WARN %s
.text
.warning
diff --git a/llvm/test/MC/Hexagon/offset.s b/llvm/test/MC/Hexagon/offset.s
index 5cd60daff06e781..9cc8e8b3dcdc40a 100644
--- a/llvm/test/MC/Hexagon/offset.s
+++ b/llvm/test/MC/Hexagon/offset.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -filetype=obj %s | llvm-objdump -t - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -filetype=obj %s | llvm-objdump -t - | FileCheck %s
#
sym_a:
diff --git a/llvm/test/MC/Hexagon/operand-range.s b/llvm/test/MC/Hexagon/operand-range.s
index c38aab7060ddf16..868b38ff6fcc734 100644
--- a/llvm/test/MC/Hexagon/operand-range.s
+++ b/llvm/test/MC/Hexagon/operand-range.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -arch=hexagon -filetype=asm %s 2>&1 | FileCheck %s
+# RUN: not llvm-mc -triple=hexagon -filetype=asm %s 2>&1 | FileCheck %s
# Expect errors here, insn needs to be extended
R1 = mpyi(R2, #-256)
diff --git a/llvm/test/MC/Hexagon/parse-pound-hi.s b/llvm/test/MC/Hexagon/parse-pound-hi.s
index a1f73ec1953c3f9..5f51764be4d3e4b 100644
--- a/llvm/test/MC/Hexagon/parse-pound-hi.s
+++ b/llvm/test/MC/Hexagon/parse-pound-hi.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -filetype=obj %s | llvm-objdump --no-print-imm-hex -d - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -filetype=obj %s | llvm-objdump --no-print-imm-hex -d - | FileCheck %s
memw(gp+#hi_htc_version) = r3
#CHECK: 4880c300 { memw(gp+#0) = r3 }
diff --git a/llvm/test/MC/Hexagon/pcrel.s b/llvm/test/MC/Hexagon/pcrel.s
index 368fea5c2b303cc..282f09d405a9c23 100644
--- a/llvm/test/MC/Hexagon/pcrel.s
+++ b/llvm/test/MC/Hexagon/pcrel.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -filetype=obj %s | llvm-objdump -r - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -filetype=obj %s | llvm-objdump -r - | FileCheck %s
#
# make sure the fixups emitted match what is
diff --git a/llvm/test/MC/Hexagon/plt-rel.s b/llvm/test/MC/Hexagon/plt-rel.s
index 90526c660ab5b83..bdd8091655b929c 100644
--- a/llvm/test/MC/Hexagon/plt-rel.s
+++ b/llvm/test/MC/Hexagon/plt-rel.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -filetype=obj %s | llvm-objdump -d -r - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -filetype=obj %s | llvm-objdump -d -r - | FileCheck %s
call foo at GDPLT
# CHECK: R_HEX_GD_PLT_B22_PCREL
diff --git a/llvm/test/MC/Hexagon/quad_regs.s b/llvm/test/MC/Hexagon/quad_regs.s
index 3041d60307ecdcd..68fbde0bce9967f 100644
--- a/llvm/test/MC/Hexagon/quad_regs.s
+++ b/llvm/test/MC/Hexagon/quad_regs.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -mcpu=hexagonv66 -mhvx -filetype=obj %s | llvm-objdump --mcpu=hexagonv66 --mattr=+hvx -d - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -mcpu=hexagonv66 -mhvx -filetype=obj %s | llvm-objdump --mcpu=hexagonv66 --mattr=+hvx -d - | FileCheck %s
# Test for quad register parsing and printing
# CHECK: { v3:0.w = vrmpyz(v0.b,r0.b) }
diff --git a/llvm/test/MC/Hexagon/register-alt-names.s b/llvm/test/MC/Hexagon/register-alt-names.s
index 3e514661887e257..3c9ab753dfff8b0 100644
--- a/llvm/test/MC/Hexagon/register-alt-names.s
+++ b/llvm/test/MC/Hexagon/register-alt-names.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon < %s | FileCheck %s
+# RUN: llvm-mc -triple=hexagon < %s | FileCheck %s
# CHECK: r0 = r31
r0 = lr
diff --git a/llvm/test/MC/Hexagon/registers_readonly.s b/llvm/test/MC/Hexagon/registers_readonly.s
index cf109feef0361ad..cb9032b494ea4e3 100644
--- a/llvm/test/MC/Hexagon/registers_readonly.s
+++ b/llvm/test/MC/Hexagon/registers_readonly.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -arch=hexagon -filetype=obj -mv5 %s 2>&1 | FileCheck %s
+# RUN: not llvm-mc -triple=hexagon -filetype=obj -mv5 %s 2>&1 | FileCheck %s
# CHECK: 4:1: error: Cannot write to read-only register `PC'
pc = r0
diff --git a/llvm/test/MC/Hexagon/ro-c9.s b/llvm/test/MC/Hexagon/ro-c9.s
index 6771430cb95ccef..5dd3f8320c23d1f 100644
--- a/llvm/test/MC/Hexagon/ro-c9.s
+++ b/llvm/test/MC/Hexagon/ro-c9.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -filetype=asm %s 2> %t; FileCheck %s < %t
+# RUN: llvm-mc -triple=hexagon -filetype=asm %s 2> %t; FileCheck %s < %t
# Check that changes to a read-only register is caught.
diff --git a/llvm/test/MC/Hexagon/ro-cc9.s b/llvm/test/MC/Hexagon/ro-cc9.s
index 0596ca1627f9b74..2080ab6c13cc454 100644
--- a/llvm/test/MC/Hexagon/ro-cc9.s
+++ b/llvm/test/MC/Hexagon/ro-cc9.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -arch=hexagon -filetype=asm %s 2> %t; FileCheck %s < %t
+# RUN: not llvm-mc -triple=hexagon -filetype=asm %s 2> %t; FileCheck %s < %t
#
# Check that changes to a read-only register is caught.
diff --git a/llvm/test/MC/Hexagon/smallcore_dis.s b/llvm/test/MC/Hexagon/smallcore_dis.s
index 898b9008bfc4907..a5ea7663706e933 100644
--- a/llvm/test/MC/Hexagon/smallcore_dis.s
+++ b/llvm/test/MC/Hexagon/smallcore_dis.s
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=hexagon -mcpu=hexagonv67t -filetype=obj %s | llvm-objdump --no-print-imm-hex -d - | FileCheck %s
-# RUN: llvm-mc -arch=hexagon -mcpu=hexagonv67t -filetype=obj %s | llvm-objdump --no-print-imm-hex --mcpu=hexagonv67t -d - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -mcpu=hexagonv67t -filetype=obj %s | llvm-objdump --no-print-imm-hex -d - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -mcpu=hexagonv67t -filetype=obj %s | llvm-objdump --no-print-imm-hex --mcpu=hexagonv67t -d - | FileCheck %s
.text
{
diff --git a/llvm/test/MC/Hexagon/solo-axok.s b/llvm/test/MC/Hexagon/solo-axok.s
index 2df5796e628dffc..a0d6e12fc9dc285 100644
--- a/llvm/test/MC/Hexagon/solo-axok.s
+++ b/llvm/test/MC/Hexagon/solo-axok.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -arch=hexagon -filetype=asm -mcpu=hexagonv55 %s 2>%t; FileCheck %s < %t
+# RUN: not llvm-mc -triple=hexagon -filetype=asm -mcpu=hexagonv55 %s 2>%t; FileCheck %s < %t
#
{
sp=asrh(r6)
diff --git a/llvm/test/MC/Hexagon/store-GPRel.s b/llvm/test/MC/Hexagon/store-GPRel.s
index 8e0fde54f9383c4..683e746985bbc13 100644
--- a/llvm/test/MC/Hexagon/store-GPRel.s
+++ b/llvm/test/MC/Hexagon/store-GPRel.s
@@ -1,4 +1,4 @@
-#RUN: llvm-mc -arch=hexagon -filetype=obj %s | llvm-objdump --no-print-imm-hex -d -r - | FileCheck %s
+#RUN: llvm-mc -triple=hexagon -filetype=obj %s | llvm-objdump --no-print-imm-hex -d -r - | FileCheck %s
# Check encoding bits for gp-rel stores.
diff --git a/llvm/test/MC/Hexagon/sysregs.s b/llvm/test/MC/Hexagon/sysregs.s
index 0a708a370830eff..3a11d6b5abe0704 100644
--- a/llvm/test/MC/Hexagon/sysregs.s
+++ b/llvm/test/MC/Hexagon/sysregs.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -filetype=asm %s | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -filetype=asm %s | FileCheck %s
#
r1:0=s75:74
diff --git a/llvm/test/MC/Hexagon/sysregs2.s b/llvm/test/MC/Hexagon/sysregs2.s
index 1017fabed7c8278..0447b6dcb0e7cf9 100644
--- a/llvm/test/MC/Hexagon/sysregs2.s
+++ b/llvm/test/MC/Hexagon/sysregs2.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -filetype=obj %s | llvm-objdump -d - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -filetype=obj %s | llvm-objdump -d - | FileCheck %s
#
sgp1:0=r1:0
diff --git a/llvm/test/MC/Hexagon/sysregs3.s b/llvm/test/MC/Hexagon/sysregs3.s
index 03ff7d73b2a92fe..0409f150336d862 100644
--- a/llvm/test/MC/Hexagon/sysregs3.s
+++ b/llvm/test/MC/Hexagon/sysregs3.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -filetype=obj %s | llvm-objdump -d - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -filetype=obj %s | llvm-objdump -d - | FileCheck %s
#
# Verify exceptions to the grouping rules for some registers.
diff --git a/llvm/test/MC/Hexagon/tied-ops.s b/llvm/test/MC/Hexagon/tied-ops.s
index a18e9e475c2c0c4..b71d5c6bcc73c37 100644
--- a/llvm/test/MC/Hexagon/tied-ops.s
+++ b/llvm/test/MC/Hexagon/tied-ops.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -filetype=asm %s 2> %t; FileCheck %s < %t
+# RUN: llvm-mc -triple=hexagon -filetype=asm %s 2> %t; FileCheck %s < %t
# Check that tied operands are caught
diff --git a/llvm/test/MC/Hexagon/tprel_noextend.s b/llvm/test/MC/Hexagon/tprel_noextend.s
index 0bc17c6ce576a1a..83c820369707c36 100644
--- a/llvm/test/MC/Hexagon/tprel_noextend.s
+++ b/llvm/test/MC/Hexagon/tprel_noextend.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -filetype=obj %s | llvm-objdump -d - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -filetype=obj %s | llvm-objdump -d - | FileCheck %s
#
# CHECK-NOT: immext
diff --git a/llvm/test/MC/Hexagon/two-extenders.s b/llvm/test/MC/Hexagon/two-extenders.s
index 42f317b2e3f79d4..58e49b63cca4ff3 100644
--- a/llvm/test/MC/Hexagon/two-extenders.s
+++ b/llvm/test/MC/Hexagon/two-extenders.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -filetype=obj %s | llvm-objdump --no-print-imm-hex -d - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -filetype=obj %s | llvm-objdump --no-print-imm-hex -d - | FileCheck %s
#
# In packets with two extensions assembler is not extending both instructions
diff --git a/llvm/test/MC/Hexagon/v60-misc.s b/llvm/test/MC/Hexagon/v60-misc.s
index c27377b7ce1e876..6fbe16b30ef76d3 100644
--- a/llvm/test/MC/Hexagon/v60-misc.s
+++ b/llvm/test/MC/Hexagon/v60-misc.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -mcpu=hexagonv60 -mhvx -filetype=obj %s | llvm-objdump --no-print-imm-hex --arch=hexagon --mcpu=hexagonv60 --mattr=+hvx -d - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -mcpu=hexagonv60 -mhvx -filetype=obj %s | llvm-objdump --no-print-imm-hex --triple=hexagon --mcpu=hexagonv60 --mattr=+hvx -d - | FileCheck %s
.L0:
diff --git a/llvm/test/MC/Hexagon/v62_all.s b/llvm/test/MC/Hexagon/v62_all.s
index b752ba2c2a82fb6..559aee35c44653d 100644
--- a/llvm/test/MC/Hexagon/v62_all.s
+++ b/llvm/test/MC/Hexagon/v62_all.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -mcpu=hexagonv62 -filetype=obj -mhvx %s | llvm-objdump --no-print-imm-hex --arch=hexagon --mcpu=hexagonv62 --mattr=+hvx -d - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -mcpu=hexagonv62 -filetype=obj -mhvx %s | llvm-objdump --no-print-imm-hex --triple=hexagon --mcpu=hexagonv62 --mattr=+hvx -d - | FileCheck %s
// V6_lvsplatb
// Vd32.b=vsplat(Rt32)
diff --git a/llvm/test/MC/Hexagon/v62_jumps.s b/llvm/test/MC/Hexagon/v62_jumps.s
index d1a1585619d231d..de498f25f2e95b8 100644
--- a/llvm/test/MC/Hexagon/v62_jumps.s
+++ b/llvm/test/MC/Hexagon/v62_jumps.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -mcpu=hexagonv62 -filetype=obj %s | llvm-objdump --arch=hexagon --mcpu=hexagonv62 -d - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -mcpu=hexagonv62 -filetype=obj %s | llvm-objdump --triple=hexagon --mcpu=hexagonv62 -d - | FileCheck %s
# verify compound is split into single instructions if needed
{
diff --git a/llvm/test/MC/Hexagon/v62a.s b/llvm/test/MC/Hexagon/v62a.s
index 4c6a25e26fde52b..968608c1c8b7234 100644
--- a/llvm/test/MC/Hexagon/v62a.s
+++ b/llvm/test/MC/Hexagon/v62a.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -mcpu=hexagonv62 -filetype=obj -o - %s | llvm-objdump --arch=hexagon --arch=hexagon --mcpu=hexagonv62 -d - | FileCheck %s
+# RUN: llvm-mc -arch=hexagon -mcpu=hexagonv62 -filetype=obj -o - %s | llvm-objdump --triple=hexagon --triple=hexagon --mcpu=hexagonv62 -d - | FileCheck %s
r31:30=vabs
diff b(r29:28, r27:26)
# CHECK: e8fadc1e { r31:30 = vabs
diff b(r29:28,r27:26)
diff --git a/llvm/test/MC/Hexagon/v62a_regs.s b/llvm/test/MC/Hexagon/v62a_regs.s
index 2d31b837afd4b10..334d8d4c00f817d 100644
--- a/llvm/test/MC/Hexagon/v62a_regs.s
+++ b/llvm/test/MC/Hexagon/v62a_regs.s
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=hexagon -mcpu=hexagonv62 -filetype=obj %s | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-V62
-# RUN: not llvm-mc -arch=hexagon -mcpu=hexagonv60 -filetype=asm %s 2>%t; FileCheck -check-prefix=CHECK-NOV62 %s < %t
+# RUN: llvm-mc -triple=hexagon -mcpu=hexagonv62 -filetype=obj %s | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-V62
+# RUN: not llvm-mc -triple=hexagon -mcpu=hexagonv60 -filetype=asm %s 2>%t; FileCheck -check-prefix=CHECK-NOV62 %s < %t
#
# Assure that v62 added registers are understood
diff --git a/llvm/test/MC/Hexagon/v65_all.s b/llvm/test/MC/Hexagon/v65_all.s
index 28b20cc9bdc4e9e..da50b881453b0ac 100644
--- a/llvm/test/MC/Hexagon/v65_all.s
+++ b/llvm/test/MC/Hexagon/v65_all.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -mv65 -mhvx -filetype=obj %s | llvm-objdump --no-print-imm-hex --mcpu=hexagonv65 --mattr=+hvx -d - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -mv65 -mhvx -filetype=obj %s | llvm-objdump --no-print-imm-hex --mcpu=hexagonv65 --mattr=+hvx -d - | FileCheck %s
// Warning: This file is auto generated by mktest.py. Do not edit!
// Created on: 2016-06-01 @ 17:33:01
diff --git a/llvm/test/MC/Hexagon/v66.s b/llvm/test/MC/Hexagon/v66.s
index c692a5953f7fe42..79f00c7d8fbe231 100644
--- a/llvm/test/MC/Hexagon/v66.s
+++ b/llvm/test/MC/Hexagon/v66.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -mcpu=hexagonv66 -mhvx -filetype=obj %s | llvm-objdump --mcpu=hexagonv66 --mattr=+hvx -d - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -mcpu=hexagonv66 -mhvx -filetype=obj %s | llvm-objdump --mcpu=hexagonv66 --mattr=+hvx -d - | FileCheck %s
# CHECK: 1d8362e4 { v4.w = vsatdw(v2.w,v3.w)
{
diff --git a/llvm/test/MC/Hexagon/v67.s b/llvm/test/MC/Hexagon/v67.s
index 6ca632ed37beadb..2a6727819d00c99 100644
--- a/llvm/test/MC/Hexagon/v67.s
+++ b/llvm/test/MC/Hexagon/v67.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -mv67 -mattr=+hvx,+hvx-length128B -filetype=obj %s | llvm-objdump --mcpu=hexagonv67 --mattr=+hvx -d - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -mv67 -mattr=+hvx,+hvx-length128B -filetype=obj %s | llvm-objdump --mcpu=hexagonv67 --mattr=+hvx -d - | FileCheck %s
# CHECK: 1a81e0e2 { v2.uw = vrotr(v0.uw,v1.uw) }
v2.uw=vrotr(v0.uw, v1.uw)
diff --git a/llvm/test/MC/Hexagon/v67_all.s b/llvm/test/MC/Hexagon/v67_all.s
index e7428a3a9a20f00..d2326c94cbbf349 100644
--- a/llvm/test/MC/Hexagon/v67_all.s
+++ b/llvm/test/MC/Hexagon/v67_all.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -mv67 -mhvx -filetype=obj %s | llvm-objdump --mcpu=hexagonv67 --mattr=+hvx -d - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -mv67 -mhvx -filetype=obj %s | llvm-objdump --mcpu=hexagonv67 --mattr=+hvx -d - | FileCheck %s
# CHECK: { v3:0.w = vrmpyz(v0.b,r0.ub) }
V3:0.w=vrmpyz(v0.b,r0.ub)
diff --git a/llvm/test/MC/Hexagon/v67t_align.s b/llvm/test/MC/Hexagon/v67t_align.s
index 26aff1eee549d11..546429863fc44ef 100644
--- a/llvm/test/MC/Hexagon/v67t_align.s
+++ b/llvm/test/MC/Hexagon/v67t_align.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -mcpu=hexagonv67t -filetype=obj %s | llvm-objdump -d - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -mcpu=hexagonv67t -filetype=obj %s | llvm-objdump -d - | FileCheck %s
{ r0=r0 }
.align 32
diff --git a/llvm/test/MC/Hexagon/v67t_arch.s b/llvm/test/MC/Hexagon/v67t_arch.s
index a65bfecde79fb7c..d9f91ddbbce00b0 100644
--- a/llvm/test/MC/Hexagon/v67t_arch.s
+++ b/llvm/test/MC/Hexagon/v67t_arch.s
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=hexagon -mcpu=hexagonv67t -filetype=obj %s | llvm-objdump --no-print-imm-hex -d - | FileCheck %s
-# RUN: llvm-mc -arch=hexagon -mcpu=hexagonv67t -mhvx -filetype=obj %s | llvm-objdump --no-print-imm-hex -d - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -mcpu=hexagonv67t -filetype=obj %s | llvm-objdump --no-print-imm-hex -d - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -mcpu=hexagonv67t -mhvx -filetype=obj %s | llvm-objdump --no-print-imm-hex -d - | FileCheck %s
r1=memw(r0)
{ r0=r0
diff --git a/llvm/test/MC/Hexagon/v67t_option.s b/llvm/test/MC/Hexagon/v67t_option.s
index f6a55e9c051669f..a8096781f1c5358 100644
--- a/llvm/test/MC/Hexagon/v67t_option.s
+++ b/llvm/test/MC/Hexagon/v67t_option.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -mv67t -filetype=obj %s | llvm-objdump -d - | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -mv67t -filetype=obj %s | llvm-objdump -d - | FileCheck %s
{ r0=r0 }
.align 32
{ r0=r0 }
diff --git a/llvm/test/MC/Hexagon/vgather-new.s b/llvm/test/MC/Hexagon/vgather-new.s
index 679aaefa72eaf92..83d5662fc13b1eb 100644
--- a/llvm/test/MC/Hexagon/vgather-new.s
+++ b/llvm/test/MC/Hexagon/vgather-new.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=hexagon -mcpu=hexagonv65 -mhvx -show-encoding %s -o - | FileCheck %s
+// RUN: llvm-mc -triple=hexagon -mcpu=hexagonv65 -mhvx -show-encoding %s -o - | FileCheck %s
// TypeCVI_FIRST was set incorrectly, causing vgather not to be considered
// a vector instruction. This resulted in an incorrect encoding of the vtmp.new
diff --git a/llvm/test/MC/Hexagon/vpred_defs.s b/llvm/test/MC/Hexagon/vpred_defs.s
index 92c15a3e575809a..6a05337c0740648 100644
--- a/llvm/test/MC/Hexagon/vpred_defs.s
+++ b/llvm/test/MC/Hexagon/vpred_defs.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -mv65 -filetype=asm -mhvx %s | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -mv65 -filetype=asm -mhvx %s | FileCheck %s
# CHECK-NOT: error: register `{{.+}}' modified more than once
diff --git a/llvm/test/MC/Hexagon/vscatter-slot.s b/llvm/test/MC/Hexagon/vscatter-slot.s
index 6c806de2f983b50..1a8ff319e0c3301 100644
--- a/llvm/test/MC/Hexagon/vscatter-slot.s
+++ b/llvm/test/MC/Hexagon/vscatter-slot.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -mv65 -mhvx -filetype=asm < %s | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -mv65 -mhvx -filetype=asm < %s | FileCheck %s
# Test that a slot error is not reported for a packet with a load and a
# vscatter.
diff --git a/llvm/test/MC/Hexagon/vtmp_def.s b/llvm/test/MC/Hexagon/vtmp_def.s
index 26d257efadde897..8ed9ab8bccb45e6 100644
--- a/llvm/test/MC/Hexagon/vtmp_def.s
+++ b/llvm/test/MC/Hexagon/vtmp_def.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -arch=hexagon -mv65 -mhvx -filetype=obj %s 2>&1 | FileCheck %s
+# RUN: not llvm-mc -triple=hexagon -mv65 -mhvx -filetype=obj %s 2>&1 | FileCheck %s
# CHECK: register `VTMP' modified more than once
{ vtmp.h=vgather(r0, m0, v1:0.w).h
diff --git a/llvm/test/MC/Hexagon/z-instructions.s b/llvm/test/MC/Hexagon/z-instructions.s
index 6041ffa077cd968..f245094560922e7 100644
--- a/llvm/test/MC/Hexagon/z-instructions.s
+++ b/llvm/test/MC/Hexagon/z-instructions.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=hexagon -mcpu=hexagonv66 -mhvx -filetype=obj %s | llvm-objdump --no-print-imm-hex --mcpu=hexagonv66 --mattr=+hvx -d - | FileCheck --implicit-check-not='{' %s
+# RUN: llvm-mc -triple=hexagon -mcpu=hexagonv66 -mhvx -filetype=obj %s | llvm-objdump --no-print-imm-hex --mcpu=hexagonv66 --mattr=+hvx -d - | FileCheck --implicit-check-not='{' %s
# CHECK: 2d00c000 { z = vmem(r0++#0) }
z = vmem(r0++#0)
diff --git a/llvm/test/MC/Hexagon/zreg-post-inc.s b/llvm/test/MC/Hexagon/zreg-post-inc.s
index 696e18d9ea7b4a2..c491edc3cae8674 100644
--- a/llvm/test/MC/Hexagon/zreg-post-inc.s
+++ b/llvm/test/MC/Hexagon/zreg-post-inc.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -arch=hexagon -filetype=obj -mhvx -mcpu=hexagonv66 %s 2> %t; FileCheck --implicit-check-not=error: %s <%t
+# RUN: not llvm-mc -triple=hexagon -filetype=obj -mhvx -mcpu=hexagonv66 %s 2> %t; FileCheck --implicit-check-not=error: %s <%t
{
if (p0) memb(r14+#8)=r4.new
diff --git a/llvm/test/MC/Lanai/conditional_inst.s b/llvm/test/MC/Lanai/conditional_inst.s
index 58d9b634e4b613b..d167d1af00eb3af 100644
--- a/llvm/test/MC/Lanai/conditional_inst.s
+++ b/llvm/test/MC/Lanai/conditional_inst.s
@@ -1,4 +1,4 @@
-! RUN: llvm-mc -arch=lanai -show-encoding -show-inst < %s | FileCheck %s
+! RUN: llvm-mc -triple=lanai -show-encoding -show-inst < %s | FileCheck %s
.text
.align 4
diff --git a/llvm/test/MC/Lanai/memory.s b/llvm/test/MC/Lanai/memory.s
index d34f917c7405513..398cb8e123711d1 100644
--- a/llvm/test/MC/Lanai/memory.s
+++ b/llvm/test/MC/Lanai/memory.s
@@ -1,4 +1,4 @@
-! RUN: llvm-mc -arch=lanai -show-encoding -show-inst < %s | FileCheck %s
+! RUN: llvm-mc -triple=lanai -show-encoding -show-inst < %s | FileCheck %s
! Checking the machine instructions generated from ASM instructions for ALU
! operations.
diff --git a/llvm/test/MC/Lanai/v11.s b/llvm/test/MC/Lanai/v11.s
index 621c47de0235c44..ce7bb5395ce5d37 100644
--- a/llvm/test/MC/Lanai/v11.s
+++ b/llvm/test/MC/Lanai/v11.s
@@ -1,4 +1,4 @@
-! RUN: llvm-mc -arch=lanai -show-encoding %s | FileCheck %s
+! RUN: llvm-mc -triple=lanai -show-encoding %s | FileCheck %s
add %r17, 0, %r21
! CHECK: 0x0a,0xc4,0x00,0x00
diff --git a/llvm/test/MC/Mips/bopt-directive.s b/llvm/test/MC/Mips/bopt-directive.s
index 63e2a05281a83cd..41d9065b5b2f8f3 100644
--- a/llvm/test/MC/Mips/bopt-directive.s
+++ b/llvm/test/MC/Mips/bopt-directive.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=mips -mcpu=mips32 %s 2>&1 | FileCheck %s
+# RUN: llvm-mc -triple=mips -mcpu=mips32 %s 2>&1 | FileCheck %s
# We don't support the bopt option in the integrated assembler. Given it's
# single pass nature, it would be quite
diff icult to implement currently.
diff --git a/llvm/test/MC/Mips/branch-pseudos-bad.s b/llvm/test/MC/Mips/branch-pseudos-bad.s
index f2fa74fdcee0a19..c23164d90461939 100644
--- a/llvm/test/MC/Mips/branch-pseudos-bad.s
+++ b/llvm/test/MC/Mips/branch-pseudos-bad.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc %s -arch=mips -mcpu=mips32 2>&1 | FileCheck %s
+# RUN: not llvm-mc %s -triple=mips -mcpu=mips32 2>&1 | FileCheck %s
# Check for errors when using conditional branch pseudos after .set noat.
.set noat
diff --git a/llvm/test/MC/Mips/branch-pseudos.s b/llvm/test/MC/Mips/branch-pseudos.s
index 9c4abdbbfad01ea..9d277163cbf0b97 100644
--- a/llvm/test/MC/Mips/branch-pseudos.s
+++ b/llvm/test/MC/Mips/branch-pseudos.s
@@ -1,5 +1,5 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32 -show-encoding | FileCheck %s
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32 2>&1 | \
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32 -show-encoding | FileCheck %s
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32 2>&1 | \
# RUN: FileCheck %s --check-prefix=WARNING
.text
diff --git a/llvm/test/MC/Mips/cpload-bad.s b/llvm/test/MC/Mips/cpload-bad.s
index 803610af922ff6d..be234bcdf555a95 100644
--- a/llvm/test/MC/Mips/cpload-bad.s
+++ b/llvm/test/MC/Mips/cpload-bad.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc %s -arch=mips -mcpu=mips32r2 2>%t1
+# RUN: not llvm-mc %s -triple=mips -mcpu=mips32r2 2>%t1
# RUN: FileCheck %s < %t1 -check-prefix=ASM
.text
diff --git a/llvm/test/MC/Mips/cprestore-bad.s b/llvm/test/MC/Mips/cprestore-bad.s
index cfd62a4ed988bb4..27faf3c4ab5030a 100644
--- a/llvm/test/MC/Mips/cprestore-bad.s
+++ b/llvm/test/MC/Mips/cprestore-bad.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc %s -arch=mips -mcpu=mips32 2>%t1
+# RUN: not llvm-mc %s -triple=mips -mcpu=mips32 2>%t1
# RUN: FileCheck %s < %t1
.text
diff --git a/llvm/test/MC/Mips/crc/invalid.s b/llvm/test/MC/Mips/crc/invalid.s
index f8e0fba7da0ab66..cf1124e0783a8ef 100644
--- a/llvm/test/MC/Mips/crc/invalid.s
+++ b/llvm/test/MC/Mips/crc/invalid.s
@@ -1,8 +1,8 @@
# Instructions that are invalid.
#
-# RUN: not llvm-mc %s -arch=mips -mcpu=mips32r6 -mattr=+crc 2>%t1
+# RUN: not llvm-mc %s -triple=mips -mcpu=mips32r6 -mattr=+crc 2>%t1
# RUN: FileCheck %s < %t1
-# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64r6 -mattr=+crc 2>%t1
+# RUN: not llvm-mc %s -triple=mips64 -mcpu=mips64r6 -mattr=+crc 2>%t1
# RUN: FileCheck %s < %t1
.set noat
diff --git a/llvm/test/MC/Mips/crc/module-nocrc.s b/llvm/test/MC/Mips/crc/module-nocrc.s
index 193ed360b57447d..b136f01bdcb0106 100644
--- a/llvm/test/MC/Mips/crc/module-nocrc.s
+++ b/llvm/test/MC/Mips/crc/module-nocrc.s
@@ -1,7 +1,7 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r6 -mattr=+crc | \
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32r6 -mattr=+crc | \
# RUN: FileCheck %s -check-prefix=CHECK-ASM
#
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r6 -filetype=obj -o - -mattr=+crc | \
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32r6 -filetype=obj -o - -mattr=+crc | \
# RUN: llvm-readobj -A - | \
# RUN: FileCheck %s -check-prefix=CHECK-OBJ
diff --git a/llvm/test/MC/Mips/elf_basic.s b/llvm/test/MC/Mips/elf_basic.s
index be6e24823c62136..cd55201d1196ba3 100644
--- a/llvm/test/MC/Mips/elf_basic.s
+++ b/llvm/test/MC/Mips/elf_basic.s
@@ -3,9 +3,9 @@
// 32 bit little endian
// RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux %s -o - | llvm-readobj -h - | FileCheck -check-prefix=CHECK-LE32 %s
// 64 bit big endian
-// RUN: llvm-mc -filetype=obj -arch=mips64 -triple mips64-unknown-linux %s -o - | llvm-readobj -h - | FileCheck -check-prefix=CHECK-BE64 %s
+// RUN: llvm-mc -filetype=obj -triple=mips64 -triple mips64-unknown-linux %s -o - | llvm-readobj -h - | FileCheck -check-prefix=CHECK-BE64 %s
// 64 bit little endian
-// RUN: llvm-mc -filetype=obj -arch=mips64el -triple mips64el-unknown-linux %s -o - | llvm-readobj -h - | FileCheck -check-prefix=CHECK-LE64 %s
+// RUN: llvm-mc -filetype=obj -triple=mips64el -triple mips64el-unknown-linux %s -o - | llvm-readobj -h - | FileCheck -check-prefix=CHECK-LE64 %s
// Check that we produce 32 bit with each endian.
diff --git a/llvm/test/MC/Mips/end-directive.s b/llvm/test/MC/Mips/end-directive.s
index 6545acb1613e0ee..acc0f25a3b9763e 100644
--- a/llvm/test/MC/Mips/end-directive.s
+++ b/llvm/test/MC/Mips/end-directive.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=mips -mcpu=mips32 -filetype=obj %s -o - | \
+# RUN: llvm-mc -triple=mips -mcpu=mips32 -filetype=obj %s -o - | \
# RUN: llvm-readobj --symbols - | FileCheck %s
# Check that the assembler doesn't choke on .align between a symbol and the
diff --git a/llvm/test/MC/Mips/ginv/module-noginv.s b/llvm/test/MC/Mips/ginv/module-noginv.s
index 611d72c52d56100..577800329b5e1b6 100644
--- a/llvm/test/MC/Mips/ginv/module-noginv.s
+++ b/llvm/test/MC/Mips/ginv/module-noginv.s
@@ -1,7 +1,7 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r6 -mattr=+ginv | \
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32r6 -mattr=+ginv | \
# RUN: FileCheck %s -check-prefix=CHECK-ASM
#
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r6 -filetype=obj -o - -mattr=+ginv | \
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32r6 -filetype=obj -o - -mattr=+ginv | \
# RUN: llvm-readobj -A - | \
# RUN: FileCheck %s -check-prefix=CHECK-OBJ
diff --git a/llvm/test/MC/Mips/insn-directive.s b/llvm/test/MC/Mips/insn-directive.s
index 05e37ffb67cc8a4..75819ae2f51af8f 100644
--- a/llvm/test/MC/Mips/insn-directive.s
+++ b/llvm/test/MC/Mips/insn-directive.s
@@ -1,6 +1,6 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32 | FileCheck %s --check-prefix=ASM
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32 | FileCheck %s --check-prefix=ASM
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32 -filetype=obj -o - | \
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32 -filetype=obj -o - | \
# RUN: llvm-readobj --symbols - | FileCheck %s --check-prefix=OBJ
.set micromips
diff --git a/llvm/test/MC/Mips/macro-aliases.s b/llvm/test/MC/Mips/macro-aliases.s
index 85677ee4631f2c2..6488432372139f4 100644
--- a/llvm/test/MC/Mips/macro-aliases.s
+++ b/llvm/test/MC/Mips/macro-aliases.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=mips -mcpu=mips32r2 %s -show-inst | FileCheck %s
+# RUN: llvm-mc -triple=mips -mcpu=mips32r2 %s -show-inst | FileCheck %s
# Test that subu accepts constant operands and inverts them when
# rendering the operand.
diff --git a/llvm/test/MC/Mips/macro-bcc-imm-bad.s b/llvm/test/MC/Mips/macro-bcc-imm-bad.s
index bcf08bdc34d5d47..c56666dbeba030b 100644
--- a/llvm/test/MC/Mips/macro-bcc-imm-bad.s
+++ b/llvm/test/MC/Mips/macro-bcc-imm-bad.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc %s -arch=mips -mcpu=mips32r2 2>&1 | \
+# RUN: not llvm-mc %s -triple=mips -mcpu=mips32r2 2>&1 | \
# RUN: FileCheck %s --check-prefix=ALL
.text
diff --git a/llvm/test/MC/Mips/macro-bcc-imm.s b/llvm/test/MC/Mips/macro-bcc-imm.s
index fdee6ec3670e666..afc3e59b9379506 100644
--- a/llvm/test/MC/Mips/macro-bcc-imm.s
+++ b/llvm/test/MC/Mips/macro-bcc-imm.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -show-encoding 2>&1 | \
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32r2 -show-encoding 2>&1 | \
# RUN: FileCheck %s --check-prefix=ALL
.text
diff --git a/llvm/test/MC/Mips/macro-ddiv-bad.s b/llvm/test/MC/Mips/macro-ddiv-bad.s
index 1abcab66142f32c..d8713d9948859bd 100644
--- a/llvm/test/MC/Mips/macro-ddiv-bad.s
+++ b/llvm/test/MC/Mips/macro-ddiv-bad.s
@@ -1,10 +1,10 @@
-# RUN: not llvm-mc %s -arch=mips -mcpu=mips32r6 2>&1 | \
+# RUN: not llvm-mc %s -triple=mips -mcpu=mips32r6 2>&1 | \
# RUN: FileCheck %s --check-prefix=MIPS32-OR-R6
-# RUN: not llvm-mc %s -arch=mips -mcpu=mips32r2 2>&1 | \
+# RUN: not llvm-mc %s -triple=mips -mcpu=mips32r2 2>&1 | \
# RUN: FileCheck %s --check-prefix=MIPS32-OR-R6
-# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64r6 2>&1 | \
+# RUN: not llvm-mc %s -triple=mips64 -mcpu=mips64r6 2>&1 | \
# RUN: FileCheck %s --check-prefix=MIPS32-OR-R6
-# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 2>&1 | \
+# RUN: llvm-mc %s -triple=mips64 -mcpu=mips64r2 2>&1 | \
# RUN: FileCheck %s --check-prefix=MIPS64-NOT-R6
.text
diff --git a/llvm/test/MC/Mips/macro-ddivu-bad.s b/llvm/test/MC/Mips/macro-ddivu-bad.s
index 1abcab66142f32c..d8713d9948859bd 100644
--- a/llvm/test/MC/Mips/macro-ddivu-bad.s
+++ b/llvm/test/MC/Mips/macro-ddivu-bad.s
@@ -1,10 +1,10 @@
-# RUN: not llvm-mc %s -arch=mips -mcpu=mips32r6 2>&1 | \
+# RUN: not llvm-mc %s -triple=mips -mcpu=mips32r6 2>&1 | \
# RUN: FileCheck %s --check-prefix=MIPS32-OR-R6
-# RUN: not llvm-mc %s -arch=mips -mcpu=mips32r2 2>&1 | \
+# RUN: not llvm-mc %s -triple=mips -mcpu=mips32r2 2>&1 | \
# RUN: FileCheck %s --check-prefix=MIPS32-OR-R6
-# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64r6 2>&1 | \
+# RUN: not llvm-mc %s -triple=mips64 -mcpu=mips64r6 2>&1 | \
# RUN: FileCheck %s --check-prefix=MIPS32-OR-R6
-# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 2>&1 | \
+# RUN: llvm-mc %s -triple=mips64 -mcpu=mips64r2 2>&1 | \
# RUN: FileCheck %s --check-prefix=MIPS64-NOT-R6
.text
diff --git a/llvm/test/MC/Mips/macro-div-bad.s b/llvm/test/MC/Mips/macro-div-bad.s
index 4d93a1a9a69d39f..154316a4e9631fe 100644
--- a/llvm/test/MC/Mips/macro-div-bad.s
+++ b/llvm/test/MC/Mips/macro-div-bad.s
@@ -1,10 +1,10 @@
-# RUN: not llvm-mc %s -arch=mips -mcpu=mips32r6 2>&1 | \
+# RUN: not llvm-mc %s -triple=mips -mcpu=mips32r6 2>&1 | \
# RUN: FileCheck %s --check-prefix=R6
-# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64r6 2>&1 | \
+# RUN: not llvm-mc %s -triple=mips64 -mcpu=mips64r6 2>&1 | \
# RUN: FileCheck %s --check-prefix=R6
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 2>&1 | \
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32r2 2>&1 | \
# RUN: FileCheck %s --check-prefix=NOT-R6
-# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 2>&1 | \
+# RUN: llvm-mc %s -triple=mips64 -mcpu=mips64r2 2>&1 | \
# RUN: FileCheck %s --check-prefix=NOT-R6
.text
diff --git a/llvm/test/MC/Mips/macro-divu-bad.s b/llvm/test/MC/Mips/macro-divu-bad.s
index b5b492ec682807c..59289528d2527da 100644
--- a/llvm/test/MC/Mips/macro-divu-bad.s
+++ b/llvm/test/MC/Mips/macro-divu-bad.s
@@ -1,10 +1,10 @@
-# RUN: not llvm-mc %s -arch=mips -mcpu=mips32r6 2>&1 | \
+# RUN: not llvm-mc %s -triple=mips -mcpu=mips32r6 2>&1 | \
# RUN: FileCheck %s --check-prefix=R6
-# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64r6 2>&1 | \
+# RUN: not llvm-mc %s -triple=mips64 -mcpu=mips64r6 2>&1 | \
# RUN: FileCheck %s --check-prefix=R6
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 2>&1 | \
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32r2 2>&1 | \
# RUN: FileCheck %s --check-prefix=NOT-R6
-# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 2>&1 | \
+# RUN: llvm-mc %s -triple=mips64 -mcpu=mips64r2 2>&1 | \
# RUN: FileCheck %s --check-prefix=NOT-R6
.text
diff --git a/llvm/test/MC/Mips/macro-dla-bad.s b/llvm/test/MC/Mips/macro-dla-bad.s
index cd377f4557ca637..7dc64555a88f09e 100644
--- a/llvm/test/MC/Mips/macro-dla-bad.s
+++ b/llvm/test/MC/Mips/macro-dla-bad.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips3 -target-abi n64 2>&1 | \
+# RUN: not llvm-mc %s -triple=mips64 -mcpu=mips3 -target-abi n64 2>&1 | \
# RUN: FileCheck %s
.text
diff --git a/llvm/test/MC/Mips/macro-la-bad.s b/llvm/test/MC/Mips/macro-la-bad.s
index 70b8facc2db954f..7728785041ffc9e 100644
--- a/llvm/test/MC/Mips/macro-la-bad.s
+++ b/llvm/test/MC/Mips/macro-la-bad.s
@@ -1,8 +1,8 @@
-# RUN: not llvm-mc %s -arch=mips -mcpu=mips32r2 2>%t1
+# RUN: not llvm-mc %s -triple=mips -mcpu=mips32r2 2>%t1
# RUN: FileCheck %s < %t1 --check-prefix=O32
-# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64 -target-abi n32 2>&1 | \
+# RUN: not llvm-mc %s -triple=mips64 -mcpu=mips64 -target-abi n32 2>&1 | \
# RUN: FileCheck %s --check-prefix=N32
-# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64 -target-abi n64 2>&1 | \
+# RUN: llvm-mc %s -triple=mips64 -mcpu=mips64 -target-abi n64 2>&1 | \
# RUN: FileCheck %s --check-prefix=N64
.text
diff --git a/llvm/test/MC/Mips/macro-li-bad.s b/llvm/test/MC/Mips/macro-li-bad.s
index 29eedce713ab1bb..b1dfa4228806199 100644
--- a/llvm/test/MC/Mips/macro-li-bad.s
+++ b/llvm/test/MC/Mips/macro-li-bad.s
@@ -1,8 +1,8 @@
-# RUN: not llvm-mc %s -arch=mips -mcpu=mips32r2 2>%t1
+# RUN: not llvm-mc %s -triple=mips -mcpu=mips32r2 2>%t1
# RUN: FileCheck %s < %t1 --check-prefix=32-BIT
-# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64 -target-abi n32 2>&1 | \
+# RUN: not llvm-mc %s -triple=mips64 -mcpu=mips64 -target-abi n32 2>&1 | \
# RUN: FileCheck %s --check-prefix=64-BIT
-# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64 -target-abi n64 2>&1 | \
+# RUN: not llvm-mc %s -triple=mips64 -mcpu=mips64 -target-abi n64 2>&1 | \
# RUN: FileCheck %s --check-prefix=64-BIT
.text
diff --git a/llvm/test/MC/Mips/macro-seq.s b/llvm/test/MC/Mips/macro-seq.s
index 814f198a07bd83c..404247edbecc783 100644
--- a/llvm/test/MC/Mips/macro-seq.s
+++ b/llvm/test/MC/Mips/macro-seq.s
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=mips -mcpu=mips1 < %s | FileCheck --check-prefixes=ALL,MIPS32 %s
-# RUN: llvm-mc -arch=mips -mcpu=mips64 < %s | FileCheck --check-prefixes=ALL,MIPS64 %s
+# RUN: llvm-mc -triple=mips -mcpu=mips1 < %s | FileCheck --check-prefixes=ALL,MIPS32 %s
+# RUN: llvm-mc -triple=mips -mcpu=mips64 < %s | FileCheck --check-prefixes=ALL,MIPS64 %s
# ALL: .text
seq $2, $11, $0
diff --git a/llvm/test/MC/Mips/macro-sge.s b/llvm/test/MC/Mips/macro-sge.s
index d8189e55425d2cf..97bf1531a3ce1a9 100644
--- a/llvm/test/MC/Mips/macro-sge.s
+++ b/llvm/test/MC/Mips/macro-sge.s
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=mips -show-encoding -mcpu=mips1 < %s | FileCheck %s
-# RUN: llvm-mc -arch=mips -show-encoding -mcpu=mips64 < %s | FileCheck %s
+# RUN: llvm-mc -triple=mips -show-encoding -mcpu=mips1 < %s | FileCheck %s
+# RUN: llvm-mc -triple=mips -show-encoding -mcpu=mips64 < %s | FileCheck %s
sge $4, $5
# CHECK: slt $4, $4, $5 # encoding: [0x00,0x85,0x20,0x2a]
diff --git a/llvm/test/MC/Mips/macro-sge64.s b/llvm/test/MC/Mips/macro-sge64.s
index 7875baf01288eac..e7c210c77714faa 100644
--- a/llvm/test/MC/Mips/macro-sge64.s
+++ b/llvm/test/MC/Mips/macro-sge64.s
@@ -1,6 +1,6 @@
-# RUN: not llvm-mc -arch=mips -mcpu=mips1 < %s 2>&1 \
+# RUN: not llvm-mc -triple=mips -mcpu=mips1 < %s 2>&1 \
# RUN: | FileCheck --check-prefix=MIPS32 %s
-# RUN: llvm-mc -arch=mips -show-encoding -mcpu=mips64 < %s \
+# RUN: llvm-mc -triple=mips -show-encoding -mcpu=mips64 < %s \
# RUN: | FileCheck --check-prefix=MIPS64 %s
sge $4, $5, 0x100000000
diff --git a/llvm/test/MC/Mips/macro-sgt.s b/llvm/test/MC/Mips/macro-sgt.s
index e49a02daaf0b23f..0baecc74a88415b 100644
--- a/llvm/test/MC/Mips/macro-sgt.s
+++ b/llvm/test/MC/Mips/macro-sgt.s
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=mips -show-encoding -mcpu=mips1 < %s | FileCheck %s
-# RUN: llvm-mc -arch=mips -show-encoding -mcpu=mips64 < %s | FileCheck %s
+# RUN: llvm-mc -triple=mips -show-encoding -mcpu=mips1 < %s | FileCheck %s
+# RUN: llvm-mc -triple=mips -show-encoding -mcpu=mips64 < %s | FileCheck %s
sgt $4, $5
# CHECK: slt $4, $5, $4 # encoding: [0x00,0xa4,0x20,0x2a]
diff --git a/llvm/test/MC/Mips/macro-sgt64.s b/llvm/test/MC/Mips/macro-sgt64.s
index e878561b846053c..6091ce9f565c2db 100644
--- a/llvm/test/MC/Mips/macro-sgt64.s
+++ b/llvm/test/MC/Mips/macro-sgt64.s
@@ -1,6 +1,6 @@
-# RUN: not llvm-mc -arch=mips -mcpu=mips1 < %s 2>&1 \
+# RUN: not llvm-mc -triple=mips -mcpu=mips1 < %s 2>&1 \
# RUN: | FileCheck --check-prefix=MIPS32 %s
-# RUN: llvm-mc -arch=mips -show-encoding -mcpu=mips64 < %s \
+# RUN: llvm-mc -triple=mips -show-encoding -mcpu=mips64 < %s \
# RUN: | FileCheck --check-prefix=MIPS64 %s
sgt $4, $5, 0x100000000
diff --git a/llvm/test/MC/Mips/macro-sle.s b/llvm/test/MC/Mips/macro-sle.s
index 6d93ce5b820b2e4..a7e3d56b3a8ca6c 100644
--- a/llvm/test/MC/Mips/macro-sle.s
+++ b/llvm/test/MC/Mips/macro-sle.s
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=mips -show-encoding -mcpu=mips1 < %s | FileCheck %s
-# RUN: llvm-mc -arch=mips -show-encoding -mcpu=mips64 < %s | FileCheck %s
+# RUN: llvm-mc -triple=mips -show-encoding -mcpu=mips1 < %s | FileCheck %s
+# RUN: llvm-mc -triple=mips -show-encoding -mcpu=mips64 < %s | FileCheck %s
sle $4, $5
# CHECK: slt $4, $5, $4 # encoding: [0x00,0xa4,0x20,0x2a]
diff --git a/llvm/test/MC/Mips/macro-sle64.s b/llvm/test/MC/Mips/macro-sle64.s
index 62ad7c81f9dda5f..91f137091b01225 100644
--- a/llvm/test/MC/Mips/macro-sle64.s
+++ b/llvm/test/MC/Mips/macro-sle64.s
@@ -1,6 +1,6 @@
-# RUN: not llvm-mc -arch=mips -mcpu=mips1 < %s 2>&1 \
+# RUN: not llvm-mc -triple=mips -mcpu=mips1 < %s 2>&1 \
# RUN: | FileCheck --check-prefix=MIPS32 %s
-# RUN: llvm-mc -arch=mips -show-encoding -mcpu=mips64 < %s \
+# RUN: llvm-mc -triple=mips -show-encoding -mcpu=mips64 < %s \
# RUN: | FileCheck --check-prefix=MIPS64 %s
sle $4, $5, 0x100000000
diff --git a/llvm/test/MC/Mips/macro-sne.s b/llvm/test/MC/Mips/macro-sne.s
index 497e1d604c41af1..89e50e3618f12e4 100644
--- a/llvm/test/MC/Mips/macro-sne.s
+++ b/llvm/test/MC/Mips/macro-sne.s
@@ -1,6 +1,6 @@
-# RUN: llvm-mc -arch=mips -show-encoding -mcpu=mips1 < %s \
+# RUN: llvm-mc -triple=mips -show-encoding -mcpu=mips1 < %s \
# RUN: | FileCheck --check-prefixes=ALL,MIPS32 %s
-# RUN: llvm-mc -arch=mips -show-encoding -mcpu=mips64 < %s \
+# RUN: llvm-mc -triple=mips -show-encoding -mcpu=mips64 < %s \
# RUN: | FileCheck --check-prefixes=ALL,MIPS64 %s
sne $4, $5, $6
diff --git a/llvm/test/MC/Mips/memory-offsets.s b/llvm/test/MC/Mips/memory-offsets.s
index 7fd1e7e503cd31c..895d8c6ba5fcfba 100644
--- a/llvm/test/MC/Mips/memory-offsets.s
+++ b/llvm/test/MC/Mips/memory-offsets.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=mips -mcpu=mips32 -show-encoding %s | FileCheck %s
+# RUN: llvm-mc -triple=mips -mcpu=mips32 -show-encoding %s | FileCheck %s
# Check that parseMemOperand handles expressions such as <int>, (<int>),
# <expr>, <expr> op <expr>, (<expr>) op (<expr>).
diff --git a/llvm/test/MC/Mips/micromips-bad-branches.s b/llvm/test/MC/Mips/micromips-bad-branches.s
index f64cd9f9e5bdb10..caded616adec380 100644
--- a/llvm/test/MC/Mips/micromips-bad-branches.s
+++ b/llvm/test/MC/Mips/micromips-bad-branches.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -mattr=+msa -arch=mips -mattr=+micromips 2>&1 | FileCheck %s
+# RUN: not llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -mattr=+msa -triple=mips -mattr=+micromips 2>&1 | FileCheck %s
#
# CHECK: error: branch to misaligned address
# CHECK: b -65535
diff --git a/llvm/test/MC/Mips/micromips-diagnostic-fixup.s b/llvm/test/MC/Mips/micromips-diagnostic-fixup.s
index 4a94f9a3cd51898..aac076f1343ad1a 100644
--- a/llvm/test/MC/Mips/micromips-diagnostic-fixup.s
+++ b/llvm/test/MC/Mips/micromips-diagnostic-fixup.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -arch=mips -mattr=+micromips 2>&1 -filetype=obj | FileCheck %s
+# RUN: not llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -triple=mips -mattr=+micromips 2>&1 -filetype=obj | FileCheck %s
# Two instructions, to check that this is not a fatal error
# CHECK: error: out of range PC16 fixup
diff --git a/llvm/test/MC/Mips/micromips-pc16-fixup.s b/llvm/test/MC/Mips/micromips-pc16-fixup.s
index 7725b4e6f0eb182..ce97880bdfe8468 100644
--- a/llvm/test/MC/Mips/micromips-pc16-fixup.s
+++ b/llvm/test/MC/Mips/micromips-pc16-fixup.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc %s -triple=mips-unknown-linux -mcpu=mips32r2 -arch=mips -mattr=+micromips 2>&1 -filetype=obj | FileCheck %s
+# RUN: llvm-mc %s -triple=mips-unknown-linux -mcpu=mips32r2 -triple=mips -mattr=+micromips 2>&1 -filetype=obj | FileCheck %s
#
# CHECK-NOT: error: out of range PC16 fixup
diff --git a/llvm/test/MC/Mips/micromips64-unsupported.s b/llvm/test/MC/Mips/micromips64-unsupported.s
index bc38cfb41f74ae2..5d67f82cd6a76c0 100644
--- a/llvm/test/MC/Mips/micromips64-unsupported.s
+++ b/llvm/test/MC/Mips/micromips64-unsupported.s
@@ -1,8 +1,8 @@
-# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64r6 -target-abi n64 2>&1 -mattr=+micromips | FileCheck %s --check-prefix=64R6
-# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64r6 -target-abi n32 2>&1 -mattr=+micromips | FileCheck %s --check-prefix=64R6
+# RUN: not llvm-mc %s -triple=mips64 -mcpu=mips64r6 -target-abi n64 2>&1 -mattr=+micromips | FileCheck %s --check-prefix=64R6
+# RUN: not llvm-mc %s -triple=mips64 -mcpu=mips64r6 -target-abi n32 2>&1 -mattr=+micromips | FileCheck %s --check-prefix=64R6
-# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64 -target-abi n64 2>&1 -mattr=+micromips | FileCheck %s --check-prefix=64
-# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64 -target-abi n32 2>&1 -mattr=+micromips | FileCheck %s --check-prefix=64
+# RUN: not llvm-mc %s -triple=mips64 -mcpu=mips64 -target-abi n64 2>&1 -mattr=+micromips | FileCheck %s --check-prefix=64
+# RUN: not llvm-mc %s -triple=mips64 -mcpu=mips64 -target-abi n32 2>&1 -mattr=+micromips | FileCheck %s --check-prefix=64
# 64R6: microMIPS64R6 is not supported
# 64: microMIPS64 is not supported
diff --git a/llvm/test/MC/Mips/mips-bad-branches.s b/llvm/test/MC/Mips/mips-bad-branches.s
index 321b3c45f873a74..d713792eff13a64 100644
--- a/llvm/test/MC/Mips/mips-bad-branches.s
+++ b/llvm/test/MC/Mips/mips-bad-branches.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -arch=mips 2>&1 | FileCheck %s
+# RUN: not llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -triple=mips 2>&1 | FileCheck %s
#
# CHECK: error: branch to misaligned address
# CHECK: b -131069
diff --git a/llvm/test/MC/Mips/mips-data-directives.s b/llvm/test/MC/Mips/mips-data-directives.s
index e794aa06b0b4a0c..217f3f6f4729c16 100644
--- a/llvm/test/MC/Mips/mips-data-directives.s
+++ b/llvm/test/MC/Mips/mips-data-directives.s
@@ -1,7 +1,7 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 | \
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32r2 | \
# RUN: FileCheck %s -check-prefix=CHECK-ASM
#
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -filetype=obj -o - | \
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32r2 -filetype=obj -o - | \
# RUN: llvm-readobj --sections --section-data --section-relocations - | \
# RUN: FileCheck %s -check-prefix=CHECK-OBJ
diff --git a/llvm/test/MC/Mips/mips-diagnostic-fixup.s b/llvm/test/MC/Mips/mips-diagnostic-fixup.s
index 7bfe0d6263db404..16d4d89b5d6894b 100644
--- a/llvm/test/MC/Mips/mips-diagnostic-fixup.s
+++ b/llvm/test/MC/Mips/mips-diagnostic-fixup.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -arch=mips 2>&1 -filetype=obj | FileCheck %s
+# RUN: not llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -triple=mips 2>&1 -filetype=obj | FileCheck %s
# Two instructions, to check that this is not a fatal error
# CHECK: error: out of range PC16 fixup
diff --git a/llvm/test/MC/Mips/mips-expansions-bad.s b/llvm/test/MC/Mips/mips-expansions-bad.s
index 9c1b07a769a83fd..1f1b8c7ce6e2312 100644
--- a/llvm/test/MC/Mips/mips-expansions-bad.s
+++ b/llvm/test/MC/Mips/mips-expansions-bad.s
@@ -1,8 +1,8 @@
-# RUN: not llvm-mc %s -arch=mips -mcpu=mips32r2 2>%t1
+# RUN: not llvm-mc %s -triple=mips -mcpu=mips32r2 2>%t1
# RUN: FileCheck %s < %t1 --check-prefix=32-BIT
-# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64 -target-abi n32 2>&1 | \
+# RUN: not llvm-mc %s -triple=mips64 -mcpu=mips64 -target-abi n32 2>&1 | \
# RUN: FileCheck %s --check-prefix=64-BIT
-# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64 -target-abi n64 2>&1 | \
+# RUN: not llvm-mc %s -triple=mips64 -mcpu=mips64 -target-abi n64 2>&1 | \
# RUN: FileCheck %s --check-prefix=64-BIT
.text
diff --git a/llvm/test/MC/Mips/mips-pc16-fixup.s b/llvm/test/MC/Mips/mips-pc16-fixup.s
index ae4c915d97d502c..064724719688bff 100644
--- a/llvm/test/MC/Mips/mips-pc16-fixup.s
+++ b/llvm/test/MC/Mips/mips-pc16-fixup.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc %s -triple=mips-unknown-linux -mcpu=mips32r2 -arch=mips 2>&1 -filetype=obj | FileCheck %s
+# RUN: llvm-mc %s -triple=mips-unknown-linux -mcpu=mips32r2 -triple=mips 2>&1 -filetype=obj | FileCheck %s
#
# CHECK-NOT: error: out of range PC16 fixup
diff --git a/llvm/test/MC/Mips/mips-pdr-bad.s b/llvm/test/MC/Mips/mips-pdr-bad.s
index 40c6ba2a1f2e1a6..1e15a8893db2fcb 100644
--- a/llvm/test/MC/Mips/mips-pdr-bad.s
+++ b/llvm/test/MC/Mips/mips-pdr-bad.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc %s -arch=mips -mcpu=mips32r2 2>%t1
+# RUN: not llvm-mc %s -triple=mips -mcpu=mips32r2 2>%t1
# RUN: FileCheck %s < %t1 -check-prefix=ASM
.text
diff --git a/llvm/test/MC/Mips/mips-pdr.s b/llvm/test/MC/Mips/mips-pdr.s
index a6a9646573a8d14..c66cbfa0a604857 100644
--- a/llvm/test/MC/Mips/mips-pdr.s
+++ b/llvm/test/MC/Mips/mips-pdr.s
@@ -1,7 +1,7 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -filetype=asm | \
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32r2 -filetype=asm | \
# RUN: FileCheck %s -check-prefix=ASMOUT
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -filetype=obj -o - | \
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32r2 -filetype=obj -o - | \
# RUN: llvm-readobj -S --section-data -r - | \
# RUN: FileCheck %s -check-prefix=OBJOUT
diff --git a/llvm/test/MC/Mips/mips-reginfo-fp32.s b/llvm/test/MC/Mips/mips-reginfo-fp32.s
index f37ad7c96b59688..8328268facadbf3 100644
--- a/llvm/test/MC/Mips/mips-reginfo-fp32.s
+++ b/llvm/test/MC/Mips/mips-reginfo-fp32.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -filetype=obj -o - | \
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32r2 -filetype=obj -o - | \
# RUN: llvm-readobj -S --section-data - | \
# RUN: FileCheck %s
diff --git a/llvm/test/MC/Mips/mips-reginfo-fp64.s b/llvm/test/MC/Mips/mips-reginfo-fp64.s
index b7dee963082a63b..0a6dc65601348fb 100644
--- a/llvm/test/MC/Mips/mips-reginfo-fp64.s
+++ b/llvm/test/MC/Mips/mips-reginfo-fp64.s
@@ -1,12 +1,12 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa,+fp64 -filetype=obj -o - | \
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32r2 -mattr=+msa,+fp64 -filetype=obj -o - | \
# RUN: llvm-readobj -S --section-data - | \
# RUN: FileCheck %s -check-prefix=ELF32
-# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -mattr=+msa,+fp64 -target-abi n32 -filetype=obj -o - | \
+# RUN: llvm-mc %s -triple=mips64 -mcpu=mips64r2 -mattr=+msa,+fp64 -target-abi n32 -filetype=obj -o - | \
# RUN: llvm-readobj -S --section-data - | \
# RUN: FileCheck %s -check-prefix=ELF32
-# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -mattr=+msa,+fp64 -target-abi n64 -filetype=obj -o - | \
+# RUN: llvm-mc %s -triple=mips64 -mcpu=mips64r2 -mattr=+msa,+fp64 -target-abi n64 -filetype=obj -o - | \
# RUN: llvm-readobj -S --section-data - | \
# RUN: FileCheck %s -check-prefix=ELF64
diff --git a/llvm/test/MC/Mips/mips16/invalid.s b/llvm/test/MC/Mips/mips16/invalid.s
index 4ed3c91433315a2..ad28e40f7677fbf 100644
--- a/llvm/test/MC/Mips/mips16/invalid.s
+++ b/llvm/test/MC/Mips/mips16/invalid.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -arch=mips -mcpu=mips32r2 -mattr=+mips16 < %s 2> %t
+# RUN: not llvm-mc -triple=mips -mcpu=mips32r2 -mattr=+mips16 < %s 2> %t
# RUN: FileCheck %s < %t
# Instructions which are invalid.
diff --git a/llvm/test/MC/Mips/mips16/valid.s b/llvm/test/MC/Mips/mips16/valid.s
index 887ff19c908eaec..942bfd1a00faba5 100644
--- a/llvm/test/MC/Mips/mips16/valid.s
+++ b/llvm/test/MC/Mips/mips16/valid.s
@@ -1,3 +1,3 @@
-# RUN: llvm-mc -arch=mips -mcpu=mips32r2 -mattr=+mips16 -show-encoding -show-inst < %s
+# RUN: llvm-mc -triple=mips -mcpu=mips32r2 -mattr=+mips16 -show-encoding -show-inst < %s
nop
diff --git a/llvm/test/MC/Mips/mips32r2/valid-fp64.s b/llvm/test/MC/Mips/mips32r2/valid-fp64.s
index 56b5ab85fab0603..fa2dbd406d63dcd 100644
--- a/llvm/test/MC/Mips/mips32r2/valid-fp64.s
+++ b/llvm/test/MC/Mips/mips32r2/valid-fp64.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=mips -mcpu=mips32r2 -mattr=+fp64 -show-encoding -show-inst %s | \
+# RUN: llvm-mc -triple=mips -mcpu=mips32r2 -mattr=+fp64 -show-encoding -show-inst %s | \
# RUN: FileCheck %s
abs.d $f0, $f12 # CHECK: abs.d $f0, $f12 # encoding: [0x46,0x20,0x60,0x05]
diff --git a/llvm/test/MC/Mips/mips32r3/valid-fp64.s b/llvm/test/MC/Mips/mips32r3/valid-fp64.s
index c228ff645d8c9ca..4f725a49a5600a4 100644
--- a/llvm/test/MC/Mips/mips32r3/valid-fp64.s
+++ b/llvm/test/MC/Mips/mips32r3/valid-fp64.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=mips -mcpu=mips32r3 -mattr=+fp64 -show-encoding -show-inst %s | \
+# RUN: llvm-mc -triple=mips -mcpu=mips32r3 -mattr=+fp64 -show-encoding -show-inst %s | \
# RUN: FileCheck %s
abs.d $f0, $f12 # CHECK: abs.d $f0, $f12 # encoding: [0x46,0x20,0x60,0x05]
diff --git a/llvm/test/MC/Mips/mips32r5/valid-fp64.s b/llvm/test/MC/Mips/mips32r5/valid-fp64.s
index a7d4a01ec106dbb..4d3ea11e57e1165 100644
--- a/llvm/test/MC/Mips/mips32r5/valid-fp64.s
+++ b/llvm/test/MC/Mips/mips32r5/valid-fp64.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=mips -mcpu=mips32r5 -mattr=+fp64 -show-encoding -show-inst %s | \
+# RUN: llvm-mc -triple=mips -mcpu=mips32r5 -mattr=+fp64 -show-encoding -show-inst %s | \
# RUN: FileCheck %s
abs.d $f0, $f12 # CHECK: abs.d $f0, $f12 # encoding: [0x46,0x20,0x60,0x05]
diff --git a/llvm/test/MC/Mips/mips64/abiflags.s b/llvm/test/MC/Mips/mips64/abiflags.s
index bccfa775ddb0ec7..e2703f896cd7a40 100644
--- a/llvm/test/MC/Mips/mips64/abiflags.s
+++ b/llvm/test/MC/Mips/mips64/abiflags.s
@@ -1,7 +1,7 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips64 -target-abi n64 | \
+# RUN: llvm-mc %s -triple=mips -mcpu=mips64 -target-abi n64 | \
# RUN: FileCheck %s -check-prefix=CHECK-ASM
#
-# RUN: llvm-mc %s -arch=mips -mcpu=mips64 -target-abi n64 -filetype=obj -o - | \
+# RUN: llvm-mc %s -triple=mips -mcpu=mips64 -target-abi n64 -filetype=obj -o - | \
# RUN: llvm-readobj --sections --section-data --section-relocations - | \
# RUN: FileCheck %s -check-prefix=CHECK-OBJ
diff --git a/llvm/test/MC/Mips/mips64extins.s b/llvm/test/MC/Mips/mips64extins.s
index 442ea206610a2d7..b54ac275cd46699 100644
--- a/llvm/test/MC/Mips/mips64extins.s
+++ b/llvm/test/MC/Mips/mips64extins.s
@@ -1,7 +1,7 @@
-# RUN: llvm-mc -arch=mips64el -filetype=obj -mcpu=mips64r2 -target-abi=n64 %s -o - \
+# RUN: llvm-mc -triple=mips64el -filetype=obj -mcpu=mips64r2 -target-abi=n64 %s -o - \
# RUN: | llvm-objdump --no-print-imm-hex -d - | FileCheck --check-prefix=OBJ %s
-# RUN: llvm-mc -arch=mips64el -mcpu=mips64r2 -target-abi=n64 %s -o - \
+# RUN: llvm-mc -triple=mips64el -mcpu=mips64r2 -target-abi=n64 %s -o - \
# RUN: | FileCheck --check-prefix=ASM %s
dext $2, $4, 5, 10 # OBJ: dext ${{[0-9]+}}, ${{[0-9]+}}, 5, 10
diff --git a/llvm/test/MC/Mips/mips64r2/abiflags.s b/llvm/test/MC/Mips/mips64r2/abiflags.s
index 799411d5afe8e64..f4e2a8625d962bd 100644
--- a/llvm/test/MC/Mips/mips64r2/abiflags.s
+++ b/llvm/test/MC/Mips/mips64r2/abiflags.s
@@ -1,7 +1,7 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips64r2 -target-abi n64 | \
+# RUN: llvm-mc %s -triple=mips -mcpu=mips64r2 -target-abi n64 | \
# RUN: FileCheck %s -check-prefix=CHECK-ASM
#
-# RUN: llvm-mc %s -arch=mips -mcpu=mips64r2 -target-abi n64 -filetype=obj -o - | \
+# RUN: llvm-mc %s -triple=mips -mcpu=mips64r2 -target-abi n64 -filetype=obj -o - | \
# RUN: llvm-readobj --sections --section-data --section-relocations - | \
# RUN: FileCheck %s -check-prefix=CHECK-OBJ
diff --git a/llvm/test/MC/Mips/mips64r3/abiflags.s b/llvm/test/MC/Mips/mips64r3/abiflags.s
index 71da8e970bedac7..29822fa0b0976db 100644
--- a/llvm/test/MC/Mips/mips64r3/abiflags.s
+++ b/llvm/test/MC/Mips/mips64r3/abiflags.s
@@ -1,7 +1,7 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips64r3 -target-abi n64 | \
+# RUN: llvm-mc %s -triple=mips -mcpu=mips64r3 -target-abi n64 | \
# RUN: FileCheck %s -check-prefix=CHECK-ASM
#
-# RUN: llvm-mc %s -arch=mips -mcpu=mips64r3 -target-abi n64 -filetype=obj -o - | \
+# RUN: llvm-mc %s -triple=mips -mcpu=mips64r3 -target-abi n64 -filetype=obj -o - | \
# RUN: llvm-readobj --sections --section-data --section-relocations - | \
# RUN: FileCheck %s -check-prefix=CHECK-OBJ
diff --git a/llvm/test/MC/Mips/mips64r5/abiflags.s b/llvm/test/MC/Mips/mips64r5/abiflags.s
index 71253eeb4135c3c..4cd10a9634d4aa3 100644
--- a/llvm/test/MC/Mips/mips64r5/abiflags.s
+++ b/llvm/test/MC/Mips/mips64r5/abiflags.s
@@ -1,7 +1,7 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips64r5 -target-abi n64 | \
+# RUN: llvm-mc %s -triple=mips -mcpu=mips64r5 -target-abi n64 | \
# RUN: FileCheck %s -check-prefix=CHECK-ASM
#
-# RUN: llvm-mc %s -arch=mips -mcpu=mips64r5 -target-abi n64 -filetype=obj -o - | \
+# RUN: llvm-mc %s -triple=mips -mcpu=mips64r5 -target-abi n64 -filetype=obj -o - | \
# RUN: llvm-readobj --sections --section-data --section-relocations - | \
# RUN: FileCheck %s -check-prefix=CHECK-OBJ
diff --git a/llvm/test/MC/Mips/module-softfloat.s b/llvm/test/MC/Mips/module-softfloat.s
index 94ab7be63dccb16..c728b8030135958 100644
--- a/llvm/test/MC/Mips/module-softfloat.s
+++ b/llvm/test/MC/Mips/module-softfloat.s
@@ -1,7 +1,7 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32 | \
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32 | \
# RUN: FileCheck %s -check-prefix=CHECK-ASM
#
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32 -filetype=obj -o - | \
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32 -filetype=obj -o - | \
# RUN: llvm-readobj -A - | \
# RUN: FileCheck %s -check-prefix=CHECK-OBJ
diff --git a/llvm/test/MC/Mips/msa/set-msa-directive-bad.s b/llvm/test/MC/Mips/msa/set-msa-directive-bad.s
index 02cb9a67e789317..1f6bba5e62f524f 100644
--- a/llvm/test/MC/Mips/msa/set-msa-directive-bad.s
+++ b/llvm/test/MC/Mips/msa/set-msa-directive-bad.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc %s -arch=mips -mcpu=mips32r2 2>%t1
+# RUN: not llvm-mc %s -triple=mips -mcpu=mips32r2 2>%t1
# RUN: FileCheck %s < %t1
.set nomsa
diff --git a/llvm/test/MC/Mips/msa/set-msa-directive.s b/llvm/test/MC/Mips/msa/set-msa-directive.s
index 461ddba1945a180..cebe528fd3c5b5f 100644
--- a/llvm/test/MC/Mips/msa/set-msa-directive.s
+++ b/llvm/test/MC/Mips/msa/set-msa-directive.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 | FileCheck %s
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32r2 | FileCheck %s
# CHECK: .set msa
# CHECK: addvi.b $w14, $w12, 14
diff --git a/llvm/test/MC/Mips/msa/test_2r.s b/llvm/test/MC/Mips/msa/test_2r.s
index 01bea645e1a5489..3792be681613169 100644
--- a/llvm/test/MC/Mips/msa/test_2r.s
+++ b/llvm/test/MC/Mips/msa/test_2r.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
#
# CHECK: fill.b $w30, $9 # encoding: [0x7b,0x00,0x4f,0x9e]
# CHECK: fill.h $w31, $23 # encoding: [0x7b,0x01,0xbf,0xde]
diff --git a/llvm/test/MC/Mips/msa/test_2r_msa64.s b/llvm/test/MC/Mips/msa/test_2r_msa64.s
index f6e35c461469f02..391ca89abd526ee 100644
--- a/llvm/test/MC/Mips/msa/test_2r_msa64.s
+++ b/llvm/test/MC/Mips/msa/test_2r_msa64.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -mattr=+msa -show-encoding | FileCheck %s
+# RUN: llvm-mc %s -triple=mips64 -mcpu=mips64r2 -mattr=+msa -show-encoding | FileCheck %s
#
# CHECK: fill.d $w27, $9 # encoding: [0x7b,0x03,0x4e,0xde]
diff --git a/llvm/test/MC/Mips/msa/test_2rf.s b/llvm/test/MC/Mips/msa/test_2rf.s
index 5d41545c3376ac2..a7932bb9067d7cb 100644
--- a/llvm/test/MC/Mips/msa/test_2rf.s
+++ b/llvm/test/MC/Mips/msa/test_2rf.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
#
# CHECK: fclass.w $w26, $w12 # encoding: [0x7b,0x20,0x66,0x9e]
# CHECK: fclass.d $w24, $w17 # encoding: [0x7b,0x21,0x8e,0x1e]
diff --git a/llvm/test/MC/Mips/msa/test_3r.s b/llvm/test/MC/Mips/msa/test_3r.s
index df2e1e112606e86..879d29a07ae12a6 100644
--- a/llvm/test/MC/Mips/msa/test_3r.s
+++ b/llvm/test/MC/Mips/msa/test_3r.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
#
# CHECK: add_a.b $w26, $w9, $w4 # encoding: [0x78,0x04,0x4e,0x90]
# CHECK: add_a.h $w23, $w27, $w31 # encoding: [0x78,0x3f,0xdd,0xd0]
diff --git a/llvm/test/MC/Mips/msa/test_3rf.s b/llvm/test/MC/Mips/msa/test_3rf.s
index c5896d78c5b9fb1..c5c8b18c6025f3c 100644
--- a/llvm/test/MC/Mips/msa/test_3rf.s
+++ b/llvm/test/MC/Mips/msa/test_3rf.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
#
# CHECK: fadd.w $w28, $w19, $w28 # encoding: [0x78,0x1c,0x9f,0x1b]
# CHECK: fadd.d $w13, $w2, $w29 # encoding: [0x78,0x3d,0x13,0x5b]
diff --git a/llvm/test/MC/Mips/msa/test_bit.s b/llvm/test/MC/Mips/msa/test_bit.s
index 85ebe54fea47da3..52b2fbae120fce9 100644
--- a/llvm/test/MC/Mips/msa/test_bit.s
+++ b/llvm/test/MC/Mips/msa/test_bit.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
#
# CHECK: bclri.b $w21, $w30, 2 # encoding: [0x79,0xf2,0xf5,0x49]
# CHECK: bclri.h $w24, $w21, 0 # encoding: [0x79,0xe0,0xae,0x09]
diff --git a/llvm/test/MC/Mips/msa/test_cbranch.s b/llvm/test/MC/Mips/msa/test_cbranch.s
index aa6779b1b46efb3..c7486b92125cb3c 100644
--- a/llvm/test/MC/Mips/msa/test_cbranch.s
+++ b/llvm/test/MC/Mips/msa/test_cbranch.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
#
#CHECK: bnz.b $w0, 4 # encoding: [0x47,0x80,0x00,0x01]
#CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
diff --git a/llvm/test/MC/Mips/msa/test_ctrlregs.s b/llvm/test/MC/Mips/msa/test_ctrlregs.s
index 3329072b310d103..d0d33c035618d9b 100644
--- a/llvm/test/MC/Mips/msa/test_ctrlregs.s
+++ b/llvm/test/MC/Mips/msa/test_ctrlregs.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
#
#CHECK: cfcmsa $1, $0 # encoding: [0x78,0x7e,0x00,0x59]
#CHECK: cfcmsa $1, $0 # encoding: [0x78,0x7e,0x00,0x59]
diff --git a/llvm/test/MC/Mips/msa/test_dlsa.s b/llvm/test/MC/Mips/msa/test_dlsa.s
index 5e14571c84e70df..de1fac1086fec3a 100644
--- a/llvm/test/MC/Mips/msa/test_dlsa.s
+++ b/llvm/test/MC/Mips/msa/test_dlsa.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -mattr=+msa -show-encoding | \
+# RUN: llvm-mc %s -triple=mips64 -mcpu=mips64r2 -mattr=+msa -show-encoding | \
# RUN: FileCheck %s
#
# CHECK: dlsa $8, $9, $10, 1 # encoding: [0x01,0x2a,0x40,0x15]
diff --git a/llvm/test/MC/Mips/msa/test_elm.s b/llvm/test/MC/Mips/msa/test_elm.s
index ca6f18c9584fa67..ea19b6c0ce8717a 100644
--- a/llvm/test/MC/Mips/msa/test_elm.s
+++ b/llvm/test/MC/Mips/msa/test_elm.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
copy_s.b $13, $w8[2] # CHECK: copy_s.b $13, $w8[2] # encoding: [0x78,0x82,0x43,0x59]
copy_s.h $1, $w25[0] # CHECK: copy_s.h $1, $w25[0] # encoding: [0x78,0xa0,0xc8,0x59]
diff --git a/llvm/test/MC/Mips/msa/test_elm_insert.s b/llvm/test/MC/Mips/msa/test_elm_insert.s
index d58a4e0b5e73969..c30073dd3a8f446 100644
--- a/llvm/test/MC/Mips/msa/test_elm_insert.s
+++ b/llvm/test/MC/Mips/msa/test_elm_insert.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
#
# CHECK: insert.b $w23[3], $sp # encoding: [0x79,0x03,0xed,0xd9]
# CHECK: insert.h $w20[2], $5 # encoding: [0x79,0x22,0x2d,0x19]
diff --git a/llvm/test/MC/Mips/msa/test_elm_insert_msa64.s b/llvm/test/MC/Mips/msa/test_elm_insert_msa64.s
index 4e99bdb4e9e54b7..3f6afeda361a2a1 100644
--- a/llvm/test/MC/Mips/msa/test_elm_insert_msa64.s
+++ b/llvm/test/MC/Mips/msa/test_elm_insert_msa64.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -mattr=+msa -show-encoding | FileCheck %s
+# RUN: llvm-mc %s -triple=mips64 -mcpu=mips64r2 -mattr=+msa -show-encoding | FileCheck %s
#
# CHECK: insert.d $w1[1], $sp # encoding: [0x79,0x39,0xe8,0x59]
diff --git a/llvm/test/MC/Mips/msa/test_elm_insve.s b/llvm/test/MC/Mips/msa/test_elm_insve.s
index 0053322dc7c9ca5..c250f8b6df40185 100644
--- a/llvm/test/MC/Mips/msa/test_elm_insve.s
+++ b/llvm/test/MC/Mips/msa/test_elm_insve.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
#
# CHECK: insve.b $w25[3], $w9[0] # encoding: [0x79,0x43,0x4e,0x59]
# CHECK: insve.h $w24[2], $w2[0] # encoding: [0x79,0x62,0x16,0x19]
diff --git a/llvm/test/MC/Mips/msa/test_elm_msa64.s b/llvm/test/MC/Mips/msa/test_elm_msa64.s
index 8e4c540c50195b6..7a9569019c5ca34 100644
--- a/llvm/test/MC/Mips/msa/test_elm_msa64.s
+++ b/llvm/test/MC/Mips/msa/test_elm_msa64.s
@@ -1,3 +1,3 @@
-# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -mattr=+msa -show-encoding | FileCheck %s
+# RUN: llvm-mc %s -triple=mips64 -mcpu=mips64r2 -mattr=+msa -show-encoding | FileCheck %s
copy_s.d $19, $w31[0] # CHECK: copy_s.d $19, $w31[0] # encoding: [0x78,0xb8,0xfc,0xd9]
diff --git a/llvm/test/MC/Mips/msa/test_i10.s b/llvm/test/MC/Mips/msa/test_i10.s
index d89218ae105a953..25da48e9ee32497 100644
--- a/llvm/test/MC/Mips/msa/test_i10.s
+++ b/llvm/test/MC/Mips/msa/test_i10.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
#
# CHECK: ldi.b $w8, 198 # encoding: [0x7b,0x06,0x32,0x07]
# CHECK: ldi.h $w20, 313 # encoding: [0x7b,0x29,0xcd,0x07]
diff --git a/llvm/test/MC/Mips/msa/test_i5.s b/llvm/test/MC/Mips/msa/test_i5.s
index d923787550e8508..68279a8fd0207fd 100644
--- a/llvm/test/MC/Mips/msa/test_i5.s
+++ b/llvm/test/MC/Mips/msa/test_i5.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
#
# CHECK: addvi.b $w3, $w31, 30 # encoding: [0x78,0x1e,0xf8,0xc6]
# CHECK: addvi.h $w24, $w13, 26 # encoding: [0x78,0x3a,0x6e,0x06]
diff --git a/llvm/test/MC/Mips/msa/test_i8.s b/llvm/test/MC/Mips/msa/test_i8.s
index b520bb4452e7a4a..c41cac9dc55001d 100644
--- a/llvm/test/MC/Mips/msa/test_i8.s
+++ b/llvm/test/MC/Mips/msa/test_i8.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
#
# CHECK: andi.b $w2, $w29, 48 # encoding: [0x78,0x30,0xe8,0x80]
# CHECK: bmnzi.b $w6, $w22, 126 # encoding: [0x78,0x7e,0xb1,0x81]
diff --git a/llvm/test/MC/Mips/msa/test_lsa.s b/llvm/test/MC/Mips/msa/test_lsa.s
index 22fd0b3039ed350..4a20b3f75437fee 100644
--- a/llvm/test/MC/Mips/msa/test_lsa.s
+++ b/llvm/test/MC/Mips/msa/test_lsa.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
#
# CHECK: lsa $8, $9, $10, 1 # encoding: [0x01,0x2a,0x40,0x05]
# CHECK: lsa $8, $9, $10, 2 # encoding: [0x01,0x2a,0x40,0x45]
diff --git a/llvm/test/MC/Mips/msa/test_mi10.s b/llvm/test/MC/Mips/msa/test_mi10.s
index f20ffa29372b81f..e5c4e5b39f26199 100644
--- a/llvm/test/MC/Mips/msa/test_mi10.s
+++ b/llvm/test/MC/Mips/msa/test_mi10.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
#
ld.b $w0, -512($1) # CHECK: ld.b $w0, -512($1) # encoding: [0x7a,0x00,0x08,0x20]
ld.b $w1, 0($2) # CHECK: ld.b $w1, 0($2) # encoding: [0x78,0x00,0x10,0x60]
diff --git a/llvm/test/MC/Mips/msa/test_vec.s b/llvm/test/MC/Mips/msa/test_vec.s
index 3f989d3a5946504..d8630e5fa2bec6a 100644
--- a/llvm/test/MC/Mips/msa/test_vec.s
+++ b/llvm/test/MC/Mips/msa/test_vec.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
#
# CHECK: and.v $w25, $w20, $w27 # encoding: [0x78,0x1b,0xa6,0x5e]
# CHECK: bmnz.v $w17, $w6, $w7 # encoding: [0x78,0x87,0x34,0x5e]
diff --git a/llvm/test/MC/Mips/mt/abiflag.s b/llvm/test/MC/Mips/mt/abiflag.s
index 9f8592635bebfe1..f0d006650b184ed 100644
--- a/llvm/test/MC/Mips/mt/abiflag.s
+++ b/llvm/test/MC/Mips/mt/abiflag.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc < %s -arch=mips -mcpu=mips32r2 -mattr=+mt -filetype=obj -o - \
+# RUN: llvm-mc < %s -triple=mips -mcpu=mips32r2 -mattr=+mt -filetype=obj -o - \
# RUN: | llvm-readobj -A - | FileCheck %s
# Test that the usage of the MT ASE is recorded in .MIPS.abiflags
diff --git a/llvm/test/MC/Mips/mt/invalid-wrong-error.s b/llvm/test/MC/Mips/mt/invalid-wrong-error.s
index 6de852cf0cbe3b8..dd74921c49c2fcd 100644
--- a/llvm/test/MC/Mips/mt/invalid-wrong-error.s
+++ b/llvm/test/MC/Mips/mt/invalid-wrong-error.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -arch=mips -mcpu=mips32r2 -mattr=+mt < %s 2>%t1
+# RUN: not llvm-mc -triple=mips -mcpu=mips32r2 -mattr=+mt < %s 2>%t1
# RUN: FileCheck %s < %t1
mftr 0($4), $5, 0, 0, 0 # CHECK: error: unexpected token in argument list
mttr 0($4), $5, 0, 0, 0 # CHECK: error: unexpected token in argument list
diff --git a/llvm/test/MC/Mips/mt/invalid.s b/llvm/test/MC/Mips/mt/invalid.s
index e459bc0becbd8a1..f58de96446bbc38 100644
--- a/llvm/test/MC/Mips/mt/invalid.s
+++ b/llvm/test/MC/Mips/mt/invalid.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -arch=mips -mcpu=mips32 -mattr=+mt < %s 2>%t1
+# RUN: not llvm-mc -triple=mips -mcpu=mips32 -mattr=+mt < %s 2>%t1
# RUN: FileCheck %s < %t1
dmt 4 # CHECK: error: invalid operand for instruction
dmt $4, $5 # CHECK: error: invalid operand for instruction
diff --git a/llvm/test/MC/Mips/mt/mftr-mttr-aliases-invalid-wrong-error.s b/llvm/test/MC/Mips/mt/mftr-mttr-aliases-invalid-wrong-error.s
index d931b499f26e086..b3a7e4e2629a116 100644
--- a/llvm/test/MC/Mips/mt/mftr-mttr-aliases-invalid-wrong-error.s
+++ b/llvm/test/MC/Mips/mt/mftr-mttr-aliases-invalid-wrong-error.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -arch=mips -mcpu=mips32r2 -mattr=+mt -show-encoding < %s 2>%t1
+# RUN: not llvm-mc -triple=mips -mcpu=mips32r2 -mattr=+mt -show-encoding < %s 2>%t1
# RUN: FileCheck %s < %t1
# The integrated assembler produces a wrong or misleading error message.
diff --git a/llvm/test/MC/Mips/mt/mftr-mttr-aliases-invalid.s b/llvm/test/MC/Mips/mt/mftr-mttr-aliases-invalid.s
index 17d954030cd1216..c22dce76994c82c 100644
--- a/llvm/test/MC/Mips/mt/mftr-mttr-aliases-invalid.s
+++ b/llvm/test/MC/Mips/mt/mftr-mttr-aliases-invalid.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -arch=mips -mcpu=mips32r2 -mattr=+mt -show-encoding < %s 2>%t1
+# RUN: not llvm-mc -triple=mips -mcpu=mips32r2 -mattr=+mt -show-encoding < %s 2>%t1
# RUN: FileCheck %s < %t1
mftc0 $4, 0($5) # CHECK: error: invalid operand for instruction
diff --git a/llvm/test/MC/Mips/mt/mftr-mttr-aliases.s b/llvm/test/MC/Mips/mt/mftr-mttr-aliases.s
index 92ed9f9281f2010..92e99fefc3dc166 100644
--- a/llvm/test/MC/Mips/mt/mftr-mttr-aliases.s
+++ b/llvm/test/MC/Mips/mt/mftr-mttr-aliases.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=mips -mcpu=mips32r2 -mattr=+mt -show-encoding < %s | FileCheck %s
+# RUN: llvm-mc -triple=mips -mcpu=mips32r2 -mattr=+mt -show-encoding < %s | FileCheck %s
# Check the various aliases of the m[ft]tr instruction.
diff --git a/llvm/test/MC/Mips/mt/mftr-mttr-reserved-valid.s b/llvm/test/MC/Mips/mt/mftr-mttr-reserved-valid.s
index c40e81bfc7d7540..1468806d1ab0c16 100644
--- a/llvm/test/MC/Mips/mt/mftr-mttr-reserved-valid.s
+++ b/llvm/test/MC/Mips/mt/mftr-mttr-reserved-valid.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=mips -mcpu=mips32r2 -mattr=+mt -show-encoding < %s | FileCheck %s
+# RUN: llvm-mc -triple=mips -mcpu=mips32r2 -mattr=+mt -show-encoding < %s | FileCheck %s
# The selector value and register values here are marked as reserved in the
# documentation, but GAS accepts them without warning.
diff --git a/llvm/test/MC/Mips/mt/module-directive-invalid.s b/llvm/test/MC/Mips/mt/module-directive-invalid.s
index 38baaa07cdc171d..e5e3a8c3f64d296 100644
--- a/llvm/test/MC/Mips/mt/module-directive-invalid.s
+++ b/llvm/test/MC/Mips/mt/module-directive-invalid.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -arch=mips -mcpu=mips32r5 < %s 2>&1 | FileCheck %s
+# RUN: not llvm-mc -triple=mips -mcpu=mips32r5 < %s 2>&1 | FileCheck %s
# CHECK: error: .module directive must appear before any code
.set nomips16
diff --git a/llvm/test/MC/Mips/mt/module-directive.s b/llvm/test/MC/Mips/mt/module-directive.s
index 0b7430890082082..3a2bd48b9812c40 100644
--- a/llvm/test/MC/Mips/mt/module-directive.s
+++ b/llvm/test/MC/Mips/mt/module-directive.s
@@ -1,6 +1,6 @@
-# RUN: llvm-mc < %s -arch=mips -mcpu=mips32r2 -filetype=obj -o - | \
+# RUN: llvm-mc < %s -triple=mips -mcpu=mips32r2 -filetype=obj -o - | \
# RUN: llvm-readobj -A - | FileCheck --check-prefix=CHECK-OBJ %s
-# RUN: llvm-mc < %s -arch=mips -mcpu=mips32r2 -filetype=asm -o - | \
+# RUN: llvm-mc < %s -triple=mips -mcpu=mips32r2 -filetype=asm -o - | \
# RUN: FileCheck --check-prefix=CHECK-ASM %s
# Test that the .module directive sets the MT flag in .MIPS.abiflags when
diff --git a/llvm/test/MC/Mips/mt/set-directive.s b/llvm/test/MC/Mips/mt/set-directive.s
index 3593c2ddde5225f..8995c02ef5bd16f 100644
--- a/llvm/test/MC/Mips/mt/set-directive.s
+++ b/llvm/test/MC/Mips/mt/set-directive.s
@@ -1,6 +1,6 @@
-# RUN: llvm-mc < %s -arch=mips -mcpu=mips32r2 -filetype=obj -o - | \
+# RUN: llvm-mc < %s -triple=mips -mcpu=mips32r2 -filetype=obj -o - | \
# RUN: llvm-readobj -A - | FileCheck %s --check-prefix=CHECK-OBJ
-# RUN: llvm-mc < %s -arch=mips -mcpu=mips32r2 -filetype=asm -o - | \
+# RUN: llvm-mc < %s -triple=mips -mcpu=mips32r2 -filetype=asm -o - | \
# RUN: FileCheck %s --check-prefix=CHECK-ASM
# Test that the MT ASE flag in .MIPS.abiflags is _not_ set by .set.
diff --git a/llvm/test/MC/Mips/mt/valid.s b/llvm/test/MC/Mips/mt/valid.s
index 9fa07870a61f24a..8860f8b1088316d 100644
--- a/llvm/test/MC/Mips/mt/valid.s
+++ b/llvm/test/MC/Mips/mt/valid.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -arch=mips -mcpu=mips32r2 -mattr=+mt -show-encoding < %s \
+# RUN: llvm-mc -triple=mips -mcpu=mips32r2 -mattr=+mt -show-encoding < %s \
# RUN: | FileCheck %s
dmt # CHECK: dmt # encoding: [0x41,0x60,0x0b,0xc1]
dmt $5 # CHECK: dmt $5 # encoding: [0x41,0x65,0x0b,0xc1]
diff --git a/llvm/test/MC/Mips/rotations32-bad.s b/llvm/test/MC/Mips/rotations32-bad.s
index 600000e7caef6d0..8eafb2413b313dd 100644
--- a/llvm/test/MC/Mips/rotations32-bad.s
+++ b/llvm/test/MC/Mips/rotations32-bad.s
@@ -1,12 +1,12 @@
-# RUN: not llvm-mc %s -arch=mips -mcpu=mips32 -show-encoding 2> %t1
+# RUN: not llvm-mc %s -triple=mips -mcpu=mips32 -show-encoding 2> %t1
# RUN: FileCheck %s < %t1
-# RUN: not llvm-mc %s -arch=mips -mcpu=mips32r2 -show-encoding 2> %t1
+# RUN: not llvm-mc %s -triple=mips -mcpu=mips32r2 -show-encoding 2> %t1
# RUN: FileCheck %s < %t1
-# RUN: not llvm-mc %s -arch=mips -mcpu=mips32r3 -show-encoding 2> %t1
+# RUN: not llvm-mc %s -triple=mips -mcpu=mips32r3 -show-encoding 2> %t1
# RUN: FileCheck %s < %t1
-# RUN: not llvm-mc %s -arch=mips -mcpu=mips32r5 -show-encoding 2> %t1
+# RUN: not llvm-mc %s -triple=mips -mcpu=mips32r5 -show-encoding 2> %t1
# RUN: FileCheck %s < %t1
-# RUN: not llvm-mc %s -arch=mips -mcpu=mips32r6 -show-encoding 2> %t1
+# RUN: not llvm-mc %s -triple=mips -mcpu=mips32r6 -show-encoding 2> %t1
# RUN: FileCheck %s < %t1
.text
diff --git a/llvm/test/MC/Mips/rotations32.s b/llvm/test/MC/Mips/rotations32.s
index 64207708aa94daa..5f44703d65094da 100644
--- a/llvm/test/MC/Mips/rotations32.s
+++ b/llvm/test/MC/Mips/rotations32.s
@@ -1,8 +1,8 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32 -show-encoding | FileCheck %s -check-prefix=CHECK-32
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -show-encoding | FileCheck %s -check-prefix=CHECK-32R
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r3 -show-encoding | FileCheck %s -check-prefix=CHECK-32R
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r5 -show-encoding | FileCheck %s -check-prefix=CHECK-32R
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r6 -show-encoding | FileCheck %s -check-prefix=CHECK-32R
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32 -show-encoding | FileCheck %s -check-prefix=CHECK-32
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32r2 -show-encoding | FileCheck %s -check-prefix=CHECK-32R
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32r3 -show-encoding | FileCheck %s -check-prefix=CHECK-32R
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32r5 -show-encoding | FileCheck %s -check-prefix=CHECK-32R
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32r6 -show-encoding | FileCheck %s -check-prefix=CHECK-32R
.text
foo:
diff --git a/llvm/test/MC/Mips/rotations64.s b/llvm/test/MC/Mips/rotations64.s
index f25b48ad87fdfa3..ca5494c1925e91a 100644
--- a/llvm/test/MC/Mips/rotations64.s
+++ b/llvm/test/MC/Mips/rotations64.s
@@ -1,8 +1,8 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips64 -show-encoding | FileCheck %s -check-prefix=CHECK-64
-# RUN: llvm-mc %s -arch=mips -mcpu=mips64r2 -show-encoding | FileCheck %s -check-prefix=CHECK-64R
-# RUN: llvm-mc %s -arch=mips -mcpu=mips64r3 -show-encoding | FileCheck %s -check-prefix=CHECK-64R
-# RUN: llvm-mc %s -arch=mips -mcpu=mips64r5 -show-encoding | FileCheck %s -check-prefix=CHECK-64R
-# RUN: llvm-mc %s -arch=mips -mcpu=mips64r6 -show-encoding | FileCheck %s -check-prefix=CHECK-64R
+# RUN: llvm-mc %s -triple=mips -mcpu=mips64 -show-encoding | FileCheck %s -check-prefix=CHECK-64
+# RUN: llvm-mc %s -triple=mips -mcpu=mips64r2 -show-encoding | FileCheck %s -check-prefix=CHECK-64R
+# RUN: llvm-mc %s -triple=mips -mcpu=mips64r3 -show-encoding | FileCheck %s -check-prefix=CHECK-64R
+# RUN: llvm-mc %s -triple=mips -mcpu=mips64r5 -show-encoding | FileCheck %s -check-prefix=CHECK-64R
+# RUN: llvm-mc %s -triple=mips -mcpu=mips64r6 -show-encoding | FileCheck %s -check-prefix=CHECK-64R
.text
foo:
diff --git a/llvm/test/MC/Mips/set-defined-symbol.s b/llvm/test/MC/Mips/set-defined-symbol.s
index 061fec37bb21264..dd7924427c19ee9 100644
--- a/llvm/test/MC/Mips/set-defined-symbol.s
+++ b/llvm/test/MC/Mips/set-defined-symbol.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32 -filetype=obj -o - | \
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32 -filetype=obj -o - | \
# RUN: llvm-objdump -d -r - | FileCheck %s
.global foo
diff --git a/llvm/test/MC/Mips/set-mips16-directive.s b/llvm/test/MC/Mips/set-mips16-directive.s
index cf8090eaa280f56..9987c539126d4b5 100644
--- a/llvm/test/MC/Mips/set-mips16-directive.s
+++ b/llvm/test/MC/Mips/set-mips16-directive.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc %s -arch=mips | FileCheck %s
+# RUN: llvm-mc %s -triple=mips | FileCheck %s
# FIXME: Update this test when we have a more mature implementation of Mips16 in the IAS.
.text
diff --git a/llvm/test/MC/Mips/set-nomacro.s b/llvm/test/MC/Mips/set-nomacro.s
index f0e2f8883863764..302f0058e1ef9c0 100644
--- a/llvm/test/MC/Mips/set-nomacro.s
+++ b/llvm/test/MC/Mips/set-nomacro.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32 2>&1 | FileCheck %s
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32 2>&1 | FileCheck %s
# CHECK-NOT: warning: macro instruction expanded into multiple instructions
.set macro
diff --git a/llvm/test/MC/Mips/tls-symbols.s b/llvm/test/MC/Mips/tls-symbols.s
index 964d57277ebfd82..49c01ef0d23e5af 100644
--- a/llvm/test/MC/Mips/tls-symbols.s
+++ b/llvm/test/MC/Mips/tls-symbols.s
@@ -1,6 +1,6 @@
-# RUN: llvm-mc -arch=mips < %s -position-independent -filetype=obj \
+# RUN: llvm-mc -triple=mips < %s -position-independent -filetype=obj \
# RUN: | llvm-readelf -s - | FileCheck %s
-# RUN: llvm-mc -arch=mips < %s -filetype=obj | llvm-readelf -s - | FileCheck %s
+# RUN: llvm-mc -triple=mips < %s -filetype=obj | llvm-readelf -s - | FileCheck %s
# Test that TLS relocations cause symbols to be marked as TLS symbols.
diff --git a/llvm/test/MC/Mips/virt/invalid64.s b/llvm/test/MC/Mips/virt/invalid64.s
index 8a9aede4b84eefd..c92795684f45692 100644
--- a/llvm/test/MC/Mips/virt/invalid64.s
+++ b/llvm/test/MC/Mips/virt/invalid64.s
@@ -1,6 +1,6 @@
# Instructions that are invalid.
#
-# RUN: not llvm-mc %s -arch=mips -mcpu=mips64r5 -mattr=+virt 2>%t1
+# RUN: not llvm-mc %s -triple=mips -mcpu=mips64r5 -mattr=+virt 2>%t1
# RUN: FileCheck %s < %t1
dmfgc0 # CHECK: :[[@LINE]]:3: error: too few operands for instruction
diff --git a/llvm/test/MC/Mips/virt/module-novirt.s b/llvm/test/MC/Mips/virt/module-novirt.s
index 6b953d0c58576e0..5a500d5901fee01 100644
--- a/llvm/test/MC/Mips/virt/module-novirt.s
+++ b/llvm/test/MC/Mips/virt/module-novirt.s
@@ -1,7 +1,7 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r5 -mattr=+virt | \
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32r5 -mattr=+virt | \
# RUN: FileCheck %s -check-prefix=CHECK-ASM
#
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r5 -filetype=obj -o - -mattr=+virt | \
+# RUN: llvm-mc %s -triple=mips -mcpu=mips32r5 -filetype=obj -o - -mattr=+virt | \
# RUN: llvm-readobj -A - | \
# RUN: FileCheck %s -check-prefix=CHECK-OBJ
diff --git a/llvm/test/MC/Sparc/leon-instructions.s b/llvm/test/MC/Sparc/leon-instructions.s
index 210231a1a7d7edc..c2cfe70e399776e 100644
--- a/llvm/test/MC/Sparc/leon-instructions.s
+++ b/llvm/test/MC/Sparc/leon-instructions.s
@@ -1,8 +1,8 @@
-! RUN: llvm-mc %s -arch=sparc -mcpu=leon3 -show-encoding | FileCheck %s
-! RUN: llvm-mc %s -arch=sparc -mcpu=ut699 -show-encoding | FileCheck %s
-! RUN: llvm-mc %s -arch=sparc -mcpu=gr712rc -show-encoding | FileCheck %s
-! RUN: llvm-mc %s -arch=sparc -mcpu=leon4 -show-encoding | FileCheck %s
-! RUN: llvm-mc %s -arch=sparc -mcpu=gr740 -show-encoding | FileCheck %s
+! RUN: llvm-mc %s -triple=sparc -mcpu=leon3 -show-encoding | FileCheck %s
+! RUN: llvm-mc %s -triple=sparc -mcpu=ut699 -show-encoding | FileCheck %s
+! RUN: llvm-mc %s -triple=sparc -mcpu=gr712rc -show-encoding | FileCheck %s
+! RUN: llvm-mc %s -triple=sparc -mcpu=leon4 -show-encoding | FileCheck %s
+! RUN: llvm-mc %s -triple=sparc -mcpu=gr740 -show-encoding | FileCheck %s
! CHECK: umac %i0, %l6, %o2 ! encoding: [0x95,0xf6,0x00,0x16]
umac %i0, %l6, %o2
diff --git a/llvm/test/MC/Sparc/leon-pwrpsr-instruction.s b/llvm/test/MC/Sparc/leon-pwrpsr-instruction.s
index f6476c3e206f3c1..d3eb7c6cd3d42c2 100644
--- a/llvm/test/MC/Sparc/leon-pwrpsr-instruction.s
+++ b/llvm/test/MC/Sparc/leon-pwrpsr-instruction.s
@@ -1,4 +1,4 @@
-! RUN: llvm-mc %s -arch=sparc -mcpu=gr740 -show-encoding | FileCheck %s
+! RUN: llvm-mc %s -triple=sparc -mcpu=gr740 -show-encoding | FileCheck %s
! CHECK: pwr %g0, 0, %psr ! encoding: [0x83,0x88,0x20,0x00]
pwr 0, %psr
diff --git a/llvm/test/MC/Sparc/sparc-alu-instructions.s b/llvm/test/MC/Sparc/sparc-alu-instructions.s
index b08ab43f13e956f..98a3dc22b77998f 100644
--- a/llvm/test/MC/Sparc/sparc-alu-instructions.s
+++ b/llvm/test/MC/Sparc/sparc-alu-instructions.s
@@ -1,5 +1,5 @@
-! RUN: llvm-mc %s -arch=sparc -show-encoding | FileCheck %s
-! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s
+! RUN: llvm-mc %s -triple=sparc -show-encoding | FileCheck %s
+! RUN: llvm-mc %s -triple=sparcv9 -show-encoding | FileCheck %s
! CHECK: add %g0, %g0, %g0 ! encoding: [0x80,0x00,0x00,0x00]
add %g0, %g0, %g0
diff --git a/llvm/test/MC/Sparc/sparc-asm-errors.s b/llvm/test/MC/Sparc/sparc-asm-errors.s
index 3a52489b319f292..780f4e7fad787c4 100644
--- a/llvm/test/MC/Sparc/sparc-asm-errors.s
+++ b/llvm/test/MC/Sparc/sparc-asm-errors.s
@@ -1,5 +1,5 @@
-! RUN: not llvm-mc %s -arch=sparc -show-encoding 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=V8
-! RUN: not llvm-mc %s -arch=sparcv9 -show-encoding 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=V9
+! RUN: not llvm-mc %s -triple=sparc -show-encoding 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=V8
+! RUN: not llvm-mc %s -triple=sparcv9 -show-encoding 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=V9
! Test the lower and upper bounds of 'set'
! CHECK: argument must be between
diff --git a/llvm/test/MC/Sparc/sparc-assembly-exprs.s b/llvm/test/MC/Sparc/sparc-assembly-exprs.s
index 36cd1d55c71fe08..e950f1635ab3aff 100644
--- a/llvm/test/MC/Sparc/sparc-assembly-exprs.s
+++ b/llvm/test/MC/Sparc/sparc-assembly-exprs.s
@@ -1,5 +1,5 @@
-! RUN: llvm-mc %s -arch=sparc -show-encoding | FileCheck %s
-! RUN: llvm-mc %s -arch=sparc -filetype=obj | llvm-objdump -r -d - | FileCheck %s --check-prefix=OBJDUMP
+! RUN: llvm-mc %s -triple=sparc -show-encoding | FileCheck %s
+! RUN: llvm-mc %s -triple=sparc -filetype=obj | llvm-objdump -r -d - | FileCheck %s --check-prefix=OBJDUMP
! CHECK: mov 1033, %o1 ! encoding: [0x92,0x10,0x24,0x09]
mov (0x400|9), %o1
@@ -39,7 +39,7 @@ symStart:
symEnd:
! "." is exactly like a temporary symbol equated to the current line.
-! RUN: llvm-mc %s -arch=sparc | FileCheck %s --check-prefix=DOTEXPR
+! RUN: llvm-mc %s -triple=sparc | FileCheck %s --check-prefix=DOTEXPR
! DOTEXPR: .Ltmp0
! DOTEXPR-NEXT: ba .Ltmp0+8
diff --git a/llvm/test/MC/Sparc/sparc-atomic-instructions.s b/llvm/test/MC/Sparc/sparc-atomic-instructions.s
index 2ed53e7c4f68719..0e5abccb53c6586 100644
--- a/llvm/test/MC/Sparc/sparc-atomic-instructions.s
+++ b/llvm/test/MC/Sparc/sparc-atomic-instructions.s
@@ -1,5 +1,5 @@
-! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s --check-prefix=V9
-! RUN: llvm-mc %s -arch=sparc -show-encoding | FileCheck %s --check-prefix=V8
+! RUN: llvm-mc %s -triple=sparcv9 -show-encoding | FileCheck %s --check-prefix=V9
+! RUN: llvm-mc %s -triple=sparc -show-encoding | FileCheck %s --check-prefix=V8
! V8: stbar ! encoding: [0x81,0x43,0xc0,0x00]
! V9: stbar ! encoding: [0x81,0x43,0xc0,0x00]
diff --git a/llvm/test/MC/Sparc/sparc-cas-instructions.s b/llvm/test/MC/Sparc/sparc-cas-instructions.s
index 4e30fed378beb80..30ce3fd0b2d227b 100644
--- a/llvm/test/MC/Sparc/sparc-cas-instructions.s
+++ b/llvm/test/MC/Sparc/sparc-cas-instructions.s
@@ -1,6 +1,6 @@
-! RUN: not llvm-mc %s -arch=sparc -show-encoding 2>&1 | FileCheck %s --check-prefix=V8
-! RUN: not llvm-mc %s -arch=sparc -mattr=+hasleoncasa -show-encoding 2>&1 | FileCheck %s --check-prefix=LEON
-! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s --check-prefix=V9
+! RUN: not llvm-mc %s -triple=sparc -show-encoding 2>&1 | FileCheck %s --check-prefix=V8
+! RUN: not llvm-mc %s -triple=sparc -mattr=+hasleoncasa -show-encoding 2>&1 | FileCheck %s --check-prefix=LEON
+! RUN: llvm-mc %s -triple=sparcv9 -show-encoding | FileCheck %s --check-prefix=V9
! V8: error: instruction requires a CPU feature not currently enabled
! V9: cas [%i0], %l6, %o2 ! encoding: [0xd5,0xe6,0x10,0x16]
diff --git a/llvm/test/MC/Sparc/sparc-coproc.s b/llvm/test/MC/Sparc/sparc-coproc.s
index f83e415cf31e3a7..9fee09e58cf01df 100644
--- a/llvm/test/MC/Sparc/sparc-coproc.s
+++ b/llvm/test/MC/Sparc/sparc-coproc.s
@@ -1,4 +1,4 @@
-! RUN: llvm-mc %s -arch=sparc -show-encoding | FileCheck %s
+! RUN: llvm-mc %s -triple=sparc -show-encoding | FileCheck %s
! CHECK: ld [%i1], %c4 ! encoding: [0xc9,0x86,0x40,0x00]
! CHECK: ld [%i1+-15], %c4 ! encoding: [0xc9,0x86,0x7f,0xf1]
diff --git a/llvm/test/MC/Sparc/sparc-ctrl-instructions.s b/llvm/test/MC/Sparc/sparc-ctrl-instructions.s
index ef65bbe2c7893d0..109e7c9b0114872 100644
--- a/llvm/test/MC/Sparc/sparc-ctrl-instructions.s
+++ b/llvm/test/MC/Sparc/sparc-ctrl-instructions.s
@@ -1,5 +1,5 @@
-! RUN: llvm-mc %s -arch=sparc -show-encoding | FileCheck %s
-! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s
+! RUN: llvm-mc %s -triple=sparc -show-encoding | FileCheck %s
+! RUN: llvm-mc %s -triple=sparcv9 -show-encoding | FileCheck %s
! CHECK: call foo ! encoding: [0b01AAAAAA,A,A,A]
! CHECK: ! fixup A - offset: 0, value: foo, kind: fixup_sparc_call30
diff --git a/llvm/test/MC/Sparc/sparc-directive-xword.s b/llvm/test/MC/Sparc/sparc-directive-xword.s
index 736f99fbce744f6..c73543e0b801e49 100644
--- a/llvm/test/MC/Sparc/sparc-directive-xword.s
+++ b/llvm/test/MC/Sparc/sparc-directive-xword.s
@@ -1,4 +1,4 @@
-! RUN: not llvm-mc %s -arch=sparc -show-encoding 2>&1 | FileCheck %s --check-prefix=SPARC32
+! RUN: not llvm-mc %s -triple=sparc -show-encoding 2>&1 | FileCheck %s --check-prefix=SPARC32
! RUN: llvm-mc %s -triple sparc64 -show-encoding | FileCheck %s --check-prefix=SPARC64
! RUN: llvm-mc %s -triple sparcv9 -show-encoding | FileCheck %s --check-prefix=SPARCV9
diff --git a/llvm/test/MC/Sparc/sparc-directives.s b/llvm/test/MC/Sparc/sparc-directives.s
index 1e1ce740c11d091..1ccec7b2ccc03d0 100644
--- a/llvm/test/MC/Sparc/sparc-directives.s
+++ b/llvm/test/MC/Sparc/sparc-directives.s
@@ -1,5 +1,5 @@
-! RUN: llvm-mc %s -arch=sparc -show-encoding | FileCheck %s --check-prefix=SPARC32
-! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s --check-prefix=SPARC64
+! RUN: llvm-mc %s -triple=sparc -show-encoding | FileCheck %s --check-prefix=SPARC32
+! RUN: llvm-mc %s -triple=sparcv9 -show-encoding | FileCheck %s --check-prefix=SPARC64
! '.proc' is documented to do nothing in the binutils assembler.
! so it should do nothing for clang either, i.e. not be an error.
diff --git a/llvm/test/MC/Sparc/sparc-fixups.s b/llvm/test/MC/Sparc/sparc-fixups.s
index cdf006e7cff5800..5f5bf6a330392c9 100644
--- a/llvm/test/MC/Sparc/sparc-fixups.s
+++ b/llvm/test/MC/Sparc/sparc-fixups.s
@@ -1,4 +1,4 @@
-! RUN: llvm-mc %s -arch=sparcv9 -filetype=obj | llvm-objdump -dr - | FileCheck %s
+! RUN: llvm-mc %s -triple=sparcv9 -filetype=obj | llvm-objdump -dr - | FileCheck %s
.text
! Check that fixups are correctly applied.
diff --git a/llvm/test/MC/Sparc/sparc-fp-instructions.s b/llvm/test/MC/Sparc/sparc-fp-instructions.s
index ae5ef37bf22d89f..662f55eea7a836e 100644
--- a/llvm/test/MC/Sparc/sparc-fp-instructions.s
+++ b/llvm/test/MC/Sparc/sparc-fp-instructions.s
@@ -1,4 +1,4 @@
-! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s
+! RUN: llvm-mc %s -triple=sparcv9 -show-encoding | FileCheck %s
! CHECK: fitos %f0, %f4 ! encoding: [0x89,0xa0,0x18,0x80]
! CHECK: fitod %f0, %f4 ! encoding: [0x89,0xa0,0x19,0x00]
diff --git a/llvm/test/MC/Sparc/sparc-mem-asi-instructions.s b/llvm/test/MC/Sparc/sparc-mem-asi-instructions.s
index f69e26fc3e6384b..39abe7b99cb40c3 100644
--- a/llvm/test/MC/Sparc/sparc-mem-asi-instructions.s
+++ b/llvm/test/MC/Sparc/sparc-mem-asi-instructions.s
@@ -1,5 +1,5 @@
-! RUN: not llvm-mc %s -arch=sparc -show-encoding 2>&1 | FileCheck %s --check-prefix=V8
-! RUN: not llvm-mc %s -arch=sparcv9 -show-encoding 2>&1 | FileCheck %s --check-prefix=V9
+! RUN: not llvm-mc %s -triple=sparc -show-encoding 2>&1 | FileCheck %s --check-prefix=V8
+! RUN: not llvm-mc %s -triple=sparcv9 -show-encoding 2>&1 | FileCheck %s --check-prefix=V9
! V8: error: malformed ASI tag, must be a constant integer expression
! V8-NEXT: lduba [%i0] asi, %o2
diff --git a/llvm/test/MC/Sparc/sparc-mem-instructions.s b/llvm/test/MC/Sparc/sparc-mem-instructions.s
index cdcfcd588ba44e9..b087518b4586840 100644
--- a/llvm/test/MC/Sparc/sparc-mem-instructions.s
+++ b/llvm/test/MC/Sparc/sparc-mem-instructions.s
@@ -1,5 +1,5 @@
-! RUN: llvm-mc %s -arch=sparc -show-encoding | FileCheck %s --check-prefix=V8
-! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s --check-prefix=V9
+! RUN: llvm-mc %s -triple=sparc -show-encoding | FileCheck %s --check-prefix=V8
+! RUN: llvm-mc %s -triple=sparcv9 -show-encoding | FileCheck %s --check-prefix=V9
! V8: ldsb [%i0+%l6], %o2 ! encoding: [0xd4,0x4e,0x00,0x16]
! V9: ldsb [%i0+%l6], %o2 ! encoding: [0xd4,0x4e,0x00,0x16]
diff --git a/llvm/test/MC/Sparc/sparc-misc-instructions.s b/llvm/test/MC/Sparc/sparc-misc-instructions.s
index 3ae7dee07edc18c..0547575eb3db519 100644
--- a/llvm/test/MC/Sparc/sparc-misc-instructions.s
+++ b/llvm/test/MC/Sparc/sparc-misc-instructions.s
@@ -1,5 +1,5 @@
-! RUN: llvm-mc %s -arch=sparc -show-encoding | FileCheck %s
-! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s
+! RUN: llvm-mc %s -triple=sparc -show-encoding | FileCheck %s
+! RUN: llvm-mc %s -triple=sparcv9 -show-encoding | FileCheck %s
! CHECK: unimp 0 ! encoding: [0x00,0x00,0x00,0x00]
unimp
diff --git a/llvm/test/MC/Sparc/sparc-nop-data.s b/llvm/test/MC/Sparc/sparc-nop-data.s
index 1987dfd2885800c..7de1249969eb6d5 100644
--- a/llvm/test/MC/Sparc/sparc-nop-data.s
+++ b/llvm/test/MC/Sparc/sparc-nop-data.s
@@ -1,5 +1,5 @@
-! RUN: llvm-mc %s -arch=sparc -filetype=obj | llvm-readobj -S --sd - | FileCheck %s
-! RUN: llvm-mc %s -arch=sparcv9 -filetype=obj | llvm-readobj -S --sd - | FileCheck %s
+! RUN: llvm-mc %s -triple=sparc -filetype=obj | llvm-readobj -S --sd - | FileCheck %s
+! RUN: llvm-mc %s -triple=sparcv9 -filetype=obj | llvm-readobj -S --sd - | FileCheck %s
! CHECK: 0000: BA1F401D 01000000 01000000 01000000
! CHECK: 0010: BA1F401D
diff --git a/llvm/test/MC/Sparc/sparc-pic.s b/llvm/test/MC/Sparc/sparc-pic.s
index 859c6efc12ae7ab..6cfd6642c70b8a8 100644
--- a/llvm/test/MC/Sparc/sparc-pic.s
+++ b/llvm/test/MC/Sparc/sparc-pic.s
@@ -1,5 +1,5 @@
-! RUN: llvm-mc %s -arch=sparcv9 --position-independent -filetype=obj | llvm-readobj -r - | FileCheck --check-prefix=PIC %s
-! RUN: llvm-mc %s -arch=sparcv9 -filetype=obj | llvm-readobj -r - | FileCheck --check-prefix=NOPIC %s
+! RUN: llvm-mc %s -triple=sparcv9 --position-independent -filetype=obj | llvm-readobj -r - | FileCheck --check-prefix=PIC %s
+! RUN: llvm-mc %s -triple=sparcv9 -filetype=obj | llvm-readobj -r - | FileCheck --check-prefix=NOPIC %s
! PIC: Relocations [
diff --git a/llvm/test/MC/Sparc/sparc-relocations.s b/llvm/test/MC/Sparc/sparc-relocations.s
index f812105f503b10a..d99ddb7e2f802d5 100644
--- a/llvm/test/MC/Sparc/sparc-relocations.s
+++ b/llvm/test/MC/Sparc/sparc-relocations.s
@@ -1,5 +1,5 @@
-! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s
-! RUN: llvm-mc %s -arch=sparcv9 -filetype=obj | llvm-readobj -r - | FileCheck %s --check-prefix=CHECK-OBJ
+! RUN: llvm-mc %s -triple=sparcv9 -show-encoding | FileCheck %s
+! RUN: llvm-mc %s -triple=sparcv9 -filetype=obj | llvm-readobj -r - | FileCheck %s --check-prefix=CHECK-OBJ
! CHECK-OBJ: Format: elf64-sparc
! CHECK-OBJ: .rela.text {
diff --git a/llvm/test/MC/Sparc/sparc-special-registers.s b/llvm/test/MC/Sparc/sparc-special-registers.s
index 287a4e4069b3473..54f416211de3c83 100644
--- a/llvm/test/MC/Sparc/sparc-special-registers.s
+++ b/llvm/test/MC/Sparc/sparc-special-registers.s
@@ -1,5 +1,5 @@
-! RUN: llvm-mc %s -arch=sparc -show-encoding | FileCheck %s --check-prefixes=CHECK,V8
-! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s --check-prefixes=CHECK,V9
+! RUN: llvm-mc %s -triple=sparc -show-encoding | FileCheck %s --check-prefixes=CHECK,V8
+! RUN: llvm-mc %s -triple=sparcv9 -show-encoding | FileCheck %s --check-prefixes=CHECK,V9
! CHECK: rd %y, %i0 ! encoding: [0xb1,0x40,0x00,0x00]
rd %y, %i0
diff --git a/llvm/test/MC/Sparc/sparc-synthetic-instructions.s b/llvm/test/MC/Sparc/sparc-synthetic-instructions.s
index 3cea9fe48bc852f..5652f868419504a 100644
--- a/llvm/test/MC/Sparc/sparc-synthetic-instructions.s
+++ b/llvm/test/MC/Sparc/sparc-synthetic-instructions.s
@@ -1,5 +1,5 @@
-! RUN: llvm-mc %s -arch=sparc -show-encoding | FileCheck %s
-! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s
+! RUN: llvm-mc %s -triple=sparc -show-encoding | FileCheck %s
+! RUN: llvm-mc %s -triple=sparcv9 -show-encoding | FileCheck %s
! Section A.3 Synthetic Instructions
! CHECK: cmp %g1, %g2 ! encoding: [0x80,0xa0,0x40,0x02]
@@ -169,8 +169,8 @@
! The following tests exercise 'set' in such a way that its output
diff ers
! depending on whether targeting V8 or V9.
!
-! RUN: llvm-mc %s -arch=sparc -show-encoding | FileCheck %s --check-prefix=V8
-! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s --check-prefix=V9
+! RUN: llvm-mc %s -triple=sparc -show-encoding | FileCheck %s --check-prefix=V8
+! RUN: llvm-mc %s -triple=sparcv9 -show-encoding | FileCheck %s --check-prefix=V9
! V8: mov -1, %o1 ! encoding: [0x92,0x10,0x3f,0xff]
! V9: sethi %hi(-1), %o1 ! encoding: [0x13,0b00AAAAAA,A,A]
diff --git a/llvm/test/MC/Sparc/sparc-tls-relocations.s b/llvm/test/MC/Sparc/sparc-tls-relocations.s
index 257fda74120c511..85fe96006a152ea 100644
--- a/llvm/test/MC/Sparc/sparc-tls-relocations.s
+++ b/llvm/test/MC/Sparc/sparc-tls-relocations.s
@@ -1,12 +1,12 @@
! Testing Sparc TLS relocations emission
! (for now a couple local ones).
!
-! RUN: llvm-mc %s -arch=sparc -show-encoding | FileCheck %s --check-prefix=ASM
-! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s --check-prefix=ASM
-! RUN: llvm-mc %s -arch=sparc -filetype=obj | llvm-readobj -r - | FileCheck %s --check-prefix=REL
-! RUN: llvm-mc %s -arch=sparcv9 -filetype=obj | llvm-readobj -r - | FileCheck %s --check-prefix=REL
-! RUN: llvm-mc %s -arch=sparc -filetype=obj | llvm-objdump -r -d - | FileCheck %s --check-prefix=OBJDUMP
-! RUN: llvm-mc %s -arch=sparcv9 -filetype=obj | llvm-objdump -r -d - | FileCheck %s --check-prefix=OBJDUMP
+! RUN: llvm-mc %s -triple=sparc -show-encoding | FileCheck %s --check-prefix=ASM
+! RUN: llvm-mc %s -triple=sparcv9 -show-encoding | FileCheck %s --check-prefix=ASM
+! RUN: llvm-mc %s -triple=sparc -filetype=obj | llvm-readobj -r - | FileCheck %s --check-prefix=REL
+! RUN: llvm-mc %s -triple=sparcv9 -filetype=obj | llvm-readobj -r - | FileCheck %s --check-prefix=REL
+! RUN: llvm-mc %s -triple=sparc -filetype=obj | llvm-objdump -r -d - | FileCheck %s --check-prefix=OBJDUMP
+! RUN: llvm-mc %s -triple=sparcv9 -filetype=obj | llvm-objdump -r -d - | FileCheck %s --check-prefix=OBJDUMP
! REL: Arch: sparc
! REL: Relocations [
diff --git a/llvm/test/MC/Sparc/sparc-traps.s b/llvm/test/MC/Sparc/sparc-traps.s
index 650477496f912d6..bc11b4c84c625a9 100644
--- a/llvm/test/MC/Sparc/sparc-traps.s
+++ b/llvm/test/MC/Sparc/sparc-traps.s
@@ -1,4 +1,4 @@
-! RUN: llvm-mc %s -arch=sparc -show-encoding | FileCheck %s
+! RUN: llvm-mc %s -triple=sparc -show-encoding | FileCheck %s
! CHECK: ta %i5 ! encoding: [0x91,0xd0,0x00,0x1d]
! CHECK: ta 82 ! encoding: [0x91,0xd0,0x20,0x52]
diff --git a/llvm/test/MC/Sparc/sparc-v9-traps.s b/llvm/test/MC/Sparc/sparc-v9-traps.s
index 8e5a48794ecf684..eac27df06070827 100644
--- a/llvm/test/MC/Sparc/sparc-v9-traps.s
+++ b/llvm/test/MC/Sparc/sparc-v9-traps.s
@@ -1,4 +1,4 @@
-! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s
+! RUN: llvm-mc %s -triple=sparcv9 -show-encoding | FileCheck %s
! CHECK: ta %icc, %i5 ! encoding: [0x91,0xd0,0x00,0x1d]
! CHECK: ta %icc, 82 ! encoding: [0x91,0xd0,0x20,0x52]
diff --git a/llvm/test/MC/Sparc/sparc-vis.s b/llvm/test/MC/Sparc/sparc-vis.s
index 11ca564d48d18bf..77e1ab1432eed11 100644
--- a/llvm/test/MC/Sparc/sparc-vis.s
+++ b/llvm/test/MC/Sparc/sparc-vis.s
@@ -1,4 +1,4 @@
-! RUN: llvm-mc %s -arch=sparcv9 -mcpu=niagara -show-encoding | FileCheck %s
+! RUN: llvm-mc %s -triple=sparcv9 -mcpu=niagara -show-encoding | FileCheck %s
! CHECK: fzeros %f31 ! encoding: [0xbf,0xb0,0x0c,0x20]
fzeros %f31
diff --git a/llvm/test/MC/Sparc/sparc64-bpr-offset.s b/llvm/test/MC/Sparc/sparc64-bpr-offset.s
index 6c853c339c28595..c9d3821dea3e499 100644
--- a/llvm/test/MC/Sparc/sparc64-bpr-offset.s
+++ b/llvm/test/MC/Sparc/sparc64-bpr-offset.s
@@ -1,4 +1,4 @@
-! RUN: llvm-mc -arch=sparcv9 -filetype=obj %s | llvm-objdump -d - | FileCheck %s --check-prefix=BIN
+! RUN: llvm-mc -triple=sparcv9 -filetype=obj %s | llvm-objdump -d - | FileCheck %s --check-prefix=BIN
!! SPARCv9/SPARC64 BPr branches have
diff erent offset encoding from the others,
!! make sure that our offset bits don't trample on other fields.
diff --git a/llvm/test/MC/Sparc/sparcv8-instructions.s b/llvm/test/MC/Sparc/sparcv8-instructions.s
index 9071b45740c9fc4..a59c1b3b41fc426 100644
--- a/llvm/test/MC/Sparc/sparcv8-instructions.s
+++ b/llvm/test/MC/Sparc/sparcv8-instructions.s
@@ -1,4 +1,4 @@
-! RUN: llvm-mc %s -arch=sparc -show-encoding | FileCheck %s
+! RUN: llvm-mc %s -triple=sparc -show-encoding | FileCheck %s
! CHECK: fcmps %f0, %f4 ! encoding: [0x81,0xa8,0x0a,0x24]
! CHECK: fcmpd %f0, %f4 ! encoding: [0x81,0xa8,0x0a,0x44]
diff --git a/llvm/test/MC/Sparc/sparcv9-asi-names.s b/llvm/test/MC/Sparc/sparcv9-asi-names.s
index a27d1a0c30d8d61..7af4c96314dc3ee 100644
--- a/llvm/test/MC/Sparc/sparcv9-asi-names.s
+++ b/llvm/test/MC/Sparc/sparcv9-asi-names.s
@@ -1,4 +1,4 @@
-! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s --check-prefix=V9
+! RUN: llvm-mc %s -triple=sparcv9 -show-encoding | FileCheck %s --check-prefix=V9
!! Short names
! V9: casxa [%i0] #ASI_N, %l6, %o2 ! encoding: [0xd5,0xf6,0x00,0x96]
diff --git a/llvm/test/MC/Sparc/sparcv9-atomic-instructions.s b/llvm/test/MC/Sparc/sparcv9-atomic-instructions.s
index 4d28907fb863bd9..7c926e5ccc40b6b 100644
--- a/llvm/test/MC/Sparc/sparcv9-atomic-instructions.s
+++ b/llvm/test/MC/Sparc/sparcv9-atomic-instructions.s
@@ -1,4 +1,4 @@
-! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s
+! RUN: llvm-mc %s -triple=sparcv9 -show-encoding | FileCheck %s
! CHECK: membar #LoadLoad | #StoreLoad | #LoadStore | #StoreStore ! encoding: [0x81,0x43,0xe0,0x0f]
membar 15
diff --git a/llvm/test/MC/Sparc/sparcv9-instructions.s b/llvm/test/MC/Sparc/sparcv9-instructions.s
index 5fc31d1e939fd95..0ca2e50989ca961 100644
--- a/llvm/test/MC/Sparc/sparcv9-instructions.s
+++ b/llvm/test/MC/Sparc/sparcv9-instructions.s
@@ -1,5 +1,5 @@
-! RUN: not llvm-mc %s -arch=sparc -show-encoding 2>&1 | FileCheck %s --check-prefix=V8
-! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s --check-prefix=V9
+! RUN: not llvm-mc %s -triple=sparc -show-encoding 2>&1 | FileCheck %s --check-prefix=V8
+! RUN: llvm-mc %s -triple=sparcv9 -show-encoding | FileCheck %s --check-prefix=V9
! V8: error: invalid instruction mnemonic
! V8-NEXT: addc %g2, %g1, %g3
diff --git a/llvm/test/MC/Sparc/sparcv9-synthetic-instructions.s b/llvm/test/MC/Sparc/sparcv9-synthetic-instructions.s
index dfaab3fc9b15fbb..d387e56bf02a342 100644
--- a/llvm/test/MC/Sparc/sparcv9-synthetic-instructions.s
+++ b/llvm/test/MC/Sparc/sparcv9-synthetic-instructions.s
@@ -1,5 +1,5 @@
-! RUN: not llvm-mc %s -arch=sparc -show-encoding 2>&1 | FileCheck %s --check-prefix=V8
-! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s --check-prefix=V9
+! RUN: not llvm-mc %s -triple=sparc -show-encoding 2>&1 | FileCheck %s --check-prefix=V8
+! RUN: llvm-mc %s -triple=sparcv9 -show-encoding | FileCheck %s --check-prefix=V9
! V8: error: instruction requires a CPU feature not currently enabled
! V8-NEXT: setx 1, %g1, %o1
diff --git a/llvm/test/Object/AMDGPU/objdump.s b/llvm/test/Object/AMDGPU/objdump.s
index 60bb71730a69d78..07823b832369285 100644
--- a/llvm/test/Object/AMDGPU/objdump.s
+++ b/llvm/test/Object/AMDGPU/objdump.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=tonga %s -filetype=obj | llvm-objdump -d --arch-name=amdgcn --mcpu=tonga - | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=tonga %s -filetype=obj | llvm-objdump -d --arch-name=amdgcn --mcpu=tonga - | FileCheck %s
.text
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