[llvm] [AArch64] Separate PNR into its own Register Class (PR #65306)

[Matthew Devereau via llvm-commits]

================
@@ -1348,9 +1348,14 @@ void AArch64InstPrinter::printPredicateAsCounter(const MCInst *MI,
                                                  const MCSubtargetInfo &STI,
                                                  raw_ostream &O) {
   unsigned Reg = MI->getOperand(OpNum).getReg();
+  O << "pn";
+  if (Reg >= AArch64::P0 && Reg <= AArch64::P15)
----------------
MDevereau wrote:

Yeah you're right, It's not needed after removing the PPRPNR classes from earlier. I've simplified this to 
```c++
if (Reg < AArch64::PN0 || Reg > AArch64::PN15)
    llvm_unreachable("Unsupported predicate-as-counter register");
O << "pn" << Reg - AArch64::PN0;
```

https://github.com/llvm/llvm-project/pull/65306