[llvm] [RISCV] Eliminate dead li after emitting VSETVLIs (PR #65934)

[Yingwei Zheng via llvm-commits]

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@@ -1255,6 +1257,13 @@ void RISCVInsertVSETVLI::emitVSETVLIs(MachineBasicBlock &MBB) {
         MachineOperand &VLOp = MI.getOperand(getVLOpNum(MI));
         if (VLOp.isReg()) {
           // Erase the AVL operand from the instruction.
+          if (MachineInstr *MI = MRI->getVRegDef(VLOp.getReg());
+              MI && MI->getOpcode() == RISCV::ADDI &&
+              MI->getOperand(1).isReg() && MI->getOperand(2).isImm() &&
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dtcxzyw wrote:

I don‘t understand. IIUC, It is unsafe to run `DeadMachineInstructionElim` after `TargetPassConfig::addMachineSSAOptimization`.

https://github.com/llvm/llvm-project/pull/65934