[llvm] [RISCV] Eliminate dead li after emitting VSETVLIs (PR #65934)

Philip Reames via llvm-commits llvm-commits at lists.llvm.org
Mon Sep 11 07:55:26 PDT 2023


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@@ -1255,6 +1257,13 @@ void RISCVInsertVSETVLI::emitVSETVLIs(MachineBasicBlock &MBB) {
         MachineOperand &VLOp = MI.getOperand(getVLOpNum(MI));
         if (VLOp.isReg()) {
           // Erase the AVL operand from the instruction.
+          if (MachineInstr *MI = MRI->getVRegDef(VLOp.getReg());
+              MI && MI->getOpcode() == RISCV::ADDI &&
+              MI->getOperand(1).isReg() && MI->getOperand(2).isImm() &&
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preames wrote:

You should be able to do this uniformly for all defs.  Either by tracking the vreg directly, or by using MI if you want.

https://github.com/llvm/llvm-project/pull/65934


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