[llvm] [ARM][ISel] Fix crash of ISD::FMINNUM/FMAXNUM (PR #65849)

via llvm-commits llvm-commits at lists.llvm.org
Mon Sep 11 07:25:28 PDT 2023


vfdff wrote:

> I think it should be the other way around. The instruction should be legal if HasFPARMv8 && HasNEON. It's a bit of a strange combination to have armv7+fp-armv8, but that appears to be what happens for the scalar instructions and from gcc.

Thanks @davemgreen. Would you please show how can we infer that the instruction **fmaxnum** should be legal if HasFPARMv8 && HasNEON ?
The related pattern is defined with **Requires<[HasV8, HasNEON]>**, so the instruction should be legal iff **HasV8 && HasNEON**.  Meanwhile, the feature HasV8 and HasFPARMv8 is independent from the definition of ARMv8a.  
```
def NEON_VMAXNMNQf  : N3VQIntnp<0b00110, 0b00, 0b1111, 1, 1,
                                  N3RegFrm, NoItinerary, "vmaxnm", "f32",
                                  v4f32, v4f32, fmaxnum, 1>,
                                  Requires<[HasV8, HasNEON]>;

def ARMv8a    : Architecture<"armv8-a",   "ARMv8a",   [HasV8Ops,
                                                       FeatureFPARMv8,
                                                       FeatureNEON,
                                                       ...]
```

https://github.com/llvm/llvm-project/pull/65849


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