[llvm] a0b0d74 - fix test for #65212
Nuno Lopes via llvm-commits
llvm-commits at lists.llvm.org
Sun Sep 3 09:02:00 PDT 2023
Author: Nuno Lopes
Date: 2023-09-03T17:01:36+01:00
New Revision: a0b0d7493db64d897ef68b43636810cfcb12bd22
URL: https://github.com/llvm/llvm-project/commit/a0b0d7493db64d897ef68b43636810cfcb12bd22
DIFF: https://github.com/llvm/llvm-project/commit/a0b0d7493db64d897ef68b43636810cfcb12bd22.diff
LOG: fix test for #65212
I committed the wrong test, sorry.
Added:
Modified:
llvm/test/Transforms/LoopVectorize/reduction-align.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/LoopVectorize/reduction-align.ll b/llvm/test/Transforms/LoopVectorize/reduction-align.ll
index ff717af5136ffd..a9c8b97b0bf43c 100644
--- a/llvm/test/Transforms/LoopVectorize/reduction-align.ll
+++ b/llvm/test/Transforms/LoopVectorize/reduction-align.ll
@@ -9,37 +9,75 @@ define void @fn(ptr %hbuf, ptr %ref, i32 %height) {
; CHECK-SAME: ptr [[HBUF:%.*]], ptr [[REF:%.*]], i32 [[HEIGHT:%.*]]) {
; CHECK-NEXT: entry:
; CHECK-NEXT: store i16 0, ptr [[HBUF]], align 1
-; CHECK-NEXT: br label [[FOR_COND:%.*]]
-; CHECK: for.cond:
-; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ]
-; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[I]], [[HEIGHT]]
-; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[HEIGHT]], 0
+; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
+; CHECK: for.body.preheader:
+; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[HEIGHT]], 16
+; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]]
+; CHECK: vector.memcheck:
+; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[HBUF]], i64 2
+; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[REF]], i64 2
+; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[HBUF]], [[SCEVGEP1]]
+; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[REF]], [[SCEVGEP]]
+; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
+; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]
+; CHECK: vector.ph:
+; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[HEIGHT]], 16
+; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[HEIGHT]], [[N_MOD_VF]]
+; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
+; CHECK: vector.body:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <8 x i16> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP1:%.*]], [[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_PHI2:%.*]] = phi <8 x i16> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP2:%.*]], [[VECTOR_BODY]] ]
+; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[REF]], align 1, !alias.scope !0
+; CHECK-NEXT: [[BROADCAST_SPLATINSERT3:%.*]] = insertelement <8 x i16> poison, i16 [[TMP0]], i64 0
+; CHECK-NEXT: [[BROADCAST_SPLAT4:%.*]] = shufflevector <8 x i16> [[BROADCAST_SPLATINSERT3]], <8 x i16> poison, <8 x i32> zeroinitializer
+; CHECK-NEXT: [[TMP1]] = add <8 x i16> [[BROADCAST_SPLAT4]], [[VEC_PHI]]
+; CHECK-NEXT: [[TMP2]] = add <8 x i16> [[BROADCAST_SPLAT4]], [[VEC_PHI2]]
+; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 16
+; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
+; CHECK-NEXT: br i1 [[TMP3]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
+; CHECK: middle.block:
+; CHECK-NEXT: [[BIN_RDX:%.*]] = add <8 x i16> [[TMP2]], [[TMP1]]
+; CHECK-NEXT: [[TMP4:%.*]] = call i16 @llvm.vector.reduce.add.v8i16(<8 x i16> [[BIN_RDX]])
+; CHECK-NEXT: store i16 [[TMP4]], ptr [[HBUF]], align 1
+; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[HEIGHT]], [[N_VEC]]
+; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_END_LOOPEXIT:%.*]], label [[SCALAR_PH]]
+; CHECK: scalar.ph:
+; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[FOR_BODY_PREHEADER]] ], [ 0, [[VECTOR_MEMCHECK]] ]
+; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i16 [ 0, [[VECTOR_MEMCHECK]] ], [ 0, [[FOR_BODY_PREHEADER]] ], [ [[TMP4]], [[MIDDLE_BLOCK]] ]
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
; CHECK: for.body:
-; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[REF]], align 1
-; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr [[HBUF]], align 1
-; CHECK-NEXT: [[ADD:%.*]] = add i16 [[TMP1]], [[TMP0]]
+; CHECK-NEXT: [[TMP5:%.*]] = phi i16 [ [[ADD:%.*]], [[FOR_BODY]] ], [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INC:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[TMP6:%.*]] = load i16, ptr [[REF]], align 1
+; CHECK-NEXT: [[ADD]] = add i16 [[TMP6]], [[TMP5]]
; CHECK-NEXT: store i16 [[ADD]], ptr [[HBUF]], align 1
; CHECK-NEXT: [[INC]] = add i32 [[I]], 1
-; CHECK-NEXT: br label [[FOR_COND]]
+; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i32 [[INC]], [[HEIGHT]]
+; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_END_LOOPEXIT]], label [[FOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
+; CHECK: for.end.loopexit:
+; CHECK-NEXT: br label [[FOR_END]]
; CHECK: for.end:
; CHECK-NEXT: ret void
;
entry:
store i16 0, ptr %hbuf, align 1
- br label %for.cond
+ %cmp1 = icmp sgt i32 %height, 0
+ br i1 %cmp1, label %for.body.preheader, label %for.end
-for.cond:
- %i = phi i32 [ 0, %entry ], [ %inc, %for.body ]
- %cmp = icmp slt i32 %i, %height
- br i1 %cmp, label %for.body, label %for.end
+for.body.preheader:
+ br label %for.body
for.body:
- %0 = load i16, ptr %ref, align 1
- %1 = load i16, ptr %hbuf, align 1
+ %0 = phi i16 [ %add, %for.body ], [ 0, %for.body.preheader ]
+ %i = phi i32 [ 0, %for.body.preheader ], [ %inc, %for.body ]
+ %1 = load i16, ptr %ref, align 1
%add = add i16 %1, %0
store i16 %add, ptr %hbuf, align 1
%inc = add i32 %i, 1
- br label %for.cond
+ %exitcond.not = icmp eq i32 %inc, %height
+ br i1 %exitcond.not, label %for.end, label %for.body
for.end:
ret void
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