[PATCH] D159410: [BOLT] skip CFG verification after the 'inst-lowering' Pass

[Jiapeng Zhou via Phabricator via llvm-commits]

Kepontry added a comment.

In the validateSuccessorInvariants function, we validate the correspondence between the number of successors and the type of branching instruction. An error is triggered when an instruction is an unconditional branch and has no successors.

When there is a "b _ZdlPvm at PLT" TailCall instruction at the end of a basic block. This instruction jumps to the PLT table, and does not have any successors. Although this instruction is an unconditional jump, the function “isUnconditionalBranch” returns false because the inst is a TailCall and doesn’t need CFG validation.

However, when the “inst-lowering” Pass is applied, the lowerTailCall function is invoked, removing the “kTailCall” label from this instruction. Consequently, the isTailCall(Inst) function returns true, which then leads to an error during the CFG validation of this instruction.


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  https://reviews.llvm.org/D159410/new/

https://reviews.llvm.org/D159410