[PATCH] D159082: [ELF][RISCV] Implement --emit-relocs with relaxation

[Jessica Clarke via Phabricator via llvm-commits]

jrtc27 added inline comments.


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Comment at: lld/ELF/InputSection.cpp:355
+  if (config->relax && !config->relocatable && config->emachine == EM_RISCV) {
+    // On RISC-V, relaxation might change relocations so we cannot simply copy
+    // from the input section.
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Isn’t that true of other architectures though? TLS relaxations, GOT->PCREL relaxation, …


Repository:
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  https://reviews.llvm.org/D159082/new/

https://reviews.llvm.org/D159082