[PATCH] D159306: [RISCV] Remove XLen field from RISCVSubtarget [nfc]

[Philip Reames via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rGfaed70d38f5b: [RISCV] Remove XLen field from RISCVSubtarget [nfc] (authored by reames).

Changed prior to commit:
  https://reviews.llvm.org/D159306?vs=555130&id=555373#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D159306/new/

https://reviews.llvm.org/D159306

Files:
  llvm/lib/Target/RISCV/RISCVSubtarget.cpp
  llvm/lib/Target/RISCV/RISCVSubtarget.h


Index: llvm/lib/Target/RISCV/RISCVSubtarget.h
===================================================================
--- llvm/lib/Target/RISCV/RISCVSubtarget.h
+++ llvm/lib/Target/RISCV/RISCVSubtarget.h
@@ -48,7 +48,6 @@
   bool ATTRIBUTE = DEFAULT;
 #include "RISCVGenSubtargetInfo.inc"
 
-  unsigned XLen = 32;
   unsigned ZvlLen = 0;
   unsigned RVVVectorBitsMin;
   unsigned RVVVectorBitsMax;
@@ -127,12 +126,10 @@
   }
   bool is64Bit() const { return IsRV64; }
   MVT getXLenVT() const {
-    return MVT::getIntegerVT(getXLen());
+    return is64Bit() ? MVT::i64 : MVT::i32;
   }
   unsigned getXLen() const {
-    assert((XLen == 32 || XLen == 64) &&
-           "unexpected xlen");
-    return XLen;
+    return is64Bit() ? 64 : 32;
   }
   unsigned getFLen() const {
     if (HasStdExtD)
Index: llvm/lib/Target/RISCV/RISCVSubtarget.cpp
===================================================================
--- llvm/lib/Target/RISCV/RISCVSubtarget.cpp
+++ llvm/lib/Target/RISCV/RISCVSubtarget.cpp
@@ -66,9 +66,6 @@
     TuneCPU = CPU;
 
   ParseSubtargetFeatures(CPU, TuneCPU, FS);
-  if (Is64Bit)
-    XLen = 64;
-
   TargetABI = RISCVABI::computeTargetABI(TT, getFeatureBits(), ABIName);
   RISCVFeatures::validate(TT, getFeatureBits());
   return *this;


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