[llvm] faed70d - [RISCV] Remove XLen field from RISCVSubtarget [nfc]
Philip Reames via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 1 07:42:21 PDT 2023
Author: Philip Reames
Date: 2023-09-01T07:42:03-07:00
New Revision: faed70d38f5b535199bd9427eeb958b2fc427e22
URL: https://github.com/llvm/llvm-project/commit/faed70d38f5b535199bd9427eeb958b2fc427e22
DIFF: https://github.com/llvm/llvm-project/commit/faed70d38f5b535199bd9427eeb958b2fc427e22.diff
LOG: [RISCV] Remove XLen field from RISCVSubtarget [nfc]
The isRV64 field contains the same information, and we can derive XLen
from that.
Differential Revision: https://reviews.llvm.org/D159306
Added:
Modified:
llvm/lib/Target/RISCV/RISCVSubtarget.cpp
llvm/lib/Target/RISCV/RISCVSubtarget.h
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVSubtarget.cpp b/llvm/lib/Target/RISCV/RISCVSubtarget.cpp
index bd43981a8ae44a..aa0275830e2a87 100644
--- a/llvm/lib/Target/RISCV/RISCVSubtarget.cpp
+++ b/llvm/lib/Target/RISCV/RISCVSubtarget.cpp
@@ -66,9 +66,6 @@ RISCVSubtarget::initializeSubtargetDependencies(const Triple &TT, StringRef CPU,
TuneCPU = CPU;
ParseSubtargetFeatures(CPU, TuneCPU, FS);
- if (Is64Bit)
- XLen = 64;
-
TargetABI = RISCVABI::computeTargetABI(TT, getFeatureBits(), ABIName);
RISCVFeatures::validate(TT, getFeatureBits());
return *this;
diff --git a/llvm/lib/Target/RISCV/RISCVSubtarget.h b/llvm/lib/Target/RISCV/RISCVSubtarget.h
index e89093642429e6..cf64dbc21bd8a8 100644
--- a/llvm/lib/Target/RISCV/RISCVSubtarget.h
+++ b/llvm/lib/Target/RISCV/RISCVSubtarget.h
@@ -48,7 +48,6 @@ class RISCVSubtarget : public RISCVGenSubtargetInfo {
bool ATTRIBUTE = DEFAULT;
#include "RISCVGenSubtargetInfo.inc"
- unsigned XLen = 32;
unsigned ZvlLen = 0;
unsigned RVVVectorBitsMin;
unsigned RVVVectorBitsMax;
@@ -127,12 +126,10 @@ class RISCVSubtarget : public RISCVGenSubtargetInfo {
}
bool is64Bit() const { return IsRV64; }
MVT getXLenVT() const {
- return MVT::getIntegerVT(getXLen());
+ return is64Bit() ? MVT::i64 : MVT::i32;
}
unsigned getXLen() const {
- assert((XLen == 32 || XLen == 64) &&
- "unexpected xlen");
- return XLen;
+ return is64Bit() ? 64 : 32;
}
unsigned getFLen() const {
if (HasStdExtD)
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