[PATCH] D159191: [DAGCombiner][SVE] Add support for illegal extending masked loads

[David Sherwood via Phabricator via llvm-commits]

david-arm marked 3 inline comments as done.
david-arm added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:5353
+  if (auto *Ld = dyn_cast<MaskedLoadSDNode>(ExtVal->getOperand(0))) {
+    if (!isLoadExtLegalOrCustom(ISD::ZEXTLOAD, ExtVT, Ld->getValueType(0))) {
+      unsigned NumExtMaskedLoads = 0;
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paulwalker-arm wrote:
> Is this strictly necessary? Perhaps it is but I'm wondering if you're really just trying to limit this combine to cases where ExtVT is bigger than legal?
Now that I'm disabling this for fixed-width I'd prefer to keep the isLoadExtLegalOrCustom check in order to mirror what the DAGCombiner checks for. That way I hopefully avoid any regressions where I return false for fixed-width.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D159191/new/

https://reviews.llvm.org/D159191