[PATCH] D159096: [AArch64][GlobalISel] Lower G_EXTRACT_VECTOR_ELT with variable indices

[Vladislav Dzhidzhoev via Phabricator via llvm-commits]

dzhidzhoev updated this revision to Diff 555357.
dzhidzhoev added a comment.

Addressed @aemerson comment.
Added end-to-end IR test. Additionally, removed duplicated if condition in customIf clause.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D159096/new/

https://reviews.llvm.org/D159096

Files:
  llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
  llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.h
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-extract-vector-elt.mir
  llvm/test/CodeGen/AArch64/arm64-extract-insert-varidx.ll

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