[llvm] 2a81396 - [DAG] SimplifyDemandedBits - add SMIN/SMAX KnownBits comparison analysis

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2023-09-01T12:42:30+01:00
New Revision: 2a81396b1bf06c4b3d1ed8394e0215b8a57c2fb0

URL: https://github.com/llvm/llvm-project/commit/2a81396b1bf06c4b3d1ed8394e0215b8a57c2fb0
DIFF: https://github.com/llvm/llvm-project/commit/2a81396b1bf06c4b3d1ed8394e0215b8a57c2fb0.diff

LOG: [DAG] SimplifyDemandedBits - add SMIN/SMAX KnownBits comparison analysis

Followup to D158364

Also, final fix for Issue #59902 which noted that the snippet should just return 1

Added: 
    

Modified: 
    llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    llvm/test/CodeGen/AArch64/pr59902.ll
    llvm/test/CodeGen/X86/combine-smax.ll
    llvm/test/CodeGen/X86/combine-smin.ll

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index a8e15b2b1760f3..35631a125ff979 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -2179,10 +2179,18 @@ bool TargetLowering::SimplifyDemandedBits(
     KnownBits Known1 = TLO.DAG.computeKnownBits(Op1, DemandedElts, Depth + 1);
     switch (Opc) {
     case ISD::SMIN:
-      // TODO: Add KnownBits::sle/slt handling.
+      if (std::optional<bool> IsSLE = KnownBits::sle(Known0, Known1))
+        return TLO.CombineTo(Op, *IsSLE ? Op0 : Op1);
+      if (std::optional<bool> IsSLT = KnownBits::slt(Known0, Known1))
+        return TLO.CombineTo(Op, *IsSLT ? Op0 : Op1);
+      Known = KnownBits::smin(Known0, Known1);
       break;
     case ISD::SMAX:
-      // TODO: Add KnownBits::sge/sgt handling.
+      if (std::optional<bool> IsSGE = KnownBits::sge(Known0, Known1))
+        return TLO.CombineTo(Op, *IsSGE ? Op0 : Op1);
+      if (std::optional<bool> IsSGT = KnownBits::sgt(Known0, Known1))
+        return TLO.CombineTo(Op, *IsSGT ? Op0 : Op1);
+      Known = KnownBits::smax(Known0, Known1);
       break;
     case ISD::UMIN:
       if (std::optional<bool> IsULE = KnownBits::ule(Known0, Known1))

diff  --git a/llvm/test/CodeGen/AArch64/pr59902.ll b/llvm/test/CodeGen/AArch64/pr59902.ll
index 9e07e5f271cb53..1dc3878984719e 100644
--- a/llvm/test/CodeGen/AArch64/pr59902.ll
+++ b/llvm/test/CodeGen/AArch64/pr59902.ll
@@ -6,13 +6,7 @@
 define i1 @test() {
 ; CHECK-LABEL: test:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    mov x8, #9007199254740990
-; CHECK-NEXT:    movk x8, #65503, lsl #16
-; CHECK-NEXT:    movk x8, #65407, lsl #32
-; CHECK-NEXT:    cmp x8, x8
-; CHECK-NEXT:    csel x9, x8, x8, gt
-; CHECK-NEXT:    cmp x9, x8
-; CHECK-NEXT:    cset w0, eq
+; CHECK-NEXT:    mov w0, #1 // =0x1
 ; CHECK-NEXT:    ret
   %1 = select i1 false, i64 0, i64 9006649496829950
   %2 = call i64 @llvm.smax.i64(i64 %1, i64 9006649496829950)

diff  --git a/llvm/test/CodeGen/X86/combine-smax.ll b/llvm/test/CodeGen/X86/combine-smax.ll
index 4d3b31fac3db22..0133827b85cae1 100644
--- a/llvm/test/CodeGen/X86/combine-smax.ll
+++ b/llvm/test/CodeGen/X86/combine-smax.ll
@@ -10,11 +10,8 @@
 define i8 @test_i8_knownbits(i8 %a) {
 ; CHECK-LABEL: test_i8_knownbits:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    shrb %dil
-; CHECK-NEXT:    movzbl %dil, %ecx
-; CHECK-NEXT:    xorl %eax, %eax
-; CHECK-NEXT:    testb %cl, %cl
-; CHECK-NEXT:    cmovgl %ecx, %eax
+; CHECK-NEXT:    movl %edi, %eax
+; CHECK-NEXT:    shrb %al
 ; CHECK-NEXT:    # kill: def $al killed $al killed $eax
 ; CHECK-NEXT:    retq
   %x = lshr i8 %a, 1
@@ -82,21 +79,18 @@ define <16 x i8> @test_v16i8_reassociation(<16 x i8> %a) {
 ; SSE41:       # %bb.0:
 ; SSE41-NEXT:    pxor %xmm1, %xmm1
 ; SSE41-NEXT:    pmaxsb %xmm1, %xmm0
-; SSE41-NEXT:    pmaxsb %xmm1, %xmm0
 ; SSE41-NEXT:    retq
 ;
 ; SSE42-LABEL: test_v16i8_reassociation:
 ; SSE42:       # %bb.0:
 ; SSE42-NEXT:    pxor %xmm1, %xmm1
 ; SSE42-NEXT:    pmaxsb %xmm1, %xmm0
-; SSE42-NEXT:    pmaxsb %xmm1, %xmm0
 ; SSE42-NEXT:    retq
 ;
 ; AVX-LABEL: test_v16i8_reassociation:
 ; AVX:       # %bb.0:
 ; AVX-NEXT:    vpxor %xmm1, %xmm1, %xmm1
 ; AVX-NEXT:    vpmaxsb %xmm1, %xmm0, %xmm0
-; AVX-NEXT:    vpmaxsb %xmm1, %xmm0, %xmm0
 ; AVX-NEXT:    retq
   %1 = call <16 x i8> @llvm.smax.v16i8(<16 x i8> %a, <16 x i8> zeroinitializer)
   %2 = call <16 x i8> @llvm.smax.v16i8(<16 x i8> %1, <16 x i8> zeroinitializer)

diff  --git a/llvm/test/CodeGen/X86/combine-smin.ll b/llvm/test/CodeGen/X86/combine-smin.ll
index 9041ad5c198308..87ae495f945e0a 100644
--- a/llvm/test/CodeGen/X86/combine-smin.ll
+++ b/llvm/test/CodeGen/X86/combine-smin.ll
@@ -10,11 +10,8 @@
 define i8 @test_i8_knownbits(i8 %a) {
 ; CHECK-LABEL: test_i8_knownbits:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    orb $-128, %dil
-; CHECK-NEXT:    movzbl %dil, %ecx
-; CHECK-NEXT:    xorl %eax, %eax
-; CHECK-NEXT:    testb %cl, %cl
-; CHECK-NEXT:    cmovsl %ecx, %eax
+; CHECK-NEXT:    movl %edi, %eax
+; CHECK-NEXT:    orb $-128, %al
 ; CHECK-NEXT:    # kill: def $al killed $al killed $eax
 ; CHECK-NEXT:    retq
   %x = or i8 %a, -128