[PATCH] D159215: [RISCV] Fix crash during during i1 vector bitreverse lowering

[Craig Topper via Phabricator via llvm-commits]

craig.topper accepted this revision.
craig.topper added a comment.

LGTM



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Comment at: llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-reverse-bitrotate.ll:5
+
+; There is no correpsonding v1i256 type, so make sure we don't crash if we try
+; to lower via lowerBitreverseShuffle.
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corresponding*


Repository:
  rG LLVM Github Monorepo

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https://reviews.llvm.org/D159215