[PATCH] D159231: [RISCV] Set SEW on VPseudoTernaryWithTailPolicy and VPseudoTernaryWithTailPolicyRoundingMode

[Michael Maitland via Phabricator via llvm-commits]

michaelmaitland updated this revision to Diff 554840.
michaelmaitland added a comment.

Add reduction instr between vsetvlis


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D159231/new/

https://reviews.llvm.org/D159231

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/test/tools/llvm-mca/RISCV/SiFive7/reductions.s

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