[PATCH] D157458: [X86] Run X86FastPreTileConfigPass only with FastISel.
    Evgenii Kudriashov via Phabricator via llvm-commits 
    llvm-commits at lists.llvm.org
       
    Wed Aug 30 09:38:50 PDT 2023
    
    
  
e-kud marked 7 inline comments as done.
e-kud added a comment.
> Change the comment to say that only alive registers are guaranteed to have a regclass.
@qcolombet I've added a part about alive registers. It's unclear to me, should we drop a part about 2 conditions or keep it?
================
Comment at: llvm/lib/Target/X86/X86FastPreTileConfig.cpp:672
+    const TargetRegisterClass *RC = MRI->getRegClassOrNull(VirtReg);
+    if (RC && RC->getID() == X86::TILERegClassID) {
       HasVirtTileReg = true;
----------------
qcolombet wrote:
> I think the proper fix here would be:
> ```
>  if (!MRI->reg_empty(VirtReg) && // <-- only process alive registers
>      MRI->getRegClass(VirtReg)->getID() == X86::TILERegClassID) {
> ```
@qcolombet thank you! This fix is really better than just skipping registers. However since X86FastPreTileConfig is intended for FastISel only. I've decided to continue this way.
================
Comment at: llvm/lib/Target/X86/X86TargetMachine.cpp:538
+  else
+    addPass(createX86PreTileConfigPass());
 }
----------------
pengfei wrote:
> I'm not sure if this pass works for GISel or not, let see if there's problem in the future.
Yes. I have the same thoughts.
Repository:
  rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D157458/new/
https://reviews.llvm.org/D157458
    
    
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